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1__LDBL_HAS_QUIET_NAN__ 1__INT8_TYPE__ signed char__WINT_MAX__ 0xffffffffUPIO_ABCDSR2(port) MMIO32((port) + 0x0074)UINTMAX_MAXPTRDIFF_MINgpios__LDBL_DECIMAL_DIG__ 17BIT19 (1<<19)SPI_BASE (0x40008000U)BIT25 (1<<25)__TQ_FBIT__ 127__UHQ_FBIT__ 16UART1_BASE (0x400E0800U)INT_LEAST8_MIN__UINT_FAST64_MAX__ 0xffffffffffffffffULL__UINT_FAST32_MAX__ 0xffffffffU__USFRACT_FBIT__ 8__INT64_C(c) c ## LL__HQ_FBIT__ 15PIO_ODR(port) MMIO32((port) + 0x0014)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))__WCHAR_MAX__ 0xffffffffUPIO_PDR(port) MMIO32((port) + 0x0004)__SIZEOF_LONG_LONG__ 8SIG_ATOMIC_MIN__UINT8_TYPE__ unsigned char__SHRT_WIDTH__ 16__ARM_FPUINT32_MAXINT32_MAX __INT32_MAX____FLT_EPSILON__ 1.1920928955078125e-7F__INT_LEAST64_TYPE__ long long intTC1_BASE (0x40010040U)INT16_MAX__UINT32_TYPE__ long unsigned int__LDBL_MIN_10_EXP__ (-307)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)BIT2 (1<<2)__SIZEOF_POINTER__ 4__UACCUM_MAX__ 0XFFFFFFFFP-16UK__VFP_FP__ 1PIO_PER(port) MMIO32((port) + 0x0000)__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRPIO_IDR(port) MMIO32((port) + 0x0044)__HA_FBIT__ 7__PTRDIFF_WIDTH__ 32__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32BIT30 (1<<30)__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__INT_WIDTH__ 32__GCC_ATOMIC_POINTER_LOCK_FREE 2__UINT64_C(c) c ## ULLINT_FAST16_MIN (-INT_FAST16_MAX - 1)__LACCUM_EPSILON__ 0x1P-31LKPIO_IER(port) MMIO32((port) + 0x0040)__SFRACT_EPSILON__ 0x1P-7HR__UQQ_IBIT__ 0__FLT32X_MAX__ 1.7976931348623157e+308F32x__USQ_FBIT__ 32__HA_IBIT__ 8long unsigned intBIT29 (1<<29)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 2__STDC_VERSION__ 199901L__ARM_ARCH_7M__ 1INT_FAST32_MINPIO_OSR(port) MMIO32((port) + 0x0018)RTC_BASE (0x400E1460U)PIO_IFDR(port) MMIO32((port) + 0x0024)__FRACT_EPSILON__ 0x1P-15R__STDC_HOSTED__ 1UINT_LEAST8_MAXPIO_AIMDR(port) MMIO32((port) + 0x00B4)__INTPTR_MAX__ 0x7fffffffBIT4 (1<<4)INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)__PRAGMA_REDEFINE_EXTNAME 1__SOFTFP__ 1/build/libopencm3/lib/sam/3nBIT12 (1<<12)__FLT64_EPSILON__ 2.2204460492503131e-16F64INTMAX_MAX __INTMAX_MAX__USART0_BASE (0x40024000U)UINT_FAST8_MAX __UINT_FAST8_MAX__PIO_OWDR(port) MMIO32((port) + 0x00A4)__GCC_ATOMIC_LLONG_LOCK_FREE 1__FLT_MAX_EXP__ 128__ATOMIC_ACQ_REL 4__UINT_FAST64_TYPE__ long long unsigned intunsigned charTWI1_BASE (0x4001C000U)__UINTMAX_TYPE__ long long unsigned int__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__LDBL_EPSILON__ 2.2204460492503131e-16L__INTPTR_TYPE__ intBIT9 (1<<9)__DEC_EVAL_METHOD__ 2MATRIX_BASE (0x400E0200U)__USACCUM_MIN__ 0.0UHKPIOA PIOA_BASEPIO_IFSCER(port) MMIO32((port) + 0x0084)UINTMAX_MAX __UINTMAX_MAX____USFRACT_IBIT__ 0PIOF PIOF_BASE__INT_LEAST32_WIDTH__ 32__ARM_FEATURE_DSP__GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"__UINT_FAST32_TYPE__ unsigned intUINT64_MAX__DQ_IBIT__ 0GPBR_BASE (0x400E1490U)__FLT32_MIN__ 1.1754943508222875e-38F32MMIO8(addr) (*(volatile uint8_t *)(addr))__SIZE_TYPE__ unsigned intWCHAR_MIN __WCHAR_MIN____ULLACCUM_FBIT__ 32PIO_AIMMR(port) MMIO32((port) + 0x00B8)BBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)__FLT64_MIN_EXP__ (-1021)BIT22 (1<<22)INT_FAST32_MAX __INT_FAST32_MAX____FRACT_FBIT__ 15__GCC_ATOMIC_SHORT_LOCK_FREE 2__OPTIMIZE_SIZE__ 1LIBOPENCM3_GPIO_COMMON_3N3S_H __UTA_IBIT__ 64__FLT_MIN_10_EXP__ (-37)__FLT32X_MIN_EXP__ (-1021)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xUINT8_C__FLT_EVAL_METHOD_TS_18661_3__ 0__DBL_HAS_INFINITY__ 1SAM3N 1SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__PIO_OER(port) MMIO32((port) + 0x0010)__ARM_FEATURE_QBIT 1__INT_FAST32_TYPE__ int__FLT_HAS_QUIET_NAN__ 1__SIZEOF_INT__ 4__INTMAX_TYPE__ long long int__INTMAX_C(c) c ## LLPIO_MDER(port) MMIO32((port) + 0x0050)INT_FAST32_MIN (-INT_FAST32_MAX - 1)__APCS_32__ 1PIO_ISR(port) MMIO32((port) + 0x004C)UINT_FAST16_MAX __UINT_FAST16_MAX__PIOC_BASE (0x400E1200U)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)__UINT64_TYPE__ long long unsigned intPWM_BASE (0x40020000U)__FLT32X_HAS_QUIET_NAN__ 1__DBL_MAX_10_EXP__ 308__FLT32X_MIN__ 2.2250738585072014e-308F32xUINT32_MAX __UINT32_MAX__short unsigned int__GCC_ATOMIC_CHAR_LOCK_FREE 2__TA_IBIT__ 64__QQ_FBIT__ 7__FLT32X_HAS_INFINITY__ 1WINT_MIN __WINT_MIN__LIBOPENCM3_PIO_COMMON_ALL_H __UINT_LEAST16_TYPE__ short unsigned intodsrINT16_MAX __INT16_MAX____INT_FAST8_WIDTH__ 32BIT0 (1<<0)__FLT_MIN_EXP__ (-125)PIO_IFSR(port) MMIO32((port) + 0x0028)__ARM_FEATURE_MATMUL_INT8PIO_PDSR(port) MMIO32((port) + 0x003C)__DECIMAL_DIG__ 17__INT32_C(c) c ## LPMC_BASE (0x400E0400U)gpio_toggleINT_FAST16_MIN__STRICT_ANSI__ 1__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_MAX_10_EXP__ 308__FLT32X_MAX_10_EXP__ 308__UINTPTR_MAX__ 0xffffffffU__DBL_HAS_DENORM__ 1BIT14 (1<<14)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"INT16_CUINT64_MAX __UINT64_MAX____ARM_FEATURE_CRC32__FLT32_MAX_10_EXP__ 38UINT_FAST16_MAXPIO_CODR(port) MMIO32((port) + 0x0034)__ARM_FEATURE_SAT 1__LFRACT_MAX__ 0X7FFFFFFFP-31LRfalse 0__INT_LEAST32_MAX__ 0x7fffffffLINT16_C(c) __INT16_C(c)BIT11 (1<<11)INT32_C(c) __INT32_C(c)__UINTMAX_MAX__ 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8__LACCUM_IBIT__ 32TWI0_BASE (0x40018000U)__USFRACT_MAX__ 0XFFP-8UHR__UINT_FAST8_MAX__ 0xffffffffU__ORDER_LITTLE_ENDIAN__ 1234__HAVE_SPECULATION_SAFE_VALUE 1__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)SAM_MEMORYMAP_H PIO_SCDR(port) MMIO32((port) + 0x008C)__SA_FBIT__ 15__FLT64_MIN_10_EXP__ (-307)PIO_WPSR(port) MMIO32((port) + 0x00E8)BIT7 (1<<7)PIO_AIMER(port) MMIO32((port) + 0x00B0)PIO_ESR(port) MMIO32((port) + 0x00C0)__SACCUM_EPSILON__ 0x1P-7HKUINT8_C(c) __UINT8_C(c)__INT_FAST16_TYPE__ int__FLT32_DECIMAL_DIG__ 9BIT18 (1<<18)__UINT16_TYPE__ short unsigned intUINT_LEAST64_MAX__WCHAR_WIDTH__ 32__GNUC_STDC_INLINE__ 1__UHQ_IBIT__ 0__UFRACT_FBIT__ 16__ARM_FEATURE_CLZ 1__LONG_LONG_MAX__ 0x7fffffffffffffffLL__UINT_LEAST16_TYPE__ short unsigned int__FLT_MAX_10_EXP__ 38WINT_MAX__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKLIBOPENCM3_CM3_COMMON_H PTRDIFF_MAX __PTRDIFF_MAX____LLACCUM_EPSILON__ 0x1P-31LLKWINT_MIN__FLT32X_MANT_DIG__ 53INT8_MAX __INT8_MAX__INTMAX_C__ARM_FEATURE_COPROC__ULFRACT_MIN__ 0.0ULR__FLT_MANT_DIG__ 24RTT_BASE (0x400E1430U)__ARM_ARCH__FLT64_DECIMAL_DIG__ 17PIOA_BASE (0x400E0E00U)__REGISTER_PREFIX__ __FLT32_MIN_EXP__ (-125)gpio_flags__UACCUM_IBIT__ 16__UINT_FAST16_MAX__ 0xffffffffU__UINT_FAST16_TYPE__ unsigned int__FLT32_MAX_EXP__ 128GPBR_BASE (0x400E1490U)__DBL_MIN_10_EXP__ (-307)__USACCUM_IBIT__ 8__THUMB_INTERWORK__ 1INT_LEAST8_MAXUINT_LEAST16_MAX__FLT32_DIG__ 6_GCC_STDINT_H TC2_BASE (0x40010080U)__FLT64_HAS_DENORM__ 1BIT1 (1<<1)__FLT_EVAL_METHOD__ 0PIO_PUER(port) MMIO32((port) + 0x0064)__FLT32X_HAS_DENORM__ 1INT64_MINLIBOPENCM3_PIO_H __INT_LEAST64_MAX__ 0x7fffffffffffffffLLINT64_MAX__ACCUM_FBIT__ 15BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)__GCC_ATOMIC_WCHAR_T_LOCK_FREE 2__ULACCUM_IBIT__ 32PIO_IFER(port) MMIO32((port) + 0x0020)PIO_SCHMITT(port) MMIO32((port) + 0x0100)__LLFRACT_FBIT__ 63UINT_FAST64_MAX__INT_LEAST8_WIDTH__ 8__USA_FBIT__ 16__UINT8_MAX__ 0xffPIO_FRLHSR(port) MMIO32((port) + 0x00D8)__UINT16_MAX__ 0xffffGNU C99 12.2.1 20221205 -mcpu=cortex-m3 -mthumb -mfloat-abi=soft -march=armv7-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsINT_LEAST8_MAX __INT_LEAST8_MAX____ARM_FEATURE_FMA__UACCUM_FBIT__ 16SIZE_MAX __SIZE_MAX__PIO_REHLSR(port) MMIO32((port) + 0x00D4)__INTMAX_WIDTH__ 64__ARM_FEATURE_CDE__LFRACT_FBIT__ 31__DBL_IS_IEC_60559__ 2PIO_ODSR(port) MMIO32((port) + 0x0038)__INT_LEAST16_TYPE__ short int__FLT64_HAS_QUIET_NAN__ 1WCHAR_MAXINT_FAST8_MIN (-INT_FAST8_MAX - 1)GPIO_FLAG_GPOUTPUTINT8_C__DBL_DIG__ 15true 1__INT_LEAST8_MAX__ 0x7f__ARM_ARCH_ISA_THUMB__LACCUM_FBIT__ 31LIBOPENCM3_PIO_COMMON_ALL_H SIZE_MAX__ARM_FP16_FORMAT_IEEE__FLT_MIN__ 1.1754943508222875e-38F__GCC_ATOMIC_LONG_LOCK_FREE 2__FLT32X_DIG__ 15__ACCUM_EPSILON__ 0x1P-15K__UDQ_FBIT__ 64__INT_FAST16_MAX__ 0x7fffffffPIO_PPDDR(port) MMIO32((port) + 0x0090)MMIO32(addr) (*(volatile uint32_t *)(addr))__ARM_ARCH_ISA_THUMB 2UINT_FAST32_MAX __UINT_FAST32_MAX__TC5_BASE (0x40014080U)__UTQ_FBIT__ 128long long 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32__ARM_BF16_FORMAT_ALTERNATIVE__WINT_TYPE__ unsigned intBIT16 (1<<16)__LONG_MAX__ 0x7fffffffL__INT16_MAX__ 0x7fff__ULFRACT_FBIT__ 32__SCHAR_WIDTH__ 8SUPC_BASE (0x400E1410U)__ACCUM_MIN__ (-0X1P15K-0X1P15K)LIBOPENCM3_GPIO_H __SIZEOF_DOUBLE__ 8INT8_MAX__GNUC_PATCHLEVEL__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____GXX_TYPEINFO_EQUALITY_INLINE 0EEFC_BASE (0x400E0A00U)__FRACT_MAX__ 0X7FFFP-15R__INT64_TYPE__ long long int__ULACCUM_FBIT__ 32__FLT_NORM_MAX__ 3.4028234663852886e+38F__UFRACT_MIN__ 0.0URBIT24 (1<<24)__ARM_NEON_FPUINT32_C(c) __UINT32_C(c)UINT16_MAX __UINT16_MAX____ULLACCUM_IBIT__ 32__FLT32_IS_IEC_60559__ 2UINT_FAST32_MAX__FRACT_IBIT__ 0__LDBL_MIN__ 2.2250738585072014e-308LINTMAX_C(c) __INTMAX_C(c)__LDBL_HAS_INFINITY__ 1__GCC_IEC_559_COMPLEX 0__UINT32_MAX__ 0xffffffffULPIOB PIOB_BASE__LDBL_MIN_EXP__ (-1021)__ULLFRACT_FBIT__ 64__SIZEOF_WCHAR_T__ 4END_DECLS __FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN____ACCUM_MAX__ 0X7FFFFFFFP-15K__SIZE_WIDTH__ 32__ARM_FEATURE_SAT 1INT_LEAST32_MININT64_C(c) __INT64_C(c)TC3_BASE (0x40014000U)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__LLFRACT_EPSILON__ 0x1P-63LLRUINT32_C__LONG_WIDTH__ 32__SFRACT_FBIT__ 7__CHAR32_TYPE__ long unsigned int__SFRACT_IBIT__ 0PIO_LSR(port) MMIO32((port) + 0x00C4)__ARM_PCS 1__HQ_IBIT__ 0INT64_MIN (-INT64_MAX - 1)__USER_LABEL_PREFIX__ PIO_PPDER(port) MMIO32((port) + 0x0094)__FLT_DENORM_MIN__ 1.4012984643248171e-45F__UINT_LEAST32_TYPE__ long unsigned intBIT27 (1<<27)__DQ_FBIT__ 63__UHA_IBIT__ 8INT_FAST64_MAX __INT_FAST64_MAX____ARM_FEATURE_LDREX 7UINTMAX_C(c) __UINTMAX_C(c)__SIG_ATOMIC_WIDTH__ 32__ARM_FEATURE_BF16_VECTOR_ARITHMETIC__SHRT_MAX__ 0x7fff__ARM_FP16_ARGS__ORDER_PDP_ENDIAN__ 3412INT_LEAST64_MIN__SQ_IBIT__ 0__FLT32_NORM_MAX__ 3.4028234663852886e+38F32PIOB_BASE (0x400E1000U)__FLT_DECIMAL_DIG__ 9__INT32_MAX__ 0x7fffffffL__WINT_WIDTH__ 32PIO_ABCDSR1(port) MMIO32((port) + 0x0070)INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__UQQ_FBIT__ 8CHIPID_BASE (0x400E0740U)INT_FAST64_MIN (-INT_FAST64_MAX - 1)MMIO64(addr) (*(volatile uint64_t *)(addr))short int__UFRACT_EPSILON__ 0x1P-16UR__GXX_ABI_VERSION 1017INT8_C(c) __INT8_C(c)__INT_LEAST64_WIDTH__ 64__INT32_TYPE__ long int__FLT32X_MIN_10_EXP__ (-307)__ARM_FEATURE_BF16_SCALAR_ARITHMETIClong int__ARM_FEATURE_IDIV 1UINT64_CWINT_MAX __WINT_MAX____LDBL_MAX_EXP__ 1024__SQ_FBIT__ 31BIT31 (1<<31)INT_FAST64_MIN__LFRACT_MIN__ (-0.5LR-0.5LR)__WCHAR_MIN__ 0U__FLT64_MAX__ 1.7976931348623157e+308F64INT_LEAST64_MAX __INT_LEAST64_MAX____UINT_LEAST32_MAX__ 0xffffffffUL__GCC_DESTRUCTIVE_SIZE 64__thumb__ 1__LDBL_HAS_QUIET_NAN__ 1__INT8_TYPE__ signed char__WINT_MAX__ 0xffffffffUPIO_ABCDSR2(port) MMIO32((port) + 0x0074)UINTMAX_MAXPTRDIFF_MIN__LDBL_DECIMAL_DIG__ 17BIT19 (1<<19)SPI_BASE (0x40008000U)BIT25 (1<<25)__TQ_FBIT__ 127__UHQ_FBIT__ 16UART1_BASE (0x400E0800U)INT_LEAST8_MINGPIO_FLAG_PERIPHAGPIO_FLAG_PERIPHB__UINT_FAST64_MAX__ 0xffffffffffffffffULLGPIO_FLAG_PERIPHD__USFRACT_FBIT__ 8__INT64_C(c) c ## LL__HQ_FBIT__ 15PIO_ODR(port) MMIO32((port) + 0x0014)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))__WCHAR_MAX__ 0xffffffffUPIO_PDR(port) MMIO32((port) + 0x0004)__SIZEOF_LONG_LONG__ 8SIG_ATOMIC_MIN__UINT8_TYPE__ unsigned char__SHRT_WIDTH__ 16__ARM_FPUINT32_MAXINT32_MAX __INT32_MAX____FLT_EPSILON__ 1.1920928955078125e-7F__INT_LEAST64_TYPE__ long long intTC1_BASE (0x40010040U)INT16_MAX__UINT32_TYPE__ long unsigned int__LDBL_MIN_10_EXP__ (-307)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)BIT2 (1<<2)__SIZEOF_POINTER__ 4__UACCUM_MAX__ 0XFFFFFFFFP-16UK__VFP_FP__ 1PIO_PER(port) MMIO32((port) + 0x0000)__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRPIO_IDR(port) MMIO32((port) + 0x0044)__HA_FBIT__ 7__PTRDIFF_WIDTH__ 32__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32BIT30 (1<<30)__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__INT_WIDTH__ 32__GCC_ATOMIC_POINTER_LOCK_FREE 2__UINT64_C(c) c ## ULLINT_FAST16_MIN (-INT_FAST16_MAX - 1)__LACCUM_EPSILON__ 0x1P-31LKPIO_IER(port) MMIO32((port) + 0x0040)__SFRACT_EPSILON__ 0x1P-7HRBIT23 (1<<23)__UQQ_IBIT__ 0__FLT32X_MAX__ 1.7976931348623157e+308F32x__USQ_FBIT__ 32__HA_IBIT__ 8long unsigned intBIT29 (1<<29)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 2__STDC_VERSION__ 199901L__ARM_ARCH_7M__ 1INT_FAST32_MINPIO_OSR(port) MMIO32((port) + 0x0018)RTC_BASE (0x400E1460U)PIO_IFDR(port) MMIO32((port) + 0x0024)__FRACT_EPSILON__ 0x1P-15R__STDC_HOSTED__ 1UINT_LEAST8_MAXport__INTPTR_MAX__ 0x7fffffffBIT4 (1<<4)INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)__PRAGMA_REDEFINE_EXTNAME 1__SOFTFP__ 1/build/libopencm3/lib/sam/3nBIT12 (1<<12)__FLT64_EPSILON__ 2.2204460492503131e-16F64INTMAX_MAX __INTMAX_MAX__USART0_BASE (0x40024000U)UINT_FAST8_MAX __UINT_FAST8_MAX____GCC_ATOMIC_LLONG_LOCK_FREE 1__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1__FLT_MAX_EXP__ 128__ATOMIC_ACQ_REL 4__UINT_FAST64_TYPE__ long long unsigned intunsigned charTWI1_BASE (0x4001C000U)__UINTMAX_TYPE__ long long unsigned int__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__LDBL_EPSILON__ 2.2204460492503131e-16L__INTPTR_TYPE__ intBIT9 (1<<9)__DEC_EVAL_METHOD__ 2MATRIX_BASE (0x400E0200U)__USACCUM_MIN__ 0.0UHKPIOA PIOA_BASEINTPTR_MIN (-INTPTR_MAX - 1)UINTMAX_MAX __UINTMAX_MAX____USFRACT_IBIT__ 0PIOF PIOF_BASE__INT_LEAST32_WIDTH__ 32__ARM_FEATURE_DSP__GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"__UINT_FAST32_TYPE__ unsigned intUINT64_MAX__DQ_IBIT__ 0__FLT_MAX__ 3.4028234663852886e+38F__FLT32_MIN__ 1.1754943508222875e-38F32MMIO8(addr) (*(volatile uint8_t *)(addr))__SIZE_TYPE__ unsigned intWCHAR_MIN __WCHAR_MIN____ULLACCUM_FBIT__ 32PIO_AIMMR(port) MMIO32((port) + 0x00B8)BBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)__FLT64_MIN_EXP__ (-1021)BIT22 (1<<22)INT_FAST32_MAX __INT_FAST32_MAX____FRACT_FBIT__ 15__GCC_ATOMIC_SHORT_LOCK_FREE 2__OPTIMIZE_SIZE__ 1LIBOPENCM3_GPIO_COMMON_3N3S_H __UTA_IBIT__ 64__FLT_MIN_10_EXP__ (-37)__FLT32X_MIN_EXP__ (-1021)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xUINT8_C__FLT_EVAL_METHOD_TS_18661_3__ 0__DBL_HAS_INFINITY__ 1SAM3N 1SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__PIO_OER(port) MMIO32((port) + 0x0010)__ARM_FEATURE_QBIT 1__INT_FAST32_TYPE__ int__FLT_HAS_QUIET_NAN__ 1__SIZEOF_INT__ 4__INTMAX_TYPE__ long long int__INTMAX_C(c) c ## LLPIO_MDER(port) MMIO32((port) + 0x0050)__ARM_FEATURE_MVE__APCS_32__ 1PIO_ISR(port) MMIO32((port) + 0x004C)UINT_FAST16_MAX __UINT_FAST16_MAX__PIOC_BASE (0x400E1200U)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)__UINT64_TYPE__ long long unsigned intPWM_BASE (0x40020000U)__FLT32X_HAS_QUIET_NAN__ 1__DBL_MAX_10_EXP__ 308__FLT32X_MIN__ 2.2250738585072014e-308F32xUINT32_MAX __UINT32_MAX__short unsigned int__GCC_ATOMIC_CHAR_LOCK_FREE 2__TA_IBIT__ 64__SIZEOF_FLOAT__ 4__FLT32X_HAS_INFINITY__ 1WINT_MIN __WINT_MIN__PIO_OWDR(port) MMIO32((port) + 0x00A4)__ARM_ARCH_PROFILE 77INT16_MAX __INT16_MAX____INT_FAST8_WIDTH__ 32BIT0 (1<<0)__FLT_MIN_EXP__ (-125)INT_FAST8_MIN__ARM_FEATURE_MATMUL_INT8PIO_PDSR(port) MMIO32((port) + 0x003C)__DECIMAL_DIG__ 17__INT32_C(c) c ## LPMC_BASE (0x400E0400U)INT_FAST16_MIN__STRICT_ANSI__ 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__INT_FAST64_MAX__PMC_OCR_SEL4 (0x01 << 7)__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1PMC_FSMR_RTTAL (0x01 << 16)__UINT_LEAST16_MAX__ 0xffff__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64GNU C99 12.2.1 20221205 -mcpu=cortex-m3 -mthumb -mfloat-abi=soft -march=armv7-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sections__GXX_ABI_VERSION 1017EEFC_FMR_FRDY (0x01 << 0)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intPMC_SCSR_PCK2 (0x01 << 10)EEFC_FCR_FCMD_STUI (0x0E << 0)PMC_WPSR_WPVSRC_SHIFT 8PMC_IMR_MOSCXTS (0x01 << 0)INT32_MIN (-INT32_MAX - 1)PMC_SCDR_PCK1 (0x01 << 9)__FLT32_MAX_10_EXP__ 38__USFRACT_MAX__ 0XFFP-8UHR__UINTPTR_MAX__ 0xffffffffUEEFC_FCR_FCMD_EWP (0x03 << 0)__FLT32_MIN_EXP__ (-125)PWM_BASE (0x40020000U)__UINT8_MAX__ 0xffUINT32_MAX __UINT32_MAX____ULFRACT_FBIT__ 32__FLT64_MIN_10_EXP__ (-307)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__PMC_FSMR_LPM (0x01 << 20)__SFRACT_EPSILON__ 0x1P-7HRPIOA_BASE (0x400E0E00U)__INT32_C(c) c ## LCKGR_MOR_MOSCXTST_MASK (0xFF << 8)__ORDER_BIG_ENDIAN__ 4321SIZE_MAX__SQ_FBIT__ 31PMC_SR_MOSCXTS (0x01 << 0)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)EEFC_FCR_FCMD_GGPB (0x0D << 0)__UHQ_FBIT__ 16PMC_FSMR_USBAL (0x01 << 18)__FLT64_MIN_EXP__ (-1021)__PTRDIFF_WIDTH__ 32__UINT_FAST8_MAX__ 0xffffffffUPMC_BASE (0x400E0400U)UINT16_C(c) __UINT16_C(c)__LACCUM_IBIT__ 32PMC_IMR_LOCK PMC_IMR_LOCKAMCK_SRC_MAIN__INT_FAST16_WIDTH__ 32PMC_WPMR_WPKEY_SHIFT 8INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1__LLFRACT_MIN__ (-0.5LLR-0.5LLR)INT_FAST8_MAX__UINT_FAST16_MAX__ 0xffffffffUpmc_clock_setup_in_rc_4mhz_out_84mhz__INTPTR_MAX__ 0x7fffffffINT64_C(c) __INT64_C(c)PMC_FSPR_FSTP3 (0x01 << 3)PMC_IMR_CFDEV (0x01 << 18)__GCC_IEC_559_COMPLEX 0__UFRACT_MIN__ 0.0URCKGR_MOR_MOSCRCF_4MHZ (0 << CKGR_MOR_MOSCRCF_SHIFT)WCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__/build/libopencm3/lib/sam/3n__UINT_LEAST8_TYPE__ unsigned char__ACCUM_FBIT__ 15CKGR_PLLR_MUL_SHIFT CKGR_PLLAR_MULA_SHIFT__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX__PMC_MCKR_CSS_MAIN_CLK (1 << PMC_MCKR_CSS_SHIFT)__INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1__FLT32X_EPSILON__ 2.2204460492503131e-16F32x__ARM_ARCH_7M__ 1__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32pmc_mck_frequencyPMC_IER_PCKRDY0 (0x01 << 8)__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 2PMC_IDR_PCKRDY1 (0x01 << 9)BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRPMC_PCK0_CSS_SHIFT 0short unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)CKGR_PLLAR_PLLACOUNT_MASK (0x3F << CKGR_PLLAR_PLLACOUNT_SHIFT)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__DBL_IS_IEC_60559__ 2__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4PMC_FSPR MMIO32(PMC_BASE + 0x0074)PMC_FSPR_FSTP12 (0x01 << 12)__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32__FLT32X_MIN_EXP__ (-1021)PMC_MCKR_PRES_CLK_64 (6 << PMC_MCKR_PRES_SHIFT)PMC_IMR_PCKRDY1 (0x01 << 9)PMC_PCK0 MMIO32(PMC_BASE + 0x0040)BIT27 (1<<27)PMC_PCK0_PRES_CLK_64 (6 << PMC_PCK0_PRES_SHIFT)__UTA_FBIT__ 64INTMAX_C(c) __INTMAX_C(c)__FLT_DECIMAL_DIG__ 9PMC_OCR_SEL8 (0x01 << 15)__thumb__ 1__INT_LEAST32_MAX__ 0x7fffffffLsigned charPMC_PCK0_CSS_SLOW_CLK (0 << PMC_PCK0_CSS_SHIFT)uint8_tINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1PMC_SR_MCKRDY (0x01 << 3)__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLKPMC_IER_LOCKA (0x01 << 1)__GNUC_PATCHLEVEL__ 1BIT25 (1<<25)PTRDIFF_MIN__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)CKGR_MOR MMIO32(PMC_BASE + 0x0020)UINTPTR_MAX __UINTPTR_MAX____ARM_ARCH_PROFILE 77CKGR_PLLAR_MULA_SHIFT 16PMC_IDR_PCKRDY2 (0x01 << 10)__FLT64_MAX_10_EXP__ 308MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINPMC_PCK2_PRES_CLK_4 (2 << PMC_PCK2_PRES_SHIFT)__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38__SIG_ATOMIC_TYPE__ intPMC_FSPR_FSTP1 (0x01 << 1)__FRACT_MAX__ 0X7FFFP-15RPMC_PCK2_PRES_CLK_16 (4 << PMC_PCK2_PRES_SHIFT)INT_LEAST32_MAX __INT_LEAST32_MAX__CKGR_PLLAR MMIO32(PMC_BASE + 0x0028)CKGR_MOR_MOSCXTST_SHIFT 8__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5PMC_SCER MMIO32(PMC_BASE + 0x0000)PMC_IER_PCKRDY1 (0x01 << 9)pmc_mck_set_sourcePMC_PCK1 MMIO32(PMC_BASE + 0x0044)__UINT16_MAX__ 0xffff__TQ_FBIT__ 127PMC_PCK2_PRES_MASK (0x07 << PMC_PCK2_PRES_SHIFT)PMC_PCK2_PRES_SHIFT 4__USQ_FBIT__ 32INT_FAST16_MINTC2_BASE (0x40010080U)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32_BoolINT_FAST32_MIN (-INT_FAST32_MAX - 1)CKGR_PLLAR_ONE (0x01 << 29)__STRICT_ANSI__ 1UINT_LEAST8_MAXCKGR_MOR_MOSCRCF_MASK (0x07 << CKGR_MOR_MOSCRCF_SHIFT)UINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__EEFC_FCR_FCMD_EWPL (0x04 << 0)__USA_IBIT__ 16__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 1EEFC_FCR_FARG_MASK (0xFFFF << 8)PTRDIFF_MIN (-PTRDIFF_MAX - 1)__SFRACT_MAX__ 0X7FP-7HR__UINT_FAST64_TYPE__ long long unsigned intPMC_PCK2_CSS_MASK (0x07 << PMC_PCK2_CSS_SHIFT)EEFC_FCR(port) MMIO32((port) + 0x04)CKGR_MOR_WAITMODE (0x01 << 2)__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC__PMC_MCKR MMIO32(PMC_BASE + 0x0030)RTT_BASE (0x400E1430U)__FLT32_IS_IEC_60559__ 2INT_FAST64_MINPMC_PCK1_PRES_CLK_8 (3 << PMC_PCK1_PRES_SHIFT)MCK_SRC_UPLL__LDBL_EPSILON__ 2.2204460492503131e-16LEEFC_FCR_FCMD_GLB (0x0A << 0)EEFC0 EEFC0_BASE__USFRACT_MIN__ 0.0UHRPMC_FOCR_FOCLR (0x01 << 0)__ARM_NEONCKGR_MOR_KEY (0x37 << 16)__LDBL_MAX_EXP__ 1024PMC_OCR_CAL12_SHIFT 16PMC_PCK1_PRES_CLK_32 (5 << PMC_PCK1_PRES_SHIFT)__DBL_HAS_DENORM__ 1EEFC_FCR_FCMD_MASK (0xFF << 0)LIBOPENCM3_PMC_COMMON_ALL_H PMC_FSPR_FSTP14 (0x01 << 14)PMC_WPSR_WPVSRC_MASK (0xFFFF << PMC_WPSR_WPVSRC_SHIFT)PMC_SR_CFDEV (0x01 << 18)__DA_FBIT__ 31PMC_MCKR_PLLDIV2 (0x01 << 12)PMC_MCKR_PRES_MASK (0x07 << PMC_MCKR_PRES_SHIFT)pmc_peripheral_clock_disable__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45FPMC_MCKR_PRES_CLK_4 (2 << PMC_MCKR_PRES_SHIFT)SPI_BASE (0x40008000U)__ULLACCUM_EPSILON__ 0x1P-32ULLKINT_LEAST8_MAX __INT_LEAST8_MAX____UINT32_C(c) c ## UL__UACCUM_MIN__ 0.0UKUINT32_C(c) __UINT32_C(c)PMC_SCDR_PCK2 (0x01 << 10)PMC_FSMR_RTCAL (0x01 << 17)SIG_ATOMIC_MAX __SIG_ATOMIC_MAX____ARM_ARCH_ISA_THUMBPMC_PCK1_CSS_MCK (4 << PMC_PCK1_CSS_SHIFT)__ARM_FEATURE_MATMUL_INT8TWI0_BASE (0x40018000U)__GCC_ATOMIC_SHORT_LOCK_FREE 2EEFC_FCR_FCMD_WPL (0x02 << 0)PMC_FSMR_FSTT13 (0x01 << 13)PMC_SR MMIO32(PMC_BASE + 0x0068)__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1EEFC1 EEFC1_BASE__LACCUM_FBIT__ 31PMC_PCK0_CSS_PLL_CLK (2 << PMC_PCK0_CSS_SHIFT)__FLT32_HAS_QUIET_NAN__ 1CKGR_MOR_MOSCRCF_SHIFT 4PMC_PCK0_PRES_CLK_4 (2 << PMC_PCK0_PRES_SHIFT)__LDBL_HAS_INFINITY__ 1PMC_PCK0_CSS_MASK (0x07 << PMC_PCK0_CSS_SHIFT)__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))TC5_BASE (0x40014080U)__FLT32X_MAX_10_EXP__ 308__ARM_ARCH_EXT_IDIV__ 1__ARM_PCS 1bool _Bool__HA_IBIT__ 8UINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffPMC_FSPR_FSTP5 (0x01 << 5)BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)SAM3X_EEFC_H INT16_MAX __INT16_MAX__PMC_FSMR_FSTT4 (0x01 << 4)PMC_FSMR MMIO32(PMC_BASE + 0x0070)__FLT32X_IS_IEC_60559__ 2PMC_SCDR MMIO32(PMC_BASE + 0x0004)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXEEFC_FCR_FCMD_EA (0x05 << 0)__INT_LEAST16_WIDTH__ 16__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLPMC_PCK2_PRES_CLK_8 (3 << PMC_PCK2_PRES_SHIFT)INT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHRPMC_IER_LOCK PMC_IER_LOCKA__OPTIMIZE_SIZE__ 1PMC_MCKR_PRES_CLK_32 (5 << PMC_MCKR_PRES_SHIFT)__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKPMC_FSMR_FSTT8 (0x01 << 8)__USER_LABEL_PREFIX__ __UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffULPMC_FSMR_FSTT3 (0x01 << 3)CHIPID_BASE (0x400E0740U)ADC_BASE (0x40038000U)__INT_LEAST8_MAX__ 0x7f__GCC_ATOMIC_POINTER_LOCK_FREE 2__ARM_FEATURE_QBIT 1__ARM_FEATURE_CLZ 1__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEX__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)CKGR_PLLR_DIV_SHIFT CKGR_PLLAR_DIVA_SHIFTEEFC_FCR_FCMD_SLB (0x08 << 0)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1PMC_FSPR_FSTP15 (0x01 << 15)__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fCKGR_MCFR_MAINFRDY (0x01 << 16)BIT14 (1<<14)PMC_SR_LOCK PMC_SR_LOCKA__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned int__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0__SCHAR_WIDTH__ 8PMC_FSPR_FSTP7 (0x01 << 7)BIT18 (1<<18)UINT_FAST16_MAX__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)TC3_BASE (0x40014000U)__INT32_MAX__ 0x7fffffffLUINTMAX_MAXBIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLPMC_PCK2_CSS_SHIFT 0__ARM_FEATURE_BF16_VECTOR_ARITHMETIC__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN____USFRACT_FBIT__ 8INT8_MAX __INT8_MAX__BIT28 (1<<28)CKGR_PLLR_MUL_MASK CKGR_PLLAR_MULA_MASK__GCC_ATOMIC_CHAR16_T_LOCK_FREE 2__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0PMC_MCKR_PRES_CLK_2 (1 << PMC_MCKR_PRES_SHIFT)__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64UINTPTR_MAX__LDBL_DENORM_MIN__ 4.9406564584124654e-324L__INT64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_SAT 1__ULLFRACT_IBIT__ 0TC1_BASE (0x40010040U)MMIO16(addr) (*(volatile uint16_t *)(addr))PMC_IMR_MCKRDY (0x01 << 3)__GNUC__ 12WCHAR_MAX__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16EEFC_FCR_FCMD_CLB (0x09 << 0)__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0UPMC_FSPR_FSTP9 (0x01 << 9)__UQQ_IBIT__ 0PMC_MCKR_PRES_CLK_3 (7 << PMC_MCKR_PRES_SHIFT)PMC_FSMR_FSTT15 (0x01 << 15)__GCC_ATOMIC_LONG_LOCK_FREE 2__ULACCUM_MIN__ 0.0ULKPMC_SR_MOSCSELS (0x01 << 16)__LDBL_MAX__ 1.7976931348623157e+308L__ARM_ARCH 7__FLT_RADIX__ 2BIT3 (1<<3)long long int__FLT_EPSILON__ 1.1920928955078125e-7F__ARM_FEATURE_CMSEPMC_WPMR MMIO32(PMC_BASE + 0x00E4)INTPTR_MAXUSART1_BASE (0x40028000U)__LDBL_HAS_QUIET_NAN__ 1__LONG_LONG_WIDTH__ 64BIT6 (1<<6)PMC_SR_PCKRDY1 (0x01 << 9)PMC_PCK0_CSS_PLLA_CLK (2 << PMC_PCK0_CSS_SHIFT)PMC_FOCR MMIO32(PMC_BASE + 0x0078)__UINT_FAST64_MAX__ 0xffffffffffffffffULL__ARM_FPCKGR_MOR_MOSCRCF_8MHZ (1 << CKGR_MOR_MOSCRCF_SHIFT)__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64PMC_PCK0_PRES_CLK_8 (3 << PMC_PCK0_PRES_SHIFT)__INTMAX_C(c) c ## LL__INT_WIDTH__ 32PMC_PCK1_CSS_SLOW_CLK (0 << PMC_PCK1_CSS_SHIFT)PMC_SR_CFDS (0x01 << 19)__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4DACC_BASE (0x4003C000U)__UFRACT_MAX__ 0XFFFFP-16URINT64_MAXPMC_IDR_MOSCXTS (0x01 << 0)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0PMC_FSPR_FSTP6 (0x01 << 6)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__waitEEFC_FSR_FLOCKE (0x01 << 2)__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)__LDBL_MAX_10_EXP__ 308PMC_FSMR_FSTT10 (0x01 << 10)__INT_FAST32_TYPE__ intunsigned intCKGR_MCFR MMIO32(PMC_BASE + 0x0024)__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1__USACCUM_IBIT__ 8CKGR_MOR_MOSCRCF_12MHZ (2 << CKGR_MOR_MOSCRCF_SHIFT)__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UKPMC_PCK2_PRES_CLK_32 (5 << PMC_PCK2_PRES_SHIFT)MCK_SRC_SLOW__FLT_EVAL_METHOD__ 0__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32PMC_SCSR_PCK1 (0x01 << 9)__ARM_FEATURE_LDREXPMC_PCK1_PRES_CLK_2 (1 << PMC_PCK1_PRES_SHIFT)__UQQ_FBIT__ 8PMC_SCER_PCK0 (0x01 << 8)INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0EEFC_BASE (0x400E0A00U)INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1__ARM_FEATURE_IDIV 1__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__PMC_FSMR_FSTT11 (0x01 << 11)__UINT8_TYPE__ unsigned char__ARM_FEATURE_COPROC 15PMC_PCK1_PRES_MASK (0x07 << PMC_PCK1_PRES_SHIFT)UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINtrue 1PMC_PCK2_CSS_MCK (4 << PMC_PCK2_CSS_SHIFT)__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)PMC_PCK1_PRES_CLK_64 (6 << PMC_PCK1_PRES_SHIFT)SAM3N_MEMORYMAP_H __LDBL_MIN_10_EXP__ (-307)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1pmc_plla_config__LFRACT_EPSILON__ 0x1P-31LRPMC_FSPR_FSTP13 (0x01 << 13)PMC_PCK2 MMIO32(PMC_BASE + 0x0048)__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX__PMC_OCR_CAL4_SHIFT 0__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32xPMC_MCKR_CSS_SLOW_CLK (0 << PMC_MCKR_CSS_SHIFT)__arm__ 1__FLT32_MIN_10_EXP__ (-37)PMC_WPMR_WPKEY (0x504D43 << PMC_WPMR_WPKEY_SHIFT)MMIO64(addr) (*(volatile uint64_t *)(addr))__ARM_FP16_FORMAT_ALTERNATIVEPMC_SCDR_PCK0 (0x01 << 8)__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MIN__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)__TA_IBIT__ 64EEFC_FCR_FKEY (0x5A << 24)PMC_SR_PCKRDY0 (0x01 << 8)PMC_FSPR_FSTP2 (0x01 << 2)SAM3N 1__ARM_FEATURE_QRDMXEEFC_FMR_FAM (0x01 << 24)SMC_BASE (0x400E0000U)__ARM_ARCH_ISA_THUMB 2PMC_SCER_PCK2 (0x01 << 10)PMC_SCSR_PCK0 (0x01 << 8)__LONG_LONG_MAX__ 0x7fffffffffffffffLLPMC_PCK0_PRES_CLK_1 (0 << PMC_PCK0_PRES_SHIFT)__WINT_WIDTH__ 32WDT_BASE (0x400E1450U)BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0__ARM_32BIT_STATE 1_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1INT8_MIN (-INT8_MAX - 1)EEFC_FCR_FCMD_WP (0x01 << 0)PMC_OCR MMIO32(PMC_BASE + 0x0110)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 2__FLT32_DIG__ 6__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)INT_LEAST16_MAXBIT15 (1<<15)CKGR_MOR_MOSCSEL (0x01 << 24)EEFC_FSR(port) MMIO32((port) + 0x08)PMC_PCK2_PRES_CLK_2 (1 << PMC_PCK2_PRES_SHIFT)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1INT32_MAXPMC_OCR_CAL4_MASK (0x7F << PMC_OCR_CAL12_SHIFT)PMC_PCER MMIO32(PMC_BASE + 0x0010)__ACCUM_MIN__ (-0X1P15K-0X1P15K)INT16_MAX__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intPMC_PCK0_PRES_CLK_16 (4 << PMC_PCK0_PRES_SHIFT)CKGR_MOR_CFDEN (0x01 << 25)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULLCKGR_PLLR CKGR_PLLAR__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2PMC_FSMR_FSTT1 (0x01 << 1)UART0_BASE (0x400E0600U)__ORDER_LITTLE_ENDIAN__ 1234EEFC_FRR(port) MMIO32((port) + 0x0C)EEFC_FCR_FCMD_GETD (0x00 << 0)__FLT_NORM_MAX__ 3.4028234663852886e+38Flong long unsigned int__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int__APCS_32__ 1__DQ_FBIT__ 63INT_LEAST64_MAX__SACCUM_IBIT__ 8PMC_IDR_PCKRDY0 (0x01 << 8)__UHQ_IBIT__ 0INT_LEAST8_MINPMC_FSPR_FSTP11 (0x01 << 11)GPBR_BASE (0x400E1490U)BIT29 (1<<29)PMC_PCK2_PRES_CLK_64 (6 << PMC_PCK2_PRES_SHIFT)__INT_FAST16_TYPE__ intCKGR_MCFR_MAINF_MASK (0xFFFF << CKGR_MCFR_MAINF_SHIFT)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intEEFC EEFC_BASEeefc_set_latency__FLT32X_DIG__ 15__UTQ_FBIT__ 128__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffPMC_MCKR_PRES_CLK_16 (4 << PMC_MCKR_PRES_SHIFT)PTRDIFF_MAX __PTRDIFF_MAX__PMC_FSPR_FSTP0 (0x01 << 0)startup_timeEEFC_FCR_FCMD_CGPB (0x0C << 0)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKUINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRPIOB_BASE (0x400E1000U)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intPMC_PCK1_PRES_CLK_1 (0 << PMC_PCK1_PRES_SHIFT)WCHAR_MINPMC_IMR_PCKRDY0 (0x01 << 8)PMC_PCK1_CSS_PLL_CLK (2 << PMC_PCK1_CSS_SHIFT)BEGIN_DECLS PMC_SR_PCKRDY2 (0x01 << 10)PMC_IMR_MOSCSELS (0x01 << 16)PMC_MCKR_PRES_SHIFT 4CKGR_MOR_MOSCXTEN (0x01 << 0)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15PMC_PCK1_PRES_CLK_4 (2 << PMC_PCK1_PRES_SHIFT)__FLT32X_MAX__ 1.7976931348623157e+308F32x__ARM_EABI__ 1SUPC_BASE (0x400E1410U)INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1../common/pmc.cWINT_MIN __WINT_MIN__PMC_PCK2_CSS_PLLA_CLK (2 << PMC_PCK2_CSS_SHIFT)PMC_IDR MMIO32(PMC_BASE + 0x0064)__QQ_IBIT__ 0LIBOPENCM3_PMC_COMMON_3N3U_H PMC_PCK0_CSS_MAIN_CLK (1 << PMC_PCK0_CSS_SHIFT)PMC_FSMR_FSTT6 (0x01 << 6)__LLACCUM_FBIT__ 31__UINTMAX_TYPE__ long long unsigned intCKGR_MCFR_MAINF_SHIFT 0__USQ_IBIT__ 0__UINT_LEAST32_TYPE__ long unsigned int__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 2SAM_MEMORYMAP_H PMC_IDR_LOCKA (0x01 << 1)INTMAX_MAX__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1PMC_MCKR_CSS_SHIFT 0__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CPMC_IER_CFDEV (0x01 << 18)INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intPMC_PCK1_CSS_PLLA_CLK (2 << PMC_PCK1_CSS_SHIFT)UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULREEFC_FSR_FRDY (0x01 << 0)__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned intPMC_PCDR MMIO32(PMC_BASE + 0x0014)__INT64_C(c) c ## LLPMC_IMR_PCKRDY2 (0x01 << 10)PMC_PCK2_CSS_SLOW_CLK (0 << PMC_PCK2_CSS_SHIFT)__LONG_MAX__ 0x7fffffffLPMC_IER_PCKRDY2 (0x01 << 10)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16PMC_PCK0_PRES_CLK_2 (1 << PMC_PCK0_PRES_SHIFT)UART1_BASE (0x400E0800U)PMC_FSMR_FSTT5 (0x01 << 5)pmc_clock_setup_in_xtal_12mhz_out_84mhzshort int__UINT16_C(c) c__UDA_IBIT__ 32PMC_PCK2_PRES_CLK_1 (0 << PMC_PCK2_PRES_SHIFT)UINT_LEAST32_MAXBIT2 (1<<2)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCmck_src__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53PMC_OCR_SEL12 (0x01 << 23)TWI1_BASE (0x4001C000U)BIT5 (1<<5)BIT1 (1<<1)INT8_CLIBOPENCM3_PMC_H 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CKGR_PLLAR_ONE__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPROD__thumb2__ 1pmc_peripheral_clock_enableTC4_BASE (0x40014040U)CKGR_PLLAR_DIVA_MASK (0xFF << CKGR_PLLAR_DIVA_SHIFT)PMC_IER_MOSCSELS (0x01 << 16)PMC_MCKR_CSS_PLLA_CLK (2 << PMC_MCKR_CSS_SHIFT)__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H PMC_IDR_LOCK PMC_IDR_LOCKAPMC_SR_LOCKA (0x01 << 1)PMC_FSPR_FSTP10 (0x01 << 10)INT_LEAST64_MIN__GCC_CONSTRUCTIVE_SIZE 64__LLFRACT_IBIT__ 0PMC_PCK2_CSS_PLL_CLK (2 << PMC_PCK2_CSS_SHIFT)uint32_tBIT12 (1<<12)PMC_FSMR_FSTT14 (0x01 << 14)__SACCUM_EPSILON__ 0x1P-7HKPMC_FSPR_FSTP4 (0x01 << 4)__GCC_ASM_FLAG_OUTPUTS__ 1PMC_OCR_CAL8_SHIFT 8__UINT_FAST16_TYPE__ unsigned intPMC_FSMR_FSTT0 (0x01 << 0)__UHA_IBIT__ 8PMC_WPMR_WPEN (0x01 << 0)__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXBIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MINPMC_FSMR_FSTT12 (0x01 << 12)__FLT64_DIG__ 15__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 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7memory_manage_fault_stack__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__FLT_EPSILON__ 1.1920928955078125e-7F__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAX__LDBL_HAS_QUIET_NAN__ 1SCB_CFSR_UNDEFINSTR (1 << 16)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)SCB_CPUID_IMPLEMENTER_LSB 24SCB_ID_ISAR4 MMIO32(SCB_BASE + 0x70)__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xSCB_CCR_DIV_0_TRP (1 << 4)__FLT64_MAX_EXP__ 1024UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LL__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4__UFRACT_MAX__ 0XFFFFP-16URNVIC_USART0_IRQ 14blocking_handlerFPB_BASE (PPBI_BASE + 0x2000)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0STIR_BASE (SCS_BASE + 0x0F00)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX 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(1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0__ARM_32BIT_STATE 1_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4SCB_CPUID_CONSTANT_ARMV7 (0xF << SCB_CPUID_CONSTANT_LSB)__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1SCB_ID_MMFR1 MMIO32(SCB_BASE + 0x54)INT_FAST32_MIN (-INT_FAST32_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 2__FLT32_DIG__ 6INT_LEAST16_MAXSCB_ICSR_VECTPENDING (0x1FF << SCB_ICSR_VECTPENDING_LSB)BIT15 (1<<15)NVIC_SYSTICK_IRQ -1BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1INT32_MAX__ACCUM_MIN__ (-0X1P15K-0X1P15K)__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intSCB_CPUID_REVISION (0xF << SCB_CPUID_REVISION_LSB)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0SCB_CPACR_PRIV 1UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234__FLT_NORM_MAX__ 3.4028234663852886e+38FSCB_ICSR_VECTACTIVE_LSB 0long long unsigned intSCB_AIRCR_PRIGROUP_NOGROUP_SUB16 (0x7 << 8)BIT31 (1<<31)SCB_SHCSR_MONITORACT (1 << 8)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int__APCS_32__ 1__DQ_FBIT__ 63SCB_SHPR_PRI_8_RESERVED 4INT_LEAST64_MAX__SACCUM_IBIT__ 8NVIC_TC1_IRQ 24__UHQ_IBIT__ 0NVIC_RESERVED4_IRQ 18INT_LEAST8_MINSCB_FPDSCR MMIO32(SCB_BASE + 0x23C)SCB_AIRCR_SYSRESETREQ (1 << 2)__INT_FAST16_TYPE__ intINT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRSCB_SHCSR_BUSFAULTPENDED (1 << 14)_data_loadaddr__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15__UTQ_FBIT__ 128LIBOPENCM3_SCB_H __FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffPTRDIFF_MAX __PTRDIFF_MAX__SCB_CFSR_PRECISERR (1 << 9)NVIC_TWI0_IRQ 19__FLT32_DECIMAL_DIG__ 9__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKUINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRSCB_CFSR_IBUSERR (1 << 8)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intNVIC_ISPR(ispr_id) MMIO32(NVIC_BASE + 0x100 + ((ispr_id) * 4))WCHAR_MINBEGIN_DECLS __LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKINT_LEAST64_MIN (-INT_LEAST64_MAX - 1)../../cm3/vector.c__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15NVIC_RESERVED3_IRQ 17__FLT32X_MAX__ 1.7976931348623157e+308F32xLIBOPENCM3_SAM3N_NVIC_H SCB_ICSR_ISRPREEMPT (1 << 23)__ARM_EABI__ 1INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1INT64_MIN (-INT64_MAX - 1)destSCB_GET_EXCEPTION_STACK_FRAME(f) do { asm volatile ("mov %[frameptr], sp" : [frameptr]"=r" (f)); } while (0)__QQ_IBIT__ 0SCB_SHPR_PRI_14_PENDSV 10SCB_SHPR_PRI_12_RESERVED 8__LLACCUM_FBIT__ 31_datainitial_sp_value__UINTMAX_TYPE__ long long unsigned int__USQ_IBIT__ 0SCB_CPUID_PARTNO (0xFFF << SCB_CPUID_PARTNO_LSB)__UINT_LEAST32_TYPE__ long unsigned int__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 2NVIC_PIOA_IRQ 11SCB_AIRCR_PRIGROUP_GROUP16_NOSUB (0x3 << 8)INTMAX_MAX__ARM_FEATURE_FP16_SCALAR_ARITHMETICNVIC_SV_CALL_IRQ -5__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_Creserved_x001c__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intNVIC_NMI_IRQ -14UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULR__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned int__INT64_C(c) c ## LLSCB_CPUID_IMPLEMENTER (0xFF << SCB_CPUID_IMPLEMENTER_LSB)__LDBL_MIN_10_EXP__ (-307)systickTPIU_BASE (PPBI_BASE + 0x40000)__LDBL_MIN__ 2.2250738585072014e-308LSCB_CFSR MMIO32(SCB_BASE + 0x28)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16funcp_tCORESIGHT_LAR_OFFSET 0xfb0SCB_CFSR_IMPRECISERR (1 << 10)SCB_SHPR_PRI_15_SYSTICK 11short intSCB_CFSR_UNSTKERR (1 << 11)__UINT16_C(c) c__UDA_IBIT__ 32UINT_LEAST32_MAX__UINT32_TYPE__ long unsigned intBIT2 (1<<2)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCsv_call__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53NVIC_SUPC_IRQ 0reserved_x0034BIT5 (1<<5)NVIC_RTC_IRQ 2BIT1 (1<<1)INT8_CINT_LEAST32_MAXSCB_CFSR_MSTKERR (1 << 4)__USES_INITFINI__ 1__DBL_DECIMAL_DIG__ 17BIT8 (1<<8)INT16_C(c) __INT16_C(c)__INT16_MAX__ 0x7fffSCB_SHCSR_MEMFAULTPENDED (1 << 13)__INT_WIDTH__ 32SCB_SHPR_PRI_11_SVCALL 7__QQ_FBIT__ 7__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64__ULLACCUM_IBIT__ 32SCB_VTOR MMIO32(SCB_BASE + 0x08)__ULLFRACT_EPSILON__ 0x1P-64ULLRfalse 0__SIZEOF_WINT_T__ 4SCB_CPUID_CONSTANT_ARMV6 (0xC << SCB_CPUID_CONSTANT_LSB)__ARM_FEATURE_UNALIGNED 1__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17SCB_HFSR MMIO32(SCB_BASE + 0x2C)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1SCB_CFSR_DIVBYZERO (1 << 25)__FLT32X_HAS_DENORM__ 1__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32SCB_HFSR_DEBUG_VT (1 << 31)__ARM_ASM_SYNTAX_UNIFIED__ 1SCB_AIRCR_VECTKEYSTAT_LSB 16INTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPROD__thumb2__ 1DEBUG_MONITOR_IRQ -4SCB_ID_ISAR3 MMIO32(SCB_BASE + 0x6C)NVIC_IABR(iabr_id) MMIO32(NVIC_BASE + 0x200 + ((iabr_id) * 4))SCB_CCR_STKALIGN (1 << 9)__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H INT_LEAST64_MIN__GCC_CONSTRUCTIVE_SIZE 64__LLFRACT_IBIT__ 0SCB_SHPR_PRI_10_RESERVED 6uint32_tBIT12 (1<<12)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HK__GCC_ASM_FLAG_OUTPUTS__ 1__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULKSCB_CPUID_PARTNO_LSB 4__LDBL_DIG__ 15UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXBIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8__INT_LEAST16_TYPE__ short int__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1SCB_CFSR_UNALIGNED (1 << 24)UINTMAX_CSCB_SHPR_PRI_7_RESERVED 3INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1__UINTPTR_MAX__ 0xffffffffU__HQ_FBIT__ 15__bool_true_false_are_defined 1BIT26 (1<<26)IRQ_HANDLERS [NVIC_SUPC_IRQ] = supc_isr, [NVIC_RSTC_IRQ] = rstc_isr, [NVIC_RTC_IRQ] = rtc_isr, [NVIC_RTT_IRQ] = rtt_isr, [NVIC_WDT_IRQ] = wdt_isr, [NVIC_PMC_IRQ] = pmc_isr, [NVIC_EEFC_IRQ] = eefc_isr, [NVIC_RESERVED0_IRQ] = reserved0_isr, [NVIC_UART0_IRQ] = uart0_isr, [NVIC_UART1_IRQ] = uart1_isr, [NVIC_RESERVED1_IRQ] = reserved1_isr, [NVIC_PIOA_IRQ] = pioa_isr, [NVIC_PIOB_IRQ] = piob_isr, [NVIC_PIOC_IRQ] = pioc_isr, [NVIC_USART0_IRQ] = usart0_isr, [NVIC_USART1_IRQ] = usart1_isr, [NVIC_RESERVED2_IRQ] = reserved2_isr, [NVIC_RESERVED3_IRQ] = reserved3_isr, [NVIC_RESERVED4_IRQ] = reserved4_isr, [NVIC_TWI0_IRQ] = twi0_isr, [NVIC_TWI1_IRQ] = twi1_isr, [NVIC_SPI_IRQ] = spi_isr, [NVIC_RESERVED5_IRQ] = reserved5_isr, [NVIC_TC0_IRQ] = tc0_isr, [NVIC_TC1_IRQ] = tc1_isr, [NVIC_TC2_IRQ] = tc2_isr, [NVIC_TC3_IRQ] = tc3_isr, [NVIC_TC4_IRQ] = tc4_isr, [NVIC_TC5_IRQ] = tc5_isr, [NVIC_ADC_IRQ] = adc_isr, [NVIC_DACC_IRQ] = dacc_isr, [NVIC_PWM_IRQ] = pwm_isrNVIC_ADC_IRQ 29__SIZE_MAX__ 0xffffffffUreset_handler__ARM_ARCH__LONG_MAX__ 0x7fffffffLSCB_CPACR_FULL 3SCB_CFSR_MMARVALID (1 << 7)SCB_ID_MMFR2 MMIO32(SCB_BASE + 0x58)__ARM_FEATURE_LDREX 7PTRDIFF_MAXSCB_CCR_BFHFNMIGN (1 << 8)__LLFRACT_EPSILON__ 0x1P-63LLR__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53__WCHAR_WIDTH__ 32WINT_MAX__INT16_C(c) cSCB_ID_ISAR0 MMIO32(SCB_BASE + 0x60)INT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32__ATOMIC_ACQ_REL 4NVIC_TC3_IRQ 26__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)__fini_array_startSCB_SHCSR_SVCALLACT (1 << 7)NVIC_STIR MMIO32(STIR_BASE)__FLT32_NORM_MAX__ 3.4028234663852886e+38F32UINT64_C(c) __UINT64_C(c)NVIC_PWM_IRQ 31__UINTMAX_MAX__ 0xffffffffffffffffULLSCB_ICSR_PENDSVCLR (1 << 27)__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0vector_table_entry_tINT_FAST16_MAXITR_BASE (SCS_BASE + 0x0000)__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long intNVIC_SPI_IRQ 21__ARM_FEATURE_CDE_COPROCUINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| ”Aƒ„…ŽA,aeabi"7-M M "ñÿ l 02 "$&(*,.47kœÍÿ0^ 36 ¼ Í" á" ó" " " !" *" 2" :" B" J" R" Z" b" p" x" " Š" ˜" ¦" ´" ¿" Ê" Ó" Ü" å" ó" ý" " " " &" ." 6" >" G" P]"s"„"”"¤"°”"¾ÃÒØßåû"3FWÄdvector.c$t$dwm4.0.57a83534070f540be4da8a9a304ce80awm4.memorymap.h.21.8c90486dae5eea2d8efddd23fe5d09d9wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.scb.h.43.8b4f1f26a2f656642be580b6ecb65fcdwm4.nvic.h.38.3b30e3268bee285344f6b283a9023580wm4.nvic.h.16.4c452b38181f39c7e2f2e76d0ddb9bebblocking_handlerusage_fault_handlerbus_fault_handlermem_manage_handlerhard_fault_handlerpwm_isrdacc_isradc_isrtc5_isrtc4_isrtc3_isrtc2_isrtc1_isrtc0_isrreserved5_isrspi_isrtwi1_isrtwi0_isrreserved4_isrreserved3_isrreserved2_isrusart1_isrusart0_isrpioc_isrpiob_isrpioa_isrreserved1_isruart1_isruart0_isrreserved0_isreefc_isrpmc_isrwdt_isrrtt_isrrtc_isrrstc_isrsupc_isrnull_handlerdebug_monitor_handlersys_tick_handlerpend_sv_handlersv_call_handlernmi_handlerreset_handlermain_data_loadaddr_data_edata_ebss__preinit_array_start__preinit_array_end__init_array_start__init_array_end__fini_array_start__fini_array_endvector_table_stack4 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ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN____USFRACT_FBIT__ 8__LDBL_EPSILON__ 2.2204460492503131e-16LBIT28 (1<<28)__pure2 __attribute__((__const__))__GCC_ATOMIC_CHAR16_T_LOCK_FREE 2INTMAX_C(c) __INTMAX_C(c)__NULLABILITY_PRAGMA_PUSH __DBL_MAX_EXP__ 1024SCB_VTOR_TBLOFF_LSB 9__ATOMIC_RELEASE 3SCB_SHCSR_MEMFAULTENA (1 << 16)__FLT32X_HAS_DENORM__ 1__FLT_MANT_DIG__ 24_RAND48_SEED_1 (0xabcd)__UDQ_IBIT__ 0SCB_AIRCR_VECTKEYSTAT (0xFFFF << SCB_AIRCR_VECTKEYSTAT_LSB)___int_ptrdiff_t_h __OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__CC_SUPPORTS___FUNC__ 1__FLT64_NORM_MAX__ 1.7976931348623157e+308F64__GNUCLIKE_MATH_BUILTIN_CONSTANTS SCB_ID_PFR0 MMIO32(SCB_BASE + 0x40)UINTPTR_MAX_T_PTRDIFF_ __LDBL_DENORM_MIN__ 4.9406564584124654e-324L__INT64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_SAT 1__ULLFRACT_IBIT__ 0_ANSI_STDDEF_H _REENT_CHECK_SIGNAL_BUF(ptr) MMIO16(addr) (*(volatile uint16_t *)(addr))UINT16_C(c) __UINT16_C(c)_REENT_SMALL_CHECK_INIT(ptr) __GNUC__ 12SCB_ID_MMFR3 MMIO32(SCB_BASE + 0x5C)WCHAR_MAX__LONG_WIDTH__ 32_T_WCHAR_ INT32_MAX __INT32_MAX____UACCUM_FBIT__ 16__warn_references(sym,msg) __asm__(".section .gnu.warning." #sym); __asm__(".asciz \"" msg "\""); __asm__(".previous")__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0GNU C99 12.2.1 20221205 -mcpu=cortex-m3 -mthumb -mfloat-abi=soft -march=armv7-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsCORESIGHT_LSR_OFFSET 0xfb4_NEWLIB_VERSION_H__ 1__GCC_ATOMIC_LONG_LOCK_FREE 2__ULACCUM_MIN__ 0.0ULK_ATEXIT_DYNAMIC_ALLOC 1__need_size_t__LDBL_MAX__ 1.7976931348623157e+308L__ARM_ARCH 7SCB_CCR_NONBASETHRDENA (1 << 0)_SIZE_T_ __FLT_RADIX__ 2BIT3 (1<<3)__lock_acquire_recursive(lock) ((void) 0)_REENT_RAND48_MULT(ptr) ((ptr)->_new._reent._r48._mult)__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAX__wchar_t__ __LDBL_HAS_QUIET_NAN__ 1SCB_CFSR_UNDEFINSTR (1 << 16)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)__DEFINED_wchar_t SCB_CPUID_IMPLEMENTER_LSB 24__UINT_FAST64_MAX__ 0xffffffffffffffffULLSCB_ID_DFR0 MMIO32(SCB_BASE + 0x48)__ARM_FPSCB_ICSR_PENDSTCLR (1 << 25)_REENT_CHECK_ASCTIME_BUF(ptr) __ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINT_FAST8_MIN (-INT_FAST8_MAX - 1)__strftimelike(fmtarg,firstvararg) __attribute__((__format__ (__strftime__, fmtarg, firstvararg)))__FLT64_MAX_EXP__ 1024__WCHAR_T BIT20 (1<<20)MB_CUR_MAX __locale_mb_cur_max()__FLT64_MIN__ 2.2250738585072014e-308F64___int32_t_defined 1__INT_WIDTH__ 32_HAVE_CC_INHIBIT_LOOP_TO_LIBCALL 1__FLT_MIN_EXP__ (-125)__ARM_ARCH_PROFILE__INT64_TYPE__ long long intSCB_ICSR_VECTACTIVE_LSB 0__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4_PTRDIFF_T __BSD_VISIBLE 0__predict_false(exp) __builtin_expect((exp), 0)__unused __attribute__((__unused__))_REENT_MBSRTOWCS_STATE(ptr) ((ptr)->_new._reent._mbsrtowcs_state)SCB_ICSR_VECTPENDING_LSB 12__UFRACT_MAX__ 0XFFFFP-16UR___int_least64_t_defined 1_Alignof(x) __alignof(x)FPB_BASE (PPBI_BASE + 0x2000)__THROW SCB_SHCSR_BUSFAULTACT (1 << 1)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0_REENT_L64A_BUF(ptr) ((ptr)->_new._reent._l64a_buf)__EXP(x) __ ##x ##____BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX___NOTHROW _ANSIDECL_H_ SYS_TICK_BASE (SCS_BASE + 0x0010)SCB_AIRCR_VECTCLRACTIVE (1 << 1)__SIG_ATOMIC_TYPE__ int__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)__GNUCLIKE_BUILTIN_MEMCPY 1__APCS_32__ 1__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)__INT_FAST32_TYPE__ int__ARM_ARCH_PROFILE 77unsigned int_SIZE_T_DEFINED_ SCB_ID_ISAR2 MMIO32(SCB_BASE + 0x68)SCB_AIRCR_SYSRESETREQ (1 << 2)__NEWLIB_MINOR__ 3_SIZET_ __FLT64_HAS_QUIET_NAN__ 1__USACCUM_IBIT__ 8ITM_BASE (PPBI_BASE + 0x0000)__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UK_FVWRITE_IN_STREAMIO 1_WCHAR_T_DECLARED INT_LEAST8_MAX __INT_LEAST8_MAX___SYS_REENT_H_ __FLT_EVAL_METHOD__ 0SCB_ICSR_ISRPENDING (1 << 22)__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32SCB_SHPR_PRI_6_USAGEFAULT 2_RAND48_MULT_2 (0x0005)__ARM_FEATURE_LDREX_T_PTRDIFF __UQQ_FBIT__ 8INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0__requires_unlocked(...) __lock_annotate(locks_excluded(__VA_ARGS__))INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4_PTRDIFF_T_DECLARED ___int_least8_t_defined 1__ARM_FEATURE_IDIV 1__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__SCB_AIRCR_PRIGROUP_GROUP8_SUB2 (0x4 << 8)_GCC_WCHAR_T SCB_SHCSR_SYSTICKACT (1 << 11)__unlocks(...) __lock_annotate(unlock_function(__VA_ARGS__))__EXPORT __ARM_FEATURE_COPROC 15__OBSOLETE_MATH_DEFAULT 1_Noreturn __dead2UINT64_MAX __UINT64_MAX__false 0__SHRT_WIDTH__ 16_UNBUF_STREAM_OPT 1__IMPORT true 1_ATEXIT_SIZE 32__USA_FBIT__ 16__volatile volatile_MACHINE__TYPES_H __IEEE_LITTLE_ENDIAN __LDBL_MIN_10_EXP__ (-307)INT64_MAX_WANT_REGISTER_FINI 1__FLT_HAS_QUIET_NAN__ 1__ATFILE_VISIBLE 0__GCC_ATOMIC_CHAR_LOCK_FREE 2__LFRACT_IBIT__ 0__LFRACT_EPSILON__ 0x1P-31LR_BEGIN_STD_C __malloc_like __attribute__((__malloc__))__ARM_SIZEOF_MINIMAL_ENUM 1bool _Bool_POINTER_INT long__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1INT_FAST64_MAX__FLT32_MIN_10_EXP__ (-37)SCB_SHCSR_USGFAULTPENDED (1 << 12)__RAND_MAX 0x7fffffff__lock_try_acquire(lock) ((void) 0)__STRING(x) #x_WCHAR_T ../../cm3/scb.cINT8_MAX __INT8_MAX____ARM_FP16_FORMAT_ALTERNATIVE__FBSDID(s) struct __hack__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MIN_MACHINE__DEFAULT_TYPES_H __BIGGEST_ALIGNMENT__ 8/build/libopencm3/lib/sam/3n_GCC_PTRDIFF_T __GNUCLIKE_BUILTIN_NEXT_ARG 1__TA_IBIT__ 64SCB_SHCSR_PENDSVACT (1 << 10)__LOCK_INIT(class,lock) static int lock = 0;_SIZE_T _WCHAR_T_H SCB_AIRCR_PRIGROUP_SHIFT 8__ARM_FEATURE_QRDMXSCB_SHCSR_USGFAULTACT (1 << 3)__ARM_ARCH_ISA_THUMB 2__LONG_LONG_MAX__ 0x7fffffffffffffffLL_FSEEK_OPTIMIZATION 1SCB_CFSR_MUNSTKERR (1 << 3)__WINT_WIDTH__ 32__arg_type_tag(arg_kind,arg_idx,type_tag_idx) __USQ_IBIT__ 0_REENT_INIT_PTR(var) { memset((var), 0, sizeof(*(var))); _REENT_INIT_PTR_ZEROED(var); }STIR_BASE (SCS_BASE + 0x0F00)__COPYRIGHT(s) struct __hack__UFRACT_IBIT__ 0__ARM_32BIT_STATE 1_REENT_MBRLEN_STATE(ptr) ((ptr)->_new._reent._mbrlen_state)_GCC_STDINT_H __INT8_C(c) c__scanflike(fmtarg,firstvararg) __attribute__((__format__ (__scanf__, fmtarg, firstvararg)))INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)_STDDEF_H_ INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__DBL_MIN_EXP__ (-1021)__SIZE_T SCB_CPUID MMIO32(SCB_BASE + 0x00)SCB_ID_MMFR1 MMIO32(SCB_BASE + 0x54)INT8_MIN (-INT8_MAX - 1)__printf0like(fmtarg,firstvararg) SCB_AIRCR_PRIGROUP_MASK (0x7 << 8)__FLT32_DIG__ 6INT_LEAST16_MAX__dead2 __attribute__((__noreturn__))BIT15 (1<<15)__compar_fn_t_defined __EXP___int64_t_defined 1__LDBL_HAS_DENORM__ 1__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1INT32_MAX__BEGIN_DECLS __ACCUM_MIN__ (-0X1P15K-0X1P15K)_REENT_CHECK_MISC(ptr) __GNUC_VA_LIST_COMPATIBILITY 1__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intSCB_SHCSR_MEMFAULTPENDED (1 << 13)SCB_CPUID_REVISION (0xF << SCB_CPUID_REVISION_LSB)UINT_LEAST16_MAXBIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0SCB_CFSR_DACCVIOL (1 << 1)SCB_CPACR_PRIV 1UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2__NEWLIB_PATCHLEVEL__ 0BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234__size_t__CC_SUPPORTS_INLINE 1__DOTS , ...long long unsigned int__alloc_size(x) __attribute__((__alloc_size__(x)))BIT31 (1<<31)SCB_SHCSR_MONITORACT (1 << 8)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int_SIZE_T_DEFINED __DQ_FBIT__ 63SCB_SHPR_PRI_8_RESERVED 4__GNU_VISIBLE 0INT_LEAST64_MAX__SACCUM_IBIT__ 8SCB_CFSR_INVPC (1 << 18)__PTRDIFF_T __UHQ_IBIT__ 0INT_LEAST8_MIN_REENT_WCTOMB_STATE(ptr) ((ptr)->_new._reent._wctomb_state)SCB_FPDSCR MMIO32(SCB_BASE + 0x23C)BIT29 (1<<29)__INT_FAST16_TYPE__ int__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRSCB_SHCSR_BUSFAULTPENDED (1 << 14)__UINT_LEAST16_TYPE__ short unsigned intUINT16_MAX__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intSCB_ID_MMFR2 MMIO32(SCB_BASE + 0x58)__FLT32X_DIG__ 15__signed signedSCB_BFAR MMIO32(SCB_BASE + 0x38)__UTQ_FBIT__ 128LIBOPENCM3_SCB_H _REENT_ASCTIME_BUF(ptr) ((ptr)->_new._reent._asctime_buf)__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffff__have_longlong64 1PTRDIFF_MAX __PTRDIFF_MAX__SCB_CFSR_PRECISERR (1 << 9)_REENT_MP_P5S(ptr) ((ptr)->_p5s)INT8_MINUINTPTR_MAX __UINTPTR_MAX___WCHAR_T_DEFINED __ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK__trylocks_exclusive(...) __lock_annotate(exclusive_trylock_function(__VA_ARGS__))SCB_ICSR_VECTPENDING (0x1FF << SCB_ICSR_VECTPENDING_LSB)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRSCB_CFSR_IBUSERR (1 << 8)BIT26 (1<<26)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long int__always_inline __inline__ __attribute__((__always_inline__))INT32_MIN__containerof(x,s,m) ({ const volatile __typeof(((s *)0)->m) *__x = (x); __DEQUALIFY(s *, (const volatile char *)__x - __offsetof(s, m));})SCB_ID_AFR0 MMIO32(SCB_BASE + 0x4C)_BSD_SIZE_T_ __HA_IBIT__ 8SCB_CPUID_REVISION_LSB 0__no_lock_analysis __lock_annotate(no_thread_safety_analysis)_WCHAR_T_ _REENT_STDIO_STREAM(var,index) &(var)->__sf[index]_T_WCHAR _CLOCKID_T_ unsigned long_REENT_CHECK_TM(ptr) SCB_VTOR MMIO32(SCB_BASE + 0x08)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__INT_WCHAR_T_H __FLT32X_MAX__ 1.7976931348623157e+308F32xSCB_ICSR_ISRPREEMPT (1 << 23)__ARM_EABI__ 1INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1SCB_GET_EXCEPTION_STACK_FRAME(f) do { asm volatile ("mov %[frameptr], sp" : [frameptr]"=r" (f)); } while (0)__QQ_IBIT__ 0__ARMEL__ 1SCB_SHPR_PRI_12_RESERVED 8__LLACCUM_FBIT__ 31scb_reset_system__UINTMAX_TYPE__ long long unsigned int__FLT32X_MIN_10_EXP__ (-307)__GNUC_MINOR__ 2__lock_release_recursive(lock) ((void) 0)__UINT_LEAST32_TYPE__ long unsigned int__ARM_FEATURE_NUMERIC_MAXMIN_RAND48_MULT_1 (0xdeec)__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 2SCB_HFSR_DEBUG_VT (1 << 31)_RAND48_SEED_0 (0x330e)SCB_AIRCR_PRIGROUP_GROUP16_NOSUB (0x3 << 8)INTMAX_MAXID_BASE (SCS_BASE + 0x0FD0)__Long long__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__FLT_NORM_MAX__ 3.4028234663852886e+38F_STDLIB_H_ __DBL_HAS_QUIET_NAN__ 1UINT_LEAST32_MAXSCB_CCR_USERSETMPEND (1 << 1)__ptrvalue _NOINLINE_STATIC _NOINLINE static__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_C_PTRDIFF_T_ INT64_MINSCB_CFSR_NOCP (1 << 19)__SACCUM_MAX__ 0X7FFFP-7HK_GLOBAL_REENT _global_impure_ptrUINT8_C__UINTPTR_TYPE__ unsigned intUINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULR__RCSID(s) struct __hackWCHAR_MAX __WCHAR_MAX__WCHAR_MIN__SIZEOF_SIZE_T__ 4__lock_close_recursive(lock) ((void) 0)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__GNUCLIKE___OFFSETOF 1__INT64_C(c) c ## LL__GNUCLIKE_CTOR_SECTION_HANDLING 1__lockable __lock_annotate(lockable)__END_DECLS TPIU_BASE (PPBI_BASE + 0x40000)__generic(expr,t,yes,no) __builtin_choose_expr( __builtin_types_compatible_p(__typeof(expr), t), yes, no)__LONG_MAX__ 0x7fffffffLSCB_CFSR MMIO32(SCB_BASE + 0x28)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16unsignedCORESIGHT_LAR_OFFSET 0xfb0SCB_CFSR_IMPRECISERR (1 << 10)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)SCB_SHPR_PRI_15_SYSTICK 11short int_STDDEF_H __pt_guarded_by(x) __lock_annotate(pt_guarded_by(x))__guarded_by(x) __lock_annotate(guarded_by(x))__UINT16_C(c) c__FLT64_MIN_EXP__ (-1021)_REENT_INIT_ATEXIT _NULL, _ATEXIT_INIT,__CC_SUPPORTS___INLINE__ 1__UDA_IBIT__ 32__printflike(fmtarg,firstvararg) __attribute__((__format__ (__printf__, fmtarg, firstvararg)))__fastcall __attribute__((__fastcall__))__lock_annotate(x) BIT2 (1<<2)_REENT_SIGNAL_BUF(ptr) ((ptr)->_new._reent._signal_buf)__ATOMIC_RELAXED 0_ATTRIBUTE(attrs) __attribute__ (attrs)__ARM_FEATURE_COPROC__ATTRIBUTE_IMPURE_PTR__ __DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX___RAND48_MULT_0 (0xe66d)CORESIGHT_LSR_SLI (1<<0)BIT5 (1<<5)BIT1 (1<<1)__rangeof(type,start,end) (__offsetof(type, end) - __offsetof(type, start))INT8_CINT_LEAST32_MAXSCB_CFSR_MSTKERR (1 << 4)__USES_INITFINI__ 1__lock_init(lock) ((void) 0)__need_ptrdiff_tINTMAX_MAX __INTMAX_MAX____DBL_DECIMAL_DIG__ 17__have_long32 1_NULL 0__flexarr [0]INT16_C(c) __INT16_C(c)__INT16_MAX__ 0x7fff__SYS_CONFIG_H__ __DEVOLATILE(type,var) ((type)(__uintptr_t)(volatile void *)(var))__WCHAR_T__ __SSP_FORTIFY_LEVEL 0__GNUCLIKE_BUILTIN_STDARG 1__XSI_VISIBLE 0INT_FAST32_MIN (-INT_FAST32_MAX - 1)__QQ_FBIT__ 7SCB_ID_ISAR4 MMIO32(SCB_BASE + 0x70)__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64__GNUC_PREREQ__(ma,mi) __GNUC_PREREQ(ma, mi)__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32__ARM_FEATURE_CRC32__strong_reference(sym,aliassym) extern __typeof (sym) aliassym __attribute__ ((__alias__ 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1)__UHQ_FBIT__ 16NVIC_RESERVED2_IRQ 16__PTRDIFF_WIDTH__ 32__UINT_FAST8_MAX__ 0xffffffffUSCB_ID_DFR0 MMIO32(SCB_BASE + 0x48)UINT16_C(c) __UINT16_C(c)__LACCUM_IBIT__ 32__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1__LLFRACT_MIN__ (-0.5LLR-0.5LLR)INT_FAST8_MAXSCB_SHPR_PRI_9_RESERVED 5__UINT_FAST16_MAX__ 0xffffffffU__INTPTR_MAX__ 0x7fffffffINT64_C(c) __INT64_C(c)__GCC_IEC_559_COMPLEX 0__UFRACT_MIN__ 0.0URWCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__/build/libopencm3/lib/sam/3n__UINT_LEAST8_TYPE__ unsigned char__ACCUM_FBIT__ 15SCB_SCR_SLEEPONEXIT (1 << 1)__UACCUM_IBIT__ 16long intUINT8_MAXSCB_MMFAR MMIO32(SCB_BASE + 0x34)SIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1NVIC_RESERVED1_IRQ 10__FLT32X_EPSILON__ 2.2204460492503131e-16F32x__UINT_FAST64_MAX__ 0xffffffffffffffffULL__ARM_ARCH_7M__ 1NVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed charNVIC_MEM_MANAGE_IRQ -12__GCC_ATOMIC_BOOL_LOCK_FREE 2BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128SCB_BFAR MMIO32(SCB_BASE + 0x38)__THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLR__FLT64_DECIMAL_DIG__ 17short unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__DBL_IS_IEC_60559__ 2__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4SCB_SCR_SLEEPDEEP (1 << 2)__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32SCB_SHCSR_MEMFAULTENA (1 << 16)SCB_HFSR_VECTTBL (1 << 1)BIT27 (1<<27)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"__UTA_FBIT__ 64INTMAX_C(c) __INTMAX_C(c)__FLT_DECIMAL_DIG__ 9__thumb__ 1__INT_LEAST32_MAX__ 0x7fffffffLsigned charuint8_tINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLK__GNUC_PATCHLEVEL__ 1NVIC_EEFC_IRQ 6PTRDIFF_MINSCB_CPUID_VARIANT_LSB 20__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)SCB_CPACR_CP10 (1 << 20)UINTPTR_MAX __UINTPTR_MAX____ARM_ARCH_PROFILE 77NVIC_TWI1_IRQ 20__FLT64_MAX_10_EXP__ 308MMIO32(addr) (*(volatile uint32_t *)(addr))NVIC_PIOC_IRQ 13SCB_CFSR_MUNSTKERR (1 << 3)__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38__SIG_ATOMIC_TYPE__ intSCB_SCR MMIO32(SCB_BASE + 0x10)__FRACT_MAX__ 0X7FFFP-15Rnvic_set_priorityINT_LEAST32_MAX __INT_LEAST32_MAX____INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5SCB_CPACR MMIO32(SCB_BASE + 0x88)NVIC_USAGE_FAULT_IRQ -10NVIC_IPR(ipr_id) MMIO8(NVIC_BASE + 0x300 + (ipr_id))__UINT16_MAX__ 0xffff__TQ_FBIT__ 127__USQ_FBIT__ 32uint16_tWCHAR_MAX__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32SCB_SHCSR MMIO32(SCB_BASE + 0x24)INT_FAST32_MIN (-INT_FAST32_MAX - 1)__STRICT_ANSI__ 1NVIC_SYSTICK_IRQ -1UINT_LEAST8_MAXINT_LEAST8_MAXSCB_VTOR_TBLOFF (0x7FFFFF << SCB_VTOR_TBLOFF_LSB)UINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8SCB_ID_ISAR1 MMIO32(SCB_BASE + 0x64)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__SCB_SHCSR_PENDSVACT (1 << 10)__USA_IBIT__ 16__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 1PTRDIFF_MIN (-PTRDIFF_MAX - 1)__SFRACT_MAX__ 0X7FP-7HR__UINT_FAST64_TYPE__ long long unsigned intSCB_CPACR_PRIV 1__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC____FLT32_IS_IEC_60559__ 2INT_FAST64_MINNVIC_WDT_IRQ 4__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16L__USFRACT_MIN__ 0.0UHRSCB_SHCSR_BUSFAULTENA (1 << 17)__ARM_NEON__UINT8_MAX__ 0xff__LDBL_MAX_EXP__ 1024SCB_SHCSR_USGFAULTENA (1 << 18)SCB_ICSR_RETOBASE (1 << 11)__DBL_HAS_DENORM__ 1SCB_ICSR_PENDSVSET (1 << 28)NVIC_TC4_IRQ 27__DA_FBIT__ 31__GXX_ABI_VERSION 1017__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45F__ULLACCUM_EPSILON__ 0x1P-32ULLKSCB_SHCSR_MEMFAULTACT (1 << 0)INT_LEAST8_MAX __INT_LEAST8_MAX____UINT32_C(c) c ## ULUINTMAX_MAX__UACCUM_MIN__ 0.0UK__FLT_EPSILON__ 1.1920928955078125e-7FNVIC_IRQ_COUNT 32SCB_CPUID_VARIANT (0xF << SCB_CPUID_VARIANT_LSB)__DBL_MAX_10_EXP__ 308NVIC_PIOB_IRQ 12__ARM_ARCH_ISA_THUMBSCB_ID_AFR0 MMIO32(SCB_BASE + 0x4C)LIBOPENCM3_CM3_MEMORYMAP_H __GCC_ATOMIC_SHORT_LOCK_FREE 2SCB_FPCAR MMIO32(SCB_BASE + 0x238)__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1NVIC_TC2_IRQ 25__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)SCB_CPUID_CONSTANT (0xF << SCB_CPUID_CONSTANT_LSB)__FLT32_HAS_QUIET_NAN__ 1__ARM_FEATURE_MATMUL_INT8__LDBL_HAS_INFINITY__ 1__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))SCB_SHPR_PRI_13_RESERVED 9__FLT32X_MAX_10_EXP__ 308NVIC_DACC_IRQ 30SCB_SHPR_PRI_5_BUSFAULT 1__ARM_ARCH_EXT_IDIV__ 1__ARM_PCS 1bool _BoolUINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffBBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)SCB_FPCCR MMIO32(SCB_BASE + 0x234)INT16_MAX __INT16_MAX____FLT32X_IS_IEC_60559__ 2SCB_AFSR MMIO32(SCB_BASE + 0x3C)WINT_MINLIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAX__INT_LEAST16_WIDTH__ 16__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLINT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHRSCB_SCR_SEVONPEND (1 << 4)__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)__USER_LABEL_PREFIX__ __UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX__NVIC_RESERVED4_IRQ 18SCB_CCR_UNALIGN_TRP (1 << 3)SCB_CCR_USERSETMPEND (1 << 1)__INT_LEAST8_MAX__ 0x7f__GCC_ATOMIC_POINTER_LOCK_FREE 2__ARM_FEATURE_QBIT 1__ARM_FEATURE_CLZ 1__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXSCB_ICSR_VECTPENDING_LSB 12NVIC_HARD_FAULT_IRQ -13__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__UINT_LEAST32_MAX__ 0xffffffffULNVIC_BUS_FAULT_IRQ -11__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fSCB_AIRCR MMIO32(SCB_BASE + 0x0C)BIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__GCC_DESTRUCTIVE_SIZE 64BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intSCB_ID_MMFR0 MMIO32(SCB_BASE + 0x50)SCB_CFSR_IACCVIOL (1 << 0)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAXSCB_DFSR MMIO32(SCB_BASE + 0x30)__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)__INT32_MAX__ 0x7fffffffLSCB_CFSR_NOCP (1 << 19)SCB_ICSR_NMIPENDSET (1 << 31)SCB_MVFR1 MMIO32(SCB_BASE + 0x244)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLNVIC_RSTC_IRQ 1__ARM_FEATURE_BF16_VECTOR_ARITHMETICSCB_ID_PFR1 MMIO32(SCB_BASE + 0x44)PPBI_BASE (0xE0000000U)SCB_CPACR_CP11 (1 << 22)__FLT32_MANT_DIG__ 24LIBOPENCM3_NVIC_H __FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__INT8_MAX __INT8_MAX__BIT28 (1<<28)__GCC_ATOMIC_CHAR16_T_LOCK_FREE 2__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UINT32_MAX__ 0xffffffffUL__UDQ_IBIT__ 0SCB_AIRCR_VECTKEYSTAT (0xFFFF << SCB_AIRCR_VECTKEYSTAT_LSB)__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UKSCB_CPUID MMIO32(SCB_BASE + 0x00)__FLT64_NORM_MAX__ 1.7976931348623157e+308F64SCB_ID_PFR0 MMIO32(SCB_BASE + 0x40)SCB_ICSR_VECTACTIVE (0x1FF << SCB_ICSR_VECTACTIVE_LSB)UINTPTR_MAX__LDBL_DENORM_MIN__ 4.9406564584124654e-324L__INT64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_SAT 1__ULLFRACT_IBIT__ 0MMIO16(addr) (*(volatile uint16_t *)(addr))NVIC_ICPR(icpr_id) MMIO32(NVIC_BASE + 0x180 + ((icpr_id) * 4))__GNUC__ 12SCB_ID_MMFR3 MMIO32(SCB_BASE + 0x5C)NVIC_TC5_IRQ 28__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 2__ULACCUM_MIN__ 0.0ULKNVIC_USART1_IRQ 15SCB_VTOR_TBLOFF_LSB 9__LDBL_MAX__ 1.7976931348623157e+308L__ARM_ARCH 7__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAX__LDBL_HAS_QUIET_NAN__ 1UINT_FAST8_MAX __UINT_FAST8_MAX__SCB_CFSR_UNDEFINSTR (1 << 16)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)SCB_CPUID_IMPLEMENTER_LSB 24SCB_ID_ISAR4 MMIO32(SCB_BASE + 0x70)__ARM_FPSCB_ICSR_PENDSTCLR (1 << 25)__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32NVIC_ICER(icer_id) MMIO32(NVIC_BASE + 0x80 + ((icer_id) * 4))BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LL__ARM_ARCH_PROFILE__INT64_TYPE__ long long intSCB_ICSR_VECTACTIVE_LSB 0__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4__UFRACT_MAX__ 0XFFFFP-16URNVIC_USART0_IRQ 14INT64_MAXFPB_BASE (PPBI_BASE + 0x2000)INT_FAST64_MIN (-INT_FAST64_MAX - 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1)NVIC_RESERVED0_IRQ 7__GCC_ATOMIC_CHAR_LOCK_FREE 2__LFRACT_EPSILON__ 0x1P-31LR__ARM_SIZEOF_MINIMAL_ENUM 1NVIC_PMC_IRQ 5SCB_CFSR_BFARVALID (1 << 15)__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1__FLT32_MIN_10_EXP__ (-37)SCB_SHCSR_USGFAULTPENDED (1 << 12)MMIO64(addr) (*(volatile uint64_t *)(addr))__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MIN__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)SCB_AIRCR_SYSRESETREQ (1 << 2)__TA_IBIT__ 64__FLT32_MIN__ 1.1754943508222875e-38F32SAM3N 1nvic_get_irq_enabledSCB_AIRCR_PRIGROUP_SHIFT 8__ARM_FEATURE_QRDMXSCB_SHCSR_USGFAULTACT (1 << 3)__ARM_ARCH_ISA_THUMB 2__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__UINT_LEAST8_MAX __UINT_LEAST8_MAX__BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0__ARM_32BIT_STATE 1_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4SCB_CPUID_CONSTANT_ARMV7 (0xF << SCB_CPUID_CONSTANT_LSB)__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1SCB_ID_MMFR1 MMIO32(SCB_BASE + 0x54)INT8_MIN (-INT8_MAX - 1)SCB_AIRCR_PRIGROUP_MASK (0x7 << 8)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 2__FLT32_DIG__ 6INT_LEAST16_MAXSCB_ICSR_VECTPENDING (0x1FF << SCB_ICSR_VECTPENDING_LSB)BIT15 (1<<15)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1INT32_MAX__ACCUM_MIN__ (-0X1P15K-0X1P15K)__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intSCB_CPUID_REVISION (0xF << SCB_CPUID_REVISION_LSB)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234__FLT_NORM_MAX__ 3.4028234663852886e+38FSCB_CPUID_CONSTANT_LSB 16long long unsigned int__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)SCB_SHCSR_MONITORACT (1 << 8)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int__APCS_32__ 1__DQ_FBIT__ 63SCB_SHPR_PRI_8_RESERVED 4INT_LEAST64_MAX__SACCUM_IBIT__ 8SCB_CFSR_INVPC (1 << 18)NVIC_TC1_IRQ 24__UHQ_IBIT__ 0INT_LEAST8_MINSCB_FPDSCR MMIO32(SCB_BASE + 0x23C)BIT29 (1<<29)__INT_FAST16_TYPE__ intINT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRSCB_SHCSR_BUSFAULTPENDED (1 << 14)__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15__UTQ_FBIT__ 128LIBOPENCM3_SCB_H __FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffPTRDIFF_MAX __PTRDIFF_MAX__SCB_CFSR_PRECISERR (1 << 9)__FLT32_DECIMAL_DIG__ 9__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKUINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRSCB_CFSR_IBUSERR (1 << 8)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intNVIC_ISPR(ispr_id) MMIO32(NVIC_BASE + 0x100 + ((ispr_id) * 4))WCHAR_MINBEGIN_DECLS nvic_get_pending_irqINT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15NVIC_RESERVED3_IRQ 17__FLT32X_MAX__ 1.7976931348623157e+308F32xLIBOPENCM3_SAM3N_NVIC_H SCB_ICSR_ISRPREEMPT (1 << 23)__ARM_EABI__ 1INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1SCB_GET_EXCEPTION_STACK_FRAME(f) do { asm volatile ("mov %[frameptr], sp" : [frameptr]"=r" (f)); } while (0)__QQ_IBIT__ 0SCB_SHPR_PRI_14_PENDSV 10SCB_SHPR_PRI_12_RESERVED 8__LLACCUM_FBIT__ 31__UINTMAX_TYPE__ long long unsigned int__USQ_IBIT__ 0SCB_CPUID_PARTNO (0xFFF << SCB_CPUID_PARTNO_LSB)__UINT_LEAST32_TYPE__ long unsigned int__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 2SCB_AIRCR_PRIGROUP_GROUP16_NOSUB (0x3 << 8)INTMAX_MAX__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CINT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intNVIC_NMI_IRQ -14UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULR__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned int__INT64_C(c) c ## LLSCB_CPUID_IMPLEMENTER (0xFF << SCB_CPUID_IMPLEMENTER_LSB)TPIU_BASE (PPBI_BASE + 0x40000)__LDBL_MIN__ 2.2250738585072014e-308LSCB_CFSR MMIO32(SCB_BASE + 0x28)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16SCB_CFSR_MSTKERR (1 << 4)CORESIGHT_LAR_OFFSET 0xfb0SCB_CFSR_IMPRECISERR (1 << 10)SCB_SHPR_PRI_15_SYSTICK 11short intSCB_CFSR_UNSTKERR (1 << 11)__UINT16_C(c) c__FLT64_MIN_EXP__ (-1021)__UDA_IBIT__ 32priorityUINT_LEAST32_MAXBIT2 (1<<2)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROC__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53NVIC_SUPC_IRQ 0BIT5 (1<<5)NVIC_RTC_IRQ 2BIT1 (1<<1)INT8_CINT_LEAST32_MAXirqn__USES_INITFINI__ 1__DBL_DECIMAL_DIG__ 17BIT8 (1<<8)INT16_C(c) __INT16_C(c)SCB_CPACR_NONE 0__INT16_MAX__ 0x7fffSCB_SHCSR_MEMFAULTPENDED (1 << 13)__INT_WIDTH__ 32SCB_SHPR_PRI_11_SVCALL 7__QQ_FBIT__ 7__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32SCB_VTOR MMIO32(SCB_BASE + 0x08)__ULLFRACT_EPSILON__ 0x1P-64ULLRfalse 0__SIZEOF_WINT_T__ 4SCB_CPUID_CONSTANT_ARMV6 (0xC << SCB_CPUID_CONSTANT_LSB)__ARM_FEATURE_UNALIGNED 1__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17SCB_HFSR MMIO32(SCB_BASE + 0x2C)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1SCB_CFSR_DIVBYZERO (1 << 25)__FLT32X_HAS_DENORM__ 1__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32nvic_set_pending_irqSCB_HFSR_DEBUG_VT (1 << 31)__ARM_ASM_SYNTAX_UNIFIED__ 1__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPROD__thumb2__ 1DEBUG_MONITOR_IRQ -4SCB_ID_ISAR3 MMIO32(SCB_BASE + 0x6C)NVIC_IABR(iabr_id) MMIO32(NVIC_BASE + 0x200 + ((iabr_id) * 4))SCB_CCR_STKALIGN (1 << 9)__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H INT_LEAST64_MIN__GCC_CONSTRUCTIVE_SIZE 64__LLFRACT_IBIT__ 0SCB_SHPR_PRI_10_RESERVED 6uint32_tnvic_clear_pending_irqBIT12 (1<<12)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HK__GCC_ASM_FLAG_OUTPUTS__ 1__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULKSCB_CPUID_PARTNO_LSB 4__LDBL_DIG__ 15UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXBIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8__INT_LEAST16_TYPE__ short int__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1SCB_CFSR_UNALIGNED (1 << 24)UINTMAX_CSCB_SHPR_PRI_7_RESERVED 3INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1__HQ_FBIT__ 15__bool_true_false_are_defined 1BIT26 (1<<26)nvic_disable_irq__SIZE_MAX__ 0xffffffffU__ARM_ARCH__LONG_MAX__ 0x7fffffffLNVIC_PIOA_IRQ 11SCB_CFSR_MMARVALID (1 << 7)SCB_ID_MMFR2 MMIO32(SCB_BASE + 0x58)SCB_AIRCR_VECTKEYSTAT_LSB 16__ARM_FEATURE_LDREX 7PTRDIFF_MAXSCB_CCR_BFHFNMIGN (1 << 8)__LLFRACT_EPSILON__ 0x1P-63LLR__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53__WCHAR_WIDTH__ 32WINT_MAX__INT16_C(c) cSCB_ID_ISAR0 MMIO32(SCB_BASE + 0x60)INT_FAST16_MIN (-INT_FAST16_MAX - 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