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KU / 3+ ÷! !‚! /Ž !/š!/¦ =á" = =î# !#8 #! =û !/‡0.0 !. !“0 0 . !CM3_LIKELY(expr) (__builtin_expect(!!(expr), 1))ADC_TR1_HT (0xFFF << ADC_TR1_HT_SHIFT)SCB_BASE (SCS_BASE + 0x0D00)__UHA_FBIT__ 8ADC_CHSELR(adc) MMIO32((adc) + 0x28)DMA_BASE (PERIPH_BASE_AHB1 + 0x0000)CORESIGHT_LSR_SLK (1<<1)__CHAR_UNSIGNED__ 1polarityADC_CFGR1_EXTEN_MASK (0x3 << 10)__FLT64_HAS_INFINITY__ 1__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffff__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)TIM1_BASE (PERIPH_BASE_APB + 0x12C00)__INTMAX_MAX__ 0x7fffffffffffffffLL__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17__LDBL_MIN__ 2.2250738585072014e-308LINT_FAST64_MAX__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffU__ARM_FEATURE_QBITLIBOPENCM3_ADC_COMMON_V2_H INT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8__DBL_MAX_10_EXP__ 308__FRACT_MIN__ (-0.5R-0.5R)LIBOPENCM3_ADC_H ADC_TR1_HT_MASK 0xFFF__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64ADC_CFGR1_DISCEN (1 << 16)__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))WCHAR_MIN __WCHAR_MIN____FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__FLT32_MIN__ 1.1754943508222875e-38F32__USACCUM_MIN__ 0.0UHK__FLT32_DECIMAL_DIG__ 9__DECIMAL_DIG__ 17__LDBL_MIN_EXP__ (-1021)__LDBL_MANT_DIG__ 53INT64_MIN (-INT64_MAX - 1)WWDG_BASE (PERIPH_BASE_APB + 0x2c00)ADC_TR1(adc) MMIO32((adc) + 0x20)ADC_CLKSOURCE_PCLK_DIV4 ADC_CFGR2_CKMODE_PCLK_DIV4__UINT8_C(c) c__INT16_TYPE__ short int__FLT64_MAX__ 1.7976931348623157e+308F64__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LKUINT_FAST32_MAXADC_TR1_HT_SHIFT 16adc_set_sample_time_on_all_channelsINT_FAST64_MAX __INT_FAST64_MAX__ADC_CFGR1_RES_8_BIT (0x2 << 3)__UINT_LEAST16_MAX__ 0xffff__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64ADC_RESOLUTION_12BIT ADC_CFGR1_RES_12_BITUSART5_BASE (PERIPH_BASE_APB + 0x5000)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intGPIO_PORT_C_BASE (PERIPH_BASE_AHB2 + 0x0800)stepdnINT32_MIN (-INT32_MAX - 1)ADC_ISR_EOS (1 << 3)__FLT32_MAX_10_EXP__ 38adc_enable_external_trigger_regularADC_CCR_VBATEN (1 << 24)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZ__UINTPTR_MAX__ 0xffffffffUADC_SMPR1(adc) MMIO32((adc) + 0x14)__FLT32_MIN_EXP__ (-125)ADC_CR_ADSTP (1 << 4)ADC_CFGR1_EXTEN_BOTH_EDGES (0x3 << 10)UINT32_MAX __UINT32_MAX__TIM3_BASE (PERIPH_BASE_APB + 0x0400)USART8_BASE (PERIPH_BASE_APB + 0x11C00)__ULFRACT_FBIT__ 32ADC_CFGR1_RES_10_BIT (0x1 << 3)__FLT64_MIN_10_EXP__ (-307)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__ADC_SMPR_SMP_001DOT5 (0 << ADC_SMPR_SMP_SHIFT)__SFRACT_EPSILON__ 0x1P-7HRADC_ISR_EOSEQ ADC_ISR_EOSadc_set_clk_sourceUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAX__SQ_FBIT__ 31INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)__UHQ_FBIT__ 16__FLT64_MIN_EXP__ (-1021)__PTRDIFF_WIDTH__ 32INT_FAST8_MAXADC_CCR_TSEN (1 << 23)__UINT_FAST8_MAX__ 0xffffffffUUINT16_C(c) __UINT16_C(c)__LACCUM_IBIT__ 32__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__INTPTR_MAX__ 0x7fffffff__UINT_FAST16_MAX__ 0xffffffffUINT64_C(c) __INT64_C(c)__GCC_IEC_559_COMPLEX 0__UFRACT_MIN__ 0.0URWCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1adc_disable_eoc_sequence_interruptGPIO_PORT_D_BASE (PERIPH_BASE_AHB2 + 0x0C00)__UINT_LEAST8_TYPE__ unsigned char__ACCUM_FBIT__ 15__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX__ADC_TR1_LT_SHIFT 0__INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1__FLT32X_EPSILON__ 2.2204460492503131e-16F32x__UINT_FAST64_MAX__ 0xffffffffffffffffULLNVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 1BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64USART2_BASE (PERIPH_BASE_APB + 0x4400)__UINT_FAST32_MAX__ 0xffffffffUADC_CFGR1_AWD1CH_SHIFT 26__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4WINT_MIN __WINT_MIN__ADC_CFGR1_AWD1SGL (1 << 22)__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32__FLT32X_MIN_EXP__ (-1021)ADC_IER_AWD1IE (1 << 7)INFO_BASE (0x1ffff000U)TIM17_BASE (PERIPH_BASE_APB + 0x14800)BIT27 (1<<27)TIM7_BASE (PERIPH_BASE_APB + 0x1400)__UTA_FBIT__ 64__FLT_DECIMAL_DIG__ 9__thumb__ 1ADC_MODE_SEQUENTIALLIBOPENCM3_MEMORYMAP_COMMON_H signed charadc_set_watchdog_low_thresholdINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1__INT64_C(c) c ## LL__FRACT_FBIT__ 15ADC_CFGR1_RES_12_BIT (0x0 << 3)__LLACCUM_EPSILON__ 0x1P-31LLK__GNUC_PATCHLEVEL__ 1PTRDIFF_MINGNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsUINTPTR_MAX __UINTPTR_MAX____ARM_ARCH_PROFILE 77GPIO_PORT_E_BASE (PERIPH_BASE_AHB2 + 0x1000)__FLT64_MAX_10_EXP__ 308__WCHAR_WIDTH__ 32MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINADC1_CR ADC_CR(ADC)__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38__FRACT_MAX__ 0X7FFFP-15RADC_CFGR2_CKMODE_PCLK_DIV2 (1 << ADC_CFGR2_CKMODE_SHIFT)PERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5ADC_CHANNEL_VBAT 18__ARM_ARCH_EXT_IDIV__PERIPH_BASE_APB (PERIPH_BASE + 0x00000000)ADC ADC_BASEADC_SMPR_SMP_028DOT5 (3 << ADC_SMPR_SMP_SHIFT)__UINT16_MAX__ 0xffff__TQ_FBIT__ 127TIM14_BASE (PERIPH_BASE_APB + 0x2000)__USQ_FBIT__ 32INT_FAST16_MINWCHAR_MAX__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32_BoolSPI1_BASE (PERIPH_BASE_APB + 0x13000)INT_FAST32_MIN (-INT_FAST32_MAX - 1)CEC_BASE (PERIPH_BASE_APB + 0x7800)UINT_LEAST8_MAXUINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__ADC_CFGR1_AWD1CH (0x1F << ADC_CFGR1_AWD1CH_SHIFT)__USA_IBIT__ 16PTRDIFF_MIN (-PTRDIFF_MAX - 1)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__DBL_IS_IEC_60559__ 2__UINT_FAST64_TYPE__ long long unsigned intTIM2_BASE (PERIPH_BASE_APB + 0x0000)__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC____UINT32_C(c) c ## UL__FLT32_IS_IEC_60559__ 2ADC_CFGR1_ALIGN (1 << 5)ADC_CCR_VREFEN (1 << 22)INT_FAST64_MIN__USFRACT_IBIT__ 0__INT32_C(c) c ## L__LDBL_EPSILON__ 2.2204460492503131e-16L__USFRACT_MIN__ 0.0UHRTSC_BASE (PERIPH_BASE_AHB1 + 0x4000)__ARM_NEON__UINT8_MAX__ 0xff__LDBL_MAX_EXP__ 1024ADC_IER_EOSIE (1 << 3)LIBOPENCM3_MEMORYMAP_H ADC_CFGR1_EXTEN_RISING_EDGE (0x1 << 10)__DBL_HAS_DENORM__ 1sourceadc_opmode__DA_FBIT__ 31__GXX_ABI_VERSION 1017__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LINT_LEAST32_MAX __INT_LEAST32_MAX__ADC_MODE_SCANADC1_SMPR1 ADC_SMPR1(ADC)INT_LEAST8_MAX __INT_LEAST8_MAX__USART3_BASE (PERIPH_BASE_APB + 0x4800)__UACCUM_MIN__ 0.0UK__FLT_EPSILON__ 1.1920928955078125e-7FADC_IER_EOCIE (1 << 2)__PTRDIFF_TYPE__ int__ARM_ARCH_ISA_THUMB__ARM_FEATURE_MATMUL_INT8__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0DBGMCU_BASE (PERIPH_BASE_APB + 0x15800)__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1cm3_assert(expr) do { if (CM3_LIKELY(expr)) { (void)0; } else { cm3_assert_failed(); } } while (0)__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)adc_enable_eoc_sequence_interrupt__FLT32_HAS_QUIET_NAN__ 1__LDBL_HAS_INFINITY__ 1__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308__ARM_PCS 1bool _BoolUINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)UINT_FAST16_MAX __UINT_FAST16_MAX____UINT_LEAST8_MAX__ 0xffADC_CFGR1_EXTSEL_SHIFT 6BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)ADC_IER(adc) MMIO32((adc) + 0x04)adc_enable_discontinuous_modeADC1 ADC_BASE__FLT32X_IS_IEC_60559__ 2ADC_CFGR2_CKMODE_PCLK_DIV4 (2 << ADC_CFGR2_CKMODE_SHIFT)SYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)UINT32_MAXPERIPH_BASE_AHB1 (PERIPH_BASE + 0x00020000)__INT_LEAST16_WIDTH__ 16__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLADC_RESOLUTION_10BIT ADC_CFGR1_RES_10_BITINT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHRADC_CR_ADSTART (1 << 2)__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)adc_clear_eoc_sequence_flag/build/libopencm3/lib/stm32/f0__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffUL__INT_LEAST8_MAX__ 0x7f__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXDAC_BASE (PERIPH_BASE_APB + 0x7400)TIM16_BASE (PERIPH_BASE_APB + 0x14400)ADC1_CFGR1 ADC_CFGR1(ADC)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)ADC_CFGR1_CONT (1 << 13)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fBIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__SHRT_WIDTH__ 16adc_calibrate_start__ARM_FEATURE_MVEadc_disable_watchdog_interrupt__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intADC_IER_EOSEQIE ADC_IER_EOSIEADC1_SMPR ADC_SMPR1(ADC)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0ST_VREFINT_CAL MMIO16(0x1FFFF7BA)__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAXchannel__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64BIT24 (1<<24)__INT32_MAX__ 0x7fffffffLST_TSENSE_CAL2_110C MMIO16(0x1FFFF7C2)UINTMAX_MAXEXTI_BASE (PERIPH_BASE_APB + 0x10400)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLADC1_CFGR2 ADC_CFGR2(ADC)__ARM_FEATURE_BF16_VECTOR_ARITHMETICPPBI_BASE (0xE0000000U)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intINT8_MAX __INT8_MAX__BIT28 (1<<28)__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1ADC_SMPTIME_041DOT5 ADC_SMPR_SMP_041DOT5ADC_BASE (PERIPH_BASE_APB + 0x12400)__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64ADC1_TR1 ADC_TR1(ADC)UINTPTR_MAXLIBOPENCM3_ADC_COMMON_V2_SINGLE_H __LDBL_DENORM_MIN__ 4.9406564584124654e-324LADC_TR1_LT (0xFFF << ADC_TR1_LT_SHIFT)__INT64_MAX__ 0x7fffffffffffffffLLADC_CFGR1_AUTOFF (1 << 15)__ULLFRACT_IBIT__ 0MMIO16(addr) (*(volatile uint16_t *)(addr))ADC_SMPR_SMP_071DOT5 (6 << ADC_SMPR_SMP_SHIFT)ADC1_CCR ADC_CCR(ADC)__GNUC__ 12adc_set_regular_sequence__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16ADC_SMPTIME_007DOT5 ADC_SMPR_SMP_007DOT5__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULKADC_IER_ADRDYIE (1 << 0)BEGIN_DECLS __ARM_ARCH 6__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAX__LDBL_HAS_QUIET_NAN__ 1ADC_CCR(adc) MMIO32((adc) + 0x300 + 0x8)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)__INT_FAST32_TYPE__ int__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAXBIT20 (1<<20)__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLADC_CR(adc) MMIO32((adc) + 0x08)__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4ADC1_DR ADC_DR(ADC)__UFRACT_MAX__ 0XFFFFP-16URINT64_MAXINT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__ADC_IER_OVRIE (1 << 4)SYS_TICK_BASE (SCS_BASE + 0x0010)trigger__USER_LABEL_PREFIX__ __ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)ADC_SMPR(adc) ADC_SMPR1(adc)adc_set_watchdog_high_thresholdSPI2_BASE (PERIPH_BASE_APB + 0x3800)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)ADC_CFGR1_SCANDIR (1 << 2)CRS_BASE (PERIPH_BASE_APB + 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charADC_CFGR1_AUTDLY (1 << 14)__SIG_ATOMIC_TYPE__ intADC_IER_EOSMPIE (1 << 1)UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MIN__ORDER_PDP_ENDIAN__ 3412PERIPH_BASE (0x40000000U)true 1__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)__ULLFRACT_MIN__ 0.0ULLR__LDBL_MIN_10_EXP__ (-307)ADC_CFGR1_EXTEN_FALLING_EDGE (0x2 << 10)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1ADC_CFGR1_EXTEN_DISABLED (0x0 << 10)cm3_assert_not_reached() cm3_assert_failed()__LFRACT_EPSILON__ 0x1P-31LRADC_TR1_LT_MASK 0xFFF__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX__threshold__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1ADC_SMPTIME_001DOT5 ADC_SMPR_SMP_001DOT5__FRACT_EPSILON__ 0x1P-15R__FLT32_MIN_10_EXP__ (-37)adc_enable_analog_watchdog_on_all_channelsMMIO64(addr) (*(volatile uint64_t *)(addr))__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MINDESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)INT16_MAX __INT16_MAX____BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)chanadc_clear_watchdog_flag__TA_IBIT__ 64stepupADC_CHANNEL_VREF 17__ARM_FEATURE_QRDMX__ARM_ARCH_ISA_THUMB 1DESIG_FLASH_SIZE_BASE (0x1FFFF7CCU)__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__ADC_CFGR1_EXTSEL_VAL(x) ((x) << ADC_CFGR1_EXTSEL_SHIFT)BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__ADC_SMPR_SMP_007DOT5 (1 << ADC_SMPR_SMP_SHIFT)__SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1ADC_CHSELR_CHSEL(x) (1 << (x))INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1lengthadc_set_operation_mode__FLT32_DIG__ 6INT_LEAST16_MAXTIM6_BASE (PERIPH_BASE_APB + 0x1000)BIT15 (1<<15)ADC_ISR_ADRDY (1 << 0)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7ADC1_ISR ADC_ISR(ADC)INT32_MAX__ACCUM_MIN__ (-0X1P15K-0X1P15K)adc_get_eoc_sequence_flag__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intBIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0ADC_CR_ADCAL (1 << 31)UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234adc_calibrate_wait_finishBX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)__FLT_NORM_MAX__ 3.4028234663852886e+38FUSART1_BASE (PERIPH_BASE_APB + 0x13800)long long unsigned int__FLT_MIN_10_EXP__ (-37)GPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2ADC_CFGR2_CKMODE_CK_ADC (0 << ADC_CFGR2_CKMODE_SHIFT)__ULLACCUM_EPSILON__ 0x1P-32ULLKuint8_t__APCS_32__ 1__DQ_FBIT__ 63INT_LEAST64_MAX__SACCUM_IBIT__ 8reg32__UHQ_IBIT__ 0INT_LEAST8_MINBIT29 (1<<29)ADC_MODE_SCAN_INFINITE__INT_FAST16_TYPE__ intUSART7_BASE (PERIPH_BASE_APB + 0x11800)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRADC_CHANNEL_TEMP 16__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMAadc_enable_analog_watchdog_on_selected_channel__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15__UTQ_FBIT__ 128ADC_CFGR1_RES_MASK (0x3 << 3)__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffADC_ISR_EOC (1 << 2)DMA2_BASE (PERIPH_BASE_AHB1 + 0x0400)PTRDIFF_MAX __PTRDIFF_MAX____ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKADC1_CHSELR ADC_CHSELR(ADC)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRADC_CFGR1_EXTSEL (0x7 << ADC_CFGR1_EXTSEL_SHIFT)__DQ_IBIT__ 0ADC1_IER ADC_IER(ADC)__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intWCHAR_MINDMA1_BASE DMA_BASEadc_disable_vbat_sensoropmodeADC_CFGR2_CKMODE_SHIFT 30adc_get_watchdog_flagUSB_PMA_BASE (PERIPH_BASE_APB + 0x6000)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)__ARM_EABI__ 1ADC1_TR ADC1_TR(ADC)INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1ADC_CFGR1_DMAEN (1 << 0)ADC_ISR_EOSMP (1 << 1)USART6_BASE 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64__ULLACCUM_IBIT__ 32__ULLFRACT_EPSILON__ 0x1P-64ULLRGPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)ADC_CR_ADDIS (1 << 1)__SIZEOF_WINT_T__ 4__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17ADC_CR_ADEN (1 << 0)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1__FLT32X_HAS_DENORM__ 1__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1ADC_DR(adc) MMIO32((adc) + 0x40)ADC_SMPTIME_028DOT5 ADC_SMPR_SMP_028DOT5__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODADC_ISR(adc) MMIO32((adc) + 0x00)ADC_CFGR1(adc) MMIO32((adc) + 0x0C)LIBOPENCM3_CM3_ASSERT_H _STDBOOL_H ADC_CFGR1_DMACFG (1 << 1)__GCC_CONSTRUCTIVE_SIZE 64__LLFRACT_IBIT__ 0uint32_tBIT12 (1<<12)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HKADC_SMPTIME_055DOT5 ADC_SMPR_SMP_055DOT5__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXLIBOPENCM3_CM3_MEMORYMAP_H BIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MINADC_TR1_LT_VAL(x) (((x) & ADC_TR1_LT_MASK) << ADC_TR1_LT_SHIFT)__FLT64_DIG__ 15adc_disable_discontinuous_mode__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_C__LDBL_MAX_10_EXP__ 308ADC_ISR_OVR (1 << 4)INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1ADC_SMPTIME_239DOT5 ADC_SMPR_SMP_239DOT5__HQ_FBIT__ 15__bool_true_false_are_defined 1BIT26 (1<<26)ADC_CFGR1_AWD1CH_VAL(x) ((x) << ADC_CFGR1_AWD1CH_SHIFT)__SIZE_MAX__ 0xffffffffUadc_disable_external_trigger_regular__ARM_FEATURE_SAT__ARM_ARCHINTMAX_C(c) __INTMAX_C(c)__STRICT_ANSI__ 1ADC_CFGR1_RES_6_BIT (0x3 << 3)INT_LEAST64_MINPTRDIFF_MAX__SIZE_TYPE__ unsigned intST_TSENSE_CAL1_30C MMIO16(0x1FFFF7B8)__LLFRACT_EPSILON__ 0x1P-63LLR__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 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<< 7)INFO_BASE (0x1ffff000U)TIM17_BASE (PERIPH_BASE_APB + 0x14800)BIT27 (1<<27)TIM7_BASE (PERIPH_BASE_APB + 0x1400)__UTA_FBIT__ 64__FLT_DECIMAL_DIG__ 9__thumb__ 1LIBOPENCM3_MEMORYMAP_COMMON_H signed charINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1__FRACT_FBIT__ 15ADC_CFGR1_RES_12_BIT (0x0 << 3)__FLT_HAS_QUIET_NAN__ 1__GNUC_PATCHLEVEL__ 1PTRDIFF_MIN__UINT_LEAST16_MAX__ 0xffffUINTPTR_MAX __UINTPTR_MAX____ARM_ARCH_PROFILE 77GPIO_PORT_E_BASE (PERIPH_BASE_AHB2 + 0x1000)__FLT64_MAX_10_EXP__ 308GPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINADC1_CR ADC_CR(ADC)__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38__FRACT_MAX__ 0X7FFFP-15RADC_CFGR2_CKMODE_PCLK_DIV2 (1 << ADC_CFGR2_CKMODE_SHIFT)PERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5ADC_CHANNEL_VBAT 18__ARM_ARCH_EXT_IDIV__PERIPH_BASE_APB (PERIPH_BASE + 0x00000000)ADC ADC_BASEADC_SMPR_SMP_028DOT5 (3 << ADC_SMPR_SMP_SHIFT)__UINT16_MAX__ 0xffff__TQ_FBIT__ 127TIM14_BASE (PERIPH_BASE_APB + 0x2000)__USQ_FBIT__ 32INT_FAST16_MIN__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32adc_set_resolution_BoolSPI1_BASE (PERIPH_BASE_APB + 0x13000)INT_FAST32_MIN (-INT_FAST32_MAX - 1)CEC_BASE (PERIPH_BASE_APB + 0x7800)UINT_LEAST8_MAXUINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__ADC_CFGR1_AWD1CH (0x1F << ADC_CFGR1_AWD1CH_SHIFT)__USA_IBIT__ 16PTRDIFF_MIN (-PTRDIFF_MAX - 1)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__DBL_IS_IEC_60559__ 2__UINT_FAST64_TYPE__ long long unsigned intTIM2_BASE (PERIPH_BASE_APB + 0x0000)adc_enable_vrefint__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC____UFRACT_MIN__ 0.0UR__UINT32_C(c) c ## UL__FLT32_IS_IEC_60559__ 2ADC_CFGR1_ALIGN (1 << 5)ADC_CCR_VREFEN (1 << 22)INT_FAST64_MIN__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16L__USFRACT_MIN__ 0.0UHRTSC_BASE (PERIPH_BASE_AHB1 + 0x4000)__ARM_NEON__UINT8_MAX__ 0xff__LDBL_MAX_EXP__ 1024ADC_IER_EOSIE (1 << 3)LIBOPENCM3_MEMORYMAP_H ADC_CFGR1_EXTEN_RISING_EDGE (0x1 << 10)__DBL_HAS_DENORM__ 1adc_read_regular__DA_FBIT__ 31__GXX_ABI_VERSION 1017__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LINT_LEAST32_MAX __INT_LEAST32_MAX__ADC_CFGR2_CKMODE_SHIFT 30INT_LEAST8_MAX __INT_LEAST8_MAX__USART3_BASE (PERIPH_BASE_APB + 0x4800)__UACCUM_MIN__ 0.0UK__FLT_EPSILON__ 1.1920928955078125e-7FADC_IER_EOCIE (1 << 2)__PTRDIFF_TYPE__ int__ARM_ARCH_ISA_THUMB__ARM_FEATURE_MATMUL_INT8__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0adc_disable_delayed_conversion_modeDBGMCU_BASE (PERIPH_BASE_APB + 0x15800)__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1ADC_CFGR1(adc) MMIO32((adc) + 0x0C)__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)TIM16_BASE (PERIPH_BASE_APB + 0x14400)__FLT32_HAS_QUIET_NAN__ 1__LDBL_HAS_INFINITY__ 1__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308__ARM_PCS 1bool _BoolUINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffADC_CFGR1_EXTSEL_SHIFT 6BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)ADC_IER(adc) MMIO32((adc) + 0x04)ADC1 ADC_BASE__FLT32X_IS_IEC_60559__ 2SYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXPERIPH_BASE_AHB1 (PERIPH_BASE + 0x00020000)__INT_LEAST16_WIDTH__ 16__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLADC_RESOLUTION_10BIT ADC_CFGR1_RES_10_BITINT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHRADC_CR_ADSTART (1 << 2)__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)/build/libopencm3/lib/stm32/f0__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffULadc_power_off__INT_LEAST8_MAX__ 0x7f__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXDAC_BASE (PERIPH_BASE_APB + 0x7400)adc_calibrate_asyncADC1_CFGR1 ADC_CFGR1(ADC)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)ADC_CFGR1_CONT (1 << 13)adc_disable_eoc_interrupt__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fBIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intADC_IER_EOSEQIE ADC_IER_EOSIEADC_CCR_VBATEN (1 << 24)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0ST_VREFINT_CAL MMIO16(0x1FFFF7BA)__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAX__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)__INT32_MAX__ 0x7fffffffLST_TSENSE_CAL2_110C MMIO16(0x1FFFF7C2)UINTMAX_MAXEXTI_BASE (PERIPH_BASE_APB + 0x10400)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLADC1_CFGR2 ADC_CFGR2(ADC)__ARM_FEATURE_BF16_VECTOR_ARITHMETICPPBI_BASE (0xE0000000U)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32adc_enable_dma__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__INT8_MAX __INT8_MAX____INT_LEAST16_TYPE__ short int__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1ADC_SMPTIME_041DOT5 ADC_SMPR_SMP_041DOT5adc_enable_dma_circular_modeADC_BASE (PERIPH_BASE_APB + 0x12400)__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UKadc_enable_temperature_sensor__FLT64_NORM_MAX__ 1.7976931348623157e+308F64ADC1_TR1 ADC_TR1(ADC)UINTPTR_MAXLIBOPENCM3_ADC_COMMON_V2_SINGLE_H __LDBL_DENORM_MIN__ 4.9406564584124654e-324LADC_TR1_LT (0xFFF << ADC_TR1_LT_SHIFT)__INT64_MAX__ 0x7fffffffffffffffLLadc_power_on_asyncADC_CFGR1_AUTOFF (1 << 15)__ULLFRACT_IBIT__ 0MMIO16(addr) (*(volatile uint16_t *)(addr))ADC_SMPR_SMP_071DOT5 (6 << ADC_SMPR_SMP_SHIFT)ADC1_CCR ADC_CCR(ADC)__GNUC__ 12WCHAR_MAX__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16ADC_SMPTIME_007DOT5 ADC_SMPR_SMP_007DOT5__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULKADC_IER_ADRDYIE (1 << 0)__ARM_ARCH 6adc_is_power_onADC_CFGR1_DMAEN (1 << 0)__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXINTPTR_MIN__LDBL_HAS_QUIET_NAN__ 1ADC_CCR(adc) MMIO32((adc) + 0x300 + 0x8)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)__UINT_FAST64_MAX__ 0xffffffffffffffffULL__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLADC_CR(adc) MMIO32((adc) + 0x08)__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4ADC1_DR ADC_DR(ADC)__UFRACT_MAX__ 0XFFFFP-16URINT64_MAXINT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPADC_ISR_EOS (1 << 3)adc_get_overrun_flagADC_IER_OVRIE (1 << 4)SYS_TICK_BASE (SCS_BASE + 0x0010)__USER_LABEL_PREFIX__ __ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)ADC_SMPR(adc) ADC_SMPR1(adc)SPI2_BASE (PERIPH_BASE_APB + 0x3800)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)ADC_CFGR1_SCANDIR (1 << 2)__INT_FAST32_TYPE__ intCRS_BASE (PERIPH_BASE_APB + 0x6C00)unsigned int__GCC_ASM_FLAG_OUTPUTS__ADC_TR(adc) ADC_TR1(adc)__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__USACCUM_IBIT__ 8__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UKADC_SMPR_SMP_SHIFT 0ADC_ISR_AWD1 (1 << 7)ADC_SMPR_SMP_055DOT5 (5 << ADC_SMPR_SMP_SHIFT)__ARM_ASM_SYNTAX_UNIFIED____FLT_EVAL_METHOD__ 0__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__thumb2__RCC_BASE (PERIPH_BASE_AHB1 + 0x1000)__ARM_FEATURE_LDREX__UQQ_FBIT__ 8ADC_TR1_HT_VAL(x) (((x) & ADC_TR1_HT_MASK) << ADC_TR1_HT_SHIFT)INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0ADC_CLKSOURCE_PCLK_DIV2 ADC_CFGR2_CKMODE_PCLK_DIV2INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1ADC_SMPR_SMP (7 << ADC_SMPR_SMP_SHIFT)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__RTC_BASE (PERIPH_BASE_APB + 0x2800)__UINT8_TYPE__ unsigned charADC_CFGR1_AUTDLY (1 << 14)__SIG_ATOMIC_TYPE__ intADC_IER_EOSMPIE (1 << 1)INTPTR_MIN (-INTPTR_MAX - 1)__GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINADC_SMPTIME_013DOT5 ADC_SMPR_SMP_013DOT5PERIPH_BASE (0x40000000U)true 1__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)__FLT32X_MIN_EXP__ (-1021)ADC_CFGR1_EXTEN_FALLING_EDGE (0x2 << 10)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__GCC_ATOMIC_CHAR_LOCK_FREE 1ADC_CFGR1_EXTEN_DISABLED (0x0 << 10)BIT28 (1<<28)__LFRACT_EPSILON__ 0x1P-31LRADC_TR1_LT_MASK 0xFFF__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX____FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1ADC_SMPTIME_001DOT5 ADC_SMPR_SMP_001DOT5__FLT32_MIN_10_EXP__ (-37)MMIO64(addr) (*(volatile uint64_t *)(addr))__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308Ladc_clear_overrun_flagDESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)INT16_MAX __INT16_MAX____BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)__TA_IBIT__ 64ADC_CHANNEL_VREF 17__ARM_FEATURE_QRDMX__ARM_ARCH_ISA_THUMB 1DESIG_FLASH_SIZE_BASE (0x1FFFF7CCU)adc_set_right_aligned__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__ADC_CFGR1_EXTSEL_VAL(x) ((x) << ADC_CFGR1_EXTSEL_SHIFT)BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__ADC_SMPR_SMP_007DOT5 (1 << ADC_SMPR_SMP_SHIFT)__SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1ADC_CHSELR_CHSEL(x) (1 << (x))INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1__FLT32_DIG__ 6INT_LEAST16_MAXTIM6_BASE (PERIPH_BASE_APB + 0x1000)BIT15 (1<<15)ADC_ISR_ADRDY (1 << 0)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7ADC1_ISR ADC_ISR(ADC)INT32_MAX__ACCUM_MIN__ (-0X1P15K-0X1P15K)__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intBIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2adc_disable_vrefint__ORDER_LITTLE_ENDIAN__ 1234BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)__FLT_NORM_MAX__ 3.4028234663852886e+38FUSART1_BASE (PERIPH_BASE_APB + 0x13800)long long unsigned int__FLT_MIN_10_EXP__ (-37)GPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2ADC_CFGR2_CKMODE_CK_ADC (0 << ADC_CFGR2_CKMODE_SHIFT)__ULLACCUM_EPSILON__ 0x1P-32ULLK__APCS_32__ 1__DQ_FBIT__ 63INT_LEAST64_MAX__SACCUM_IBIT__ 8adc_disable_dma_circular_mode__UHQ_IBIT__ 0INT_LEAST8_MINBIT29 (1<<29)__INT_FAST16_TYPE__ intUSART7_BASE (PERIPH_BASE_APB + 0x11800)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRADC_CHANNEL_TEMP 16__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15__UTQ_FBIT__ 128ADC_CFGR1_RES_MASK (0x3 << 3)adc_set_continuous_conversion_mode__LLACCUM_EPSILON__ 0x1P-31LLK__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffADC_ISR_EOC (1 << 2)DMA2_BASE (PERIPH_BASE_AHB1 + 0x0400)PTRDIFF_MAX __PTRDIFF_MAX____ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKADC1_CHSELR ADC_CHSELR(ADC)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULR__DQ_IBIT__ 0ADC1_IER ADC_IER(ADC)__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intWCHAR_MINDMA1_BASE DMA_BASEBEGIN_DECLS ADC_CR_ADEN (1 << 0)adc_power_onADC_CFGR1_EXTSEL (0x7 << ADC_CFGR1_EXTSEL_SHIFT)USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__LLFRACT_EPSILON__ 0x1P-63LLR__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)__ARM_EABI__ 1ADC1_TR ADC1_TR(ADC)INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1adc_power_off_asyncADC_ISR_EOSMP (1 << 1)USART6_BASE (PERIPH_BASE_APB + 0x11400)__QQ_IBIT__ 0ADC1_SMPR1 ADC_SMPR1(ADC)DESIG_UNIQUE_ID_BASE (0x1FFFF7ACU)__LLACCUM_FBIT__ 31__UINTMAX_TYPE__ long long unsigned int__USQ_IBIT__ 0adc_is_calibratingstops__UINT_LEAST32_TYPE__ long unsigned intADC_CFGR1_OVRMOD (1 << 12)__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 1STM32F0 1adc_disable_temperature_sensorADC_RESOLUTION_8BIT ADC_CFGR1_RES_8_BITINTMAX_MAXDEBUG_BASE (SCS_BASE + 0x0DF0)__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1ADC_SMPR_SMP_239DOT5 (7 << ADC_SMPR_SMP_SHIFT)UINT_FAST64_MAX __UINT_FAST64_MAX____LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CINT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intUINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULR__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned intuint16_t__INT64_C(c) c ## LLGNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sections__LDBL_MIN_10_EXP__ (-307)__LONG_MAX__ 0x7fffffffLTIM15_BASE (PERIPH_BASE_APB + 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"". ! i– != =©. "!" “» !/< /Æ!/Ñ!/ãw < w 1 1 0! 0$< $$= 2)! /) ""^‚!1!.# 1< #< #. #1< #< #. #!# 0 A ¾ , . 0Øz &%L #! u.! ./> % C = $( ( 3= !$! =?-!!!1 v ! / !/0I 0 % £! YRCC_APB2ENR_SYSCFGCOMPEN (1 << 0)CAN_TSR_LOW1 (1 << 30)CAN_RF1R_FMP1_MASK (0x3 << 0)SCB_BASE (SCS_BASE + 0x0D00)__UHA_FBIT__ 8RCC_APB1ENR_CECEN (1 << 30)CAN_BTR_SILM (1 << 31)RCC_CFGR2_PREDIV_DIV15 0xeDMA_BASE (PERIPH_BASE_AHB1 + 0x0000)CORESIGHT_LSR_SLK (1<<1)RCC_CIR_LSIRDYF (1 << 0)__CHAR_UNSIGNED__ 1RCC_CSR_LSION (1 << 0)CAN_BTR_TS1_15TQ (0xE << 16)CAN_MCR_SLEEP (1 << 1)RST_USART2rcc_periph_reset_pulseRST_USART4__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)data8__LACCUM_EPSILON__ 0x1P-31LKCAN_TDH0R(can_base) CAN_TDHxR((can_base), CAN_MBOX0)__PTRDIFF_MAX__ 0x7fffffff__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)TIM1_BASE (PERIPH_BASE_APB + 0x12C00)CAN_TSR_RQCP2 (1 << 16)__INTMAX_MAX__ 0x7fffffffffffffffLLRCC_APB1ENR_TIM6EN (1 << 4)__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17RCC_CSR_RMVF (1 << 24)WINT_MIN __WINT_MIN__INT_FAST64_MAXCAN_TIxR_STID_MASK (0x7FF << 21)__ATOMIC_CONSUME 1__LFRACT_MIN__ (-0.5LR-0.5LR)__WCHAR_MAX__ 0xffffffffUfifo_idCAN_TSR_ABRQ1 (1 << 15)__ARM_FEATURE_QBITRCC_CFGR2_PREDIV_DIV14 0xdCAN_BTR_TS2_1TQ (0x0 << 20)CAN_RF0R_RFOM0 (1 << 5)RCC_CR2_HSI48CAL_SHIFT 24can_initINT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8CAN_MSR_TXM (1 << 8)__DBL_MAX_10_EXP__ 308__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0rcc_periph_rst__SIZE_TYPE__ unsigned intRCC_APB1RSTR_USART2RST (1 << 17)RCC_CIR_PLLRDYIE (1 << 12)__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__FLT32_MIN__ 1.1754943508222875e-38F32__USACCUM_MIN__ 0.0UHK__FLT32_DECIMAL_DIG__ 9__DECIMAL_DIG__ 17__LDBL_MIN_EXP__ (-1021)__LDBL_MANT_DIG__ 53RCC_CFGR_HPRE_DIV16 (0xb << RCC_CFGR_HPRE_SHIFT)INT64_MIN (-INT64_MAX - 1)WWDG_BASE (PERIPH_BASE_APB + 0x2c00)__UINT8_C(c) c__INT16_TYPE__ short int__FLT64_MAX__ 1.7976931348623157e+308F64RCC_CFGR3_USART2SW_SYSCLK (1 << RCC_CFGR3_USART2SW_SHIFT)CAN_TDL0R(can_base) CAN_TDLxR((can_base), CAN_MBOX0)UINT_FAST32_MAXRCC_CSR_RESET_FLAGS (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF | RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF | RCC_CSR_PINRSTF | RCC_CSR_OBLRSTF)RCC_APB1ENR_USBEN (1 << 23)INT_FAST64_MAX __INT_FAST64_MAX__RCC_CR2_HSI14TRIM_SHIFT 3RCC_BDCR_LSEDRV_SHIFT 3TIM15_BASE (PERIPH_BASE_APB + 0x14000)RCC_CIR_HSI14RDYIE (1 << 13)__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64RCC_CFGR_PLLMUL_MUL13 (0x0B << RCC_CFGR_PLLMUL_SHIFT)CAN_IER_FMPIE1 (1 << 4)USART5_BASE (PERIPH_BASE_APB + 0x5000)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intGPIO_PORT_C_BASE (PERIPH_BASE_AHB2 + 0x0800)INT32_MIN (-INT32_MAX - 1)RCC_AHBENR_SRAMEN (1 << 2)__FLT32_MAX_10_EXP__ 38data32CAN_BTR_SJW_3TQ (0x2 << 24)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZRCC_APB1RSTR_TIM3RST (1 << 1)__UINTPTR_MAX__ 0xffffffffU__FLT32_MIN_EXP__ (-125)can_transmitRCC_CIR_HSIRDYC (1 << 18)can_resetRCC_CFGR2_PREDIV_DIV7 0x6UINT32_MAX __UINT32_MAX__TIM3_BASE (PERIPH_BASE_APB + 0x0400)RCC_AHBENR_DMA2EN (1 << 1)USART8_BASE (PERIPH_BASE_APB + 0x11C00)__ULFRACT_FBIT__ 32CAN_RDH1R(can_base) CAN_RDHxR((can_base), CAN_FIFO1)RCC_APB2ENR_USART1EN (1 << 14)__FLT64_MIN_10_EXP__ (-307)RCC_APB1ENR_TIM14EN (1 << 8)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__canportRCC_CFGR_HPRE_DIV4 (0x9 << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_MCOPRE_DIV32 (5 << RCC_CFGR_MCOPRE_SHIFT)CAN_BTR_TS2_6TQ (0x5 << 20)__SFRACT_EPSILON__ 0x1P-7HR__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAXRCC_CFGR_HPRE_DIV8 (0xa << RCC_CFGR_HPRE_SHIFT)CAN_FMR_FINIT (1 << 0)__FLT32_MAX_EXP__ 128RST_SYSCFGUINT32_C__UTA_FBIT__ 64CAN_BTR_TS1_16TQ (0xF << 16)CAN_BTR_TS1_MASK (0xF << 16)__UHQ_FBIT__ 16__FLT64_MIN_EXP__ (-1021)CAN_TSR_LOW0 (1 << 29)__PTRDIFF_WIDTH__ 32RCC_BDCR_RTCSEL_HSE (3 << RCC_BDCR_RTCSEL_SHIFT)RCC_CSR_V18PWRRSTF (1 << 23)__UINT_FAST8_MAX__ 0xffffffffUUINT16_C(c) __UINT16_C(c)CAN_RI1R(can_base) CAN_RIxR((can_base), CAN_FIFO1)__LACCUM_IBIT__ 32CAN_FS1R(can_base) MMIO32((can_base) + 0x20C)__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1__LLFRACT_MIN__ (-0.5LLR-0.5LLR)INT_FAST8_MAXRCC_CIR_HSERDYC (1 << 19)__UINT_FAST16_MAX__ 0xffffffffURCC_CFGR2_PREDIV_DIV13 0xc__INTPTR_MAX__ 0x7fffffffINT64_C(c) __INT64_C(c)CAN_ESR_LEC_CRC_ERROR (0x6 << 4)RCC_CFGR3_USART2SW_SHIFT 16RCC_CFGR_PLLMUL_MUL7 (0x05 << RCC_CFGR_PLLMUL_SHIFT)CAN_RDL1R(can_base) CAN_RDLxR((can_base), CAN_FIFO1)__UFRACT_MIN__ 0.0URRCC_CFGR_MCO_SHIFT 24WCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__GPIO_PORT_D_BASE (PERIPH_BASE_AHB2 + 0x0C00)__UINT_LEAST8_TYPE__ unsigned charRCC_AHBENR_GPIOFEN (1 << 22)__ACCUM_FBIT__ 15fifo__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX__CAN_TSR_ALST2 (1 << 18)__INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1__FLT32X_EPSILON__ 2.2204460492503131e-16F32xCAN_FMR(can_base) MMIO32((can_base) + 0x200)NVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32CAN_MSR_SLAKI (1 << 4)__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 1CAN_MSR_INAK_TIMEOUT 0x0000FFFF__SQ_FBIT__ 31BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON__RCC_CFGR_PPRE_MASK 0x7can_fifo_releaseUINT_LEAST8_MAX __UINT_LEAST8_MAX__CAN_ESR(can_base) MMIO32((can_base) + 0x018)__THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)__GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"UINT_FAST8_MAX __UINT_FAST8_MAX____FLT32X_MIN_10_EXP__ (-307)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64USART2_BASE (PERIPH_BASE_APB + 0x4400)__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4RCC_APB2RSTR_TIM15RST (1 << 16)RCC_APB2RSTR_USART8RST (1 << 7)CAN_BTR_SJW_2TQ (0x1 << 24)RCC_BDCR_RTCEN (1 << 15)__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32RCC_AHBRSTR_IOPERST (1 << 21)__FLT32X_MIN_EXP__ (-1021)tdlxrCAN_TDTxR_TIME_SHIFT 15INFO_BASE (0x1ffff000U)TIM17_BASE (PERIPH_BASE_APB + 0x14800)CAN_BTR_TS1_2TQ (0x1 << 16)RCC_BDCR_LSEON (1 << 0)BIT27 (1<<27)CAN_TDH1R(can_base) CAN_TDHxR((can_base), CAN_MBOX1)TIM7_BASE (PERIPH_BASE_APB + 0x1400)RST_CRSRCC_CFGR3_USARTxSW_MASK 3__FLT_MIN_10_EXP__ (-37)INTMAX_C(c) __INTMAX_C(c)RCC_CIR_LSERDYC (1 << 17)__FLT_DECIMAL_DIG__ 9LIBOPENCM3_MEMORYMAP_COMMON_H signed charuint8_tINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1CAN_BTR_LBKM (1 << 30)CAN_RF1R_RFOM1 (1 << 5)__INT64_C(c) c ## LL__FRACT_FBIT__ 15__FLT_HAS_QUIET_NAN__ 1RCC_CFGR2_PREDIV_DIV8 0x7__GNUC_PATCHLEVEL__ 1RCC_CFGR_HPRE_NODIV (0x0 << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_PLLMUL_MUL15 (0x0D << RCC_CFGR_PLLMUL_SHIFT)PTRDIFF_MINtimestamp__UINT_LEAST16_MAX__ 0xffffCAN_RDL0R(can_base) CAN_RDLxR((can_base), CAN_FIFO0)RCC_AHBENR_DMA1EN (1 << 0)UINTPTR_MAX __UINTPTR_MAX__can_filter_id_mask_32bit_initRCC_CR2_HSI48ON (1 << 16)CAN_BTR_BRP_MASK (0x3FFUL << 0)INT32_MAX_STDBOOL_H GPIO_PORT_E_BASE (PERIPH_BASE_AHB2 + 0x1000)__FLT64_MAX_10_EXP__ 308__WCHAR_WIDTH__ 32MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINRCC_APB1RSTR_CECRST (1 << 30)__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__GCC_ATOMIC_CHAR_LOCK_FREE 1UINT64_MAX__FLT_MAX_10_EXP__ 38CAN_BTR_SJW_4TQ (0x3 << 24)__FRACT_MAX__ 0X7FFFP-15R__SHRT_WIDTH__ 16PERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)UINTMAX_CRCC_CFGR_MCO_SYSCLK 4__INT_FAST32_MAX__ 0x7fffffffRCC_APB2ENR_USART8EN (1 << 7)__ARM_ARCH_EXT_IDIV__CAN_TDL1R(can_base) CAN_TDLxR((can_base), CAN_MBOX1)PERIPH_BASE_APB (PERIPH_BASE + 0x00000000)CAN_ESR_LEC_ACK_ERROR (0x3 << 4)RCC_AHBENR_GPIODEN (1 << 20)RCC_CIR_PLLRDYF (1 << 4)CAN_ESR_LEC_NO_ERROR (0x0 << 4)__UINT16_MAX__ 0xffffCAN_TDT2R(can_base) CAN_TDTxR((can_base), CAN_MBOX2)__UINT32_C(c) c ## UL__TQ_FBIT__ 127RCC_CFGR_MCO_HSI 5TIM14_BASE (PERIPH_BASE_APB + 0x2000)__USQ_FBIT__ 32INT_FAST16_MINCAN_MSR_SLAK (1 << 1)filter_select_bitCAN_TI2R(can_base) CAN_TIxR(can_base, CAN_MBOX2)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32RCC_APB1ENR_TIM2EN (1 << 0)_BoolCAN_BTR_TS1_5TQ (0x4 << 16)CAN_FIFO1 0x1C0RST_SPI1INT_FAST32_MIN (-INT_FAST32_MAX - 1)RCC_CFGR_MCO_MASK 0xfCEC_BASE (PERIPH_BASE_APB + 0x7800)CAN_ESR_REC_MASK (0xF << 24)RCC_CFGR2_PREDIV_DIV9 0x8RCC_APB2RSTR_USART1RST (1 << 14)RCC_CFGR3_USART3SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)UINT_LEAST8_MAXCAN_BTR_SJW_SHIFT 24RCC_APB1ENR_PWREN (1 << 28)UINT8_C(c) __UINT8_C(c)RCC_CIR_HSIRDYIE (1 << 10)__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__RCC_CFGR_PLLNODIV (1 << 31)__USA_IBIT__ 16RCC_CFGR_MCO_HSI48 8FLASH_BASE (0x08000000U)PTRDIFF_MIN (-PTRDIFF_MAX - 1)RCC_CFGR_MCOPRE_DIV16 (4 << RCC_CFGR_MCOPRE_SHIFT)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__DBL_IS_IEC_60559__ 2__UINT_FAST64_TYPE__ long long unsigned intTIM2_BASE (PERIPH_BASE_APB + 0x0000)RCC_CFGR_PLLMUL_MUL9 (0x07 << RCC_CFGR_PLLMUL_SHIFT)CAN_RIxR_STID_MASK (0x7FF)RCC_CFGR_PLLXTPRE (1<<17)RCC_CIR_HSI48RDYC (1 << 22)__FLT_MIN__ 1.1754943508222875e-38FCAN_IER_FOVIE1 (1 << 6)__HA_FBIT__ 7CAN_MSR_SAMP (1 << 10)__FDPIC__RST_GPIOARST_GPIOBRST_GPIOCRST_GPIODRST_GPIOERST_GPIOFRCC_CFGR_HPRE_DIV64 (0xc << RCC_CFGR_HPRE_SHIFT)RCC_CSR_PINRSTF (1 << 26)INT_FAST64_MIN__USFRACT_IBIT__ 0CAN_RF1R_FOVR1 (1 << 4)__LDBL_EPSILON__ 2.2204460492503131e-16LSPI1_BASE (PERIPH_BASE_APB + 0x13000)CAN_TIxR_RTR (1 << 1)__USFRACT_MIN__ 0.0UHRTSC_BASE (PERIPH_BASE_AHB1 + 0x4000)RCC_CFGR_PLLMUL_MUL8 (0x06 << RCC_CFGR_PLLMUL_SHIFT)__ARM_NEONRCC_BDCR_RTCSEL_LSI (2 << RCC_BDCR_RTCSEL_SHIFT)__UINT8_MAX__ 0xffRCC_CR2_HSI14ON (1 << 0)CAN_RDTxR_DLC_MASK (0xF << 0)CAN_MSR_RXM (1 << 9)__LDBL_MAX_EXP__ 1024RCC_CIR MMIO32(RCC_BASE + 0x08)LIBOPENCM3_MEMORYMAP_H RCC_CFGR_HPRE_MASK 0xfCAN_MCR_TXFP (1 << 2)RCC_BDCR_RTCSEL_SHIFT 8RCC_APB2ENR_DBGMCUEN (1 << 22)BIT7 (1<<7)__DBL_HAS_DENORM__ 1RCC_CIR_LSIRDYIE (1 << 8)CAN_RDT1R(can_base) CAN_RDTxR((can_base), CAN_FIFO1)CAN_TDTxR_DLC_MASK (0xF << 0)RCC_APB1RSTR_USBRST (1 << 23)__DA_FBIT__ 31BIT17 (1<<17)__GXX_ABI_VERSION 1017RCC_CFGR_PPRE_DIV16 (7 << RCC_CFGR_PPRE_SHIFT)__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LRCC_CFGR3_USART1SW_PCLK (0 << RCC_CFGR3_USART1SW_SHIFT)INT_LEAST32_MAX __INT_LEAST32_MAX__RCC_BDCR_LSEDRV_HIGH (3 << RCC_BDCR_LSEDRV_SHIFT)__LDBL_MAX_10_EXP__ 308INT_LEAST8_MAX __INT_LEAST8_MAX__RCC_CFGR_SWS_PLL (2 << RCC_CFGR_SWS_SHIFT)USART3_BASE (PERIPH_BASE_APB + 0x4800)RCC_CFGR_PLLXTPRE_HSE_CLK_DIV2 0x1RCC_CIR_HSI14RDYF (1 << 5)__UACCUM_MIN__ 0.0UKRCC_CFGR3_USART3SW (3 << RCC_CFGR3_USART2SW_SHIFT)__FLT_EPSILON__ 1.1920928955078125e-7FRCC_CFGR_PPRE_SHIFT 8__GCC_ATOMIC_SHORT_LOCK_FREE 1CAN_BTR_TS1_13TQ (0xC << 16)__PTRDIFF_TYPE__ intRCC_CR_HSEON (1 << 16)RCC_CFGR_MCO_HSE 6CAN_RDTxR_FMI_SHIFT 8__UACCUM_EPSILON__ 0x1P-16UK__ARM_FEATURE_MATMUL_INT8RCC_CFGR_PLLSRC_HSI_CLK_DIV2 0x0LIBOPENCM3_CM3_MEMORYMAP_H false 0CAN_ESR_LEC_SOFT_ERROR (0x7 << 4)DBGMCU_BASE (PERIPH_BASE_APB + 0x15800)__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1__ELF__ 1SCS_BASE (PPBI_BASE + 0xE000)TIM16_BASE (PERIPH_BASE_APB + 0x14400)CAN1 BX_CAN1_BASE__FLT32_HAS_QUIET_NAN__ 1RCC_CFGR2_PREDIV_DIV11 0xaRCC_CSR_OBLRSTF (1 << 25)RCC_CFGR_MCOPRE_DIV4 (2 << RCC_CFGR_MCOPRE_SHIFT)__LDBL_HAS_INFINITY__ 1RCC_CFGR_MCOPRE_DIV1 (0 << RCC_CFGR_MCOPRE_SHIFT)__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))CAN_TIxR(can_base,mbox) MMIO32((can_base) + (mbox) + 0x0)RCC_CFGR3_USART3SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)__FLT32X_MAX_10_EXP__ 308CAN_BTR_TS1_14TQ (0xD << 16)__ARM_PCS 1RCC_CFGR_MCOPRE_DIV8 (3 << RCC_CFGR_MCOPRE_SHIFT)bool _BoolRCC_APB2ENR_TIM15EN (1 << 16)UINTMAX_MAX __UINTMAX_MAX__CAN_FiR1(can_base,bank) MMIO32((can_base) + 0x240 + ((bank) * 0x8) + 0x0)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)CAN_TSR_TME2 (1 << 28)__UINT_LEAST8_MAX__ 0xffCAN_TSR_TXOK2 (1 << 17)CAN_BTR_TS2_5TQ (0x4 << 20)CAN_IER_FOVIE0 (1 << 3)BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)RCC_CR_HSIRDY (1 << 1)INT16_MAX __INT16_MAX__CAN_TIxR_STID_SHIFT 21CAN_IER_WKUIE (1 << 16)__FLT32X_IS_IEC_60559__ 2CAN_MCR(can_base) MMIO32((can_base) + 0x000)can_filter_initSYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXCAN_MSR(can_base) MMIO32((can_base) + 0x004)PERIPH_BASE_AHB1 (PERIPH_BASE + 0x00020000)__INT_LEAST16_WIDTH__ 16CAN_TIxR_IDE (1 << 2)RCC_APB1RSTR_TIM14RST (1 << 8)__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLcan_enable_irqRCC_BDCR_LSERDY (1 << 1)CAN_BTR_TS1_12TQ (0xB << 16)_REG_BIT__USFRACT_EPSILON__ 0x1P-8UHR__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)CAN_RF0R_FOVR0 (1 << 4)CAN_TDHxR(can_base,mbox) MMIO32((can_base) + (mbox) + 0xC)RCC_AHBRSTR_IOPDRST (1 << 20)tdhxr/build/libopencm3/lib/stm32/f0__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffULCAN_TSR_ABRQ0 (1 << 7)CAN_TSR_TME1 (1 << 27)mask1mask2__INT_LEAST8_MAX__ 0x7fCAN_TIxR_TXRQ (1 << 0)CAN_RIxR_STID_SHIFT 21__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXDAC_BASE (PERIPH_BASE_APB + 0x7400)RCC_CFGR2_PREDIV_DIV5 0x4RCC_CIR_LSERDYF (1 << 1)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024RST_TIM16CAN_TSR_ABRQ2 (1 << 23)BIT21 (1<<21)CAN_RDTxR_DLC_SHIFT 0__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)CAN_TDLxR(can_base,mbox) MMIO32((can_base) + (mbox) + 0x8)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1RCC_CR_HSICAL_SHIFT 8CAN_TIxR_EXID_MASK (0x1FFFFFF << 3)__INT8_MAX__ 0x7fRST_I2C2BIT14 (1<<14)CAN_IER_LECIE (1 << 11)__GCC_HAVE_DWARF2_CFI_ASM 1id_list_mode__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__GCC_DESTRUCTIVE_SIZE 64__GCC_IEC_559_COMPLEX 0__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intRCC_AHBRSTR_IOPARST (1 << 17)CAN_MCR_INRQ (1 << 0)RCC_CR2_HSI14TRIM (31 << RCC_CR2_HSI14TRIM_SHIFT)__SOFTFP__ 1RCC_CSR_SFTRSTF (1 << 28)UINT_LEAST16_MAX __UINT_LEAST16_MAX__RCC_CFGR2_PREDIV_DIV6 0x5INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0RCC_CFGR3_USBSW (1 << 7)ST_VREFINT_CAL MMIO16(0x1FFFF7BA)__SCHAR_WIDTH__ 8rcc_apb2_frequency rcc_apb1_frequencyBIT18 (1<<18)UINT_FAST16_MAX__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32silent__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)CAN_MSR_RX (1 << 11)__INT32_MAX__ 0x7fffffffLST_TSENSE_CAL2_110C MMIO16(0x1FFFF7C2)UINTMAX_MAXEXTI_BASE (PERIPH_BASE_APB + 0x10400)GPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLRCC_CIR_CSSC (1 << 23)__ARM_FEATURE_BF16_VECTOR_ARITHMETICRCC_BDCR_LSEDRV_LOW (0 << RCC_BDCR_LSEDRV_SHIFT)LIBOPENCM3_RCC_H PPBI_BASE (0xE0000000U)DEBUG_BASE (SCS_BASE + 0x0DF0)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32CAN_ESR_BOFF (1 << 2)__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__RST_TSCINT8_MAX __INT8_MAX__RCC_CSR_LSIRDY (1 << 1)__INT_LEAST16_TYPE__ short int__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1RCC_CFGR3_USART3SW_SYSCLK (1 << RCC_CFGR3_USART2SW_SHIFT)RCC_APB1ENR MMIO32(RCC_BASE + 0x1c)ADC_BASE (PERIPH_BASE_APB + 0x12400)RCC_CFGR_PPRE_DIV4 (5 << RCC_CFGR_PPRE_SHIFT)__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3RCC_CFGR_PLLMUL_MUL12 (0x0A << RCC_CFGR_PLLMUL_SHIFT)can_receive__FLT_MANT_DIG__ 24CAN_TSR_LOW2 (1 << 31)__LACCUM_FBIT__ 31RCC_CR_HSERDY (1 << 17)__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1CAN_TDTxR_DLC_SHIFT 0__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64can_filter_id_mask_16bit_initRCC_BDCR MMIO32(RCC_BASE + 0x20)UINTPTR_MAXCAN_TDT0R(can_base) CAN_TDTxR((can_base), CAN_MBOX0)CAN_TDTxR(can_base,mbox) MMIO32((can_base) + (mbox) + 0x4)RCC_CR2_HSI14DIS (1 << 2)__LDBL_DENORM_MIN__ 4.9406564584124654e-324LRCC_APB1RSTR_WWDGRST (1 << 11)__INT64_MAX__ 0x7fffffffffffffffLL__ULLFRACT_IBIT__ 0RCC_CFGR_HPRE (0xf << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_MCOPRE_DIV2 (1 << RCC_CFGR_MCOPRE_SHIFT)MMIO16(addr) (*(volatile uint16_t *)(addr))RCC_CFGR_PLLMUL_MUL4 (0x02 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB2ENR_SPI1EN (1 << 12)BIT19 (1<<19)CAN_RIxR_RTR (1 << 1)RCC_CSR_LPWRRSTF (1 << 31)__GNUC__ 12RCC_CFGR_SW (3 << RCC_CFGR_SW_SHIFT)CAN_TDTxR_TIME_MASK (0xFFFF << 15)CAN_TSR_RQCP0 (1 << 0)WCHAR_MAXCAN_BTR_TS2_SHIFT 20__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16RCC_CFGR3_USART2SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0RCC_CFGR_SWS_SHIFT 2CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULKRCC_CIR_HSIRDYF (1 << 2)__ARM_ARCH 6can_available_mailbox__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXRCC_CFGR_PLLMUL_MUL16 (0x0E << RCC_CFGR_PLLMUL_SHIFT)RCC_CIR_HSI48RDYF (1 << 6)rdlxr__LDBL_HAS_QUIET_NAN__ 1__LONG_LONG_WIDTH__ 64BIT6 (1<<6)RCC_APB1ENR_I2C2EN (1 << 22)abomenable__INT_FAST32_TYPE__ intCAN_ESR_TEC_MASK (0xF << 16)__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1RCC_CIR_LSIRDYC (1 << 16)RCC_CFGR_MCO_LSI 2BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024RCC_CFGR2_PREDIV_NODIV 0x0UINT16_MAXBIT20 (1<<20)RCC_APB1ENR_USART5EN (1 << 20)__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLRST_BDCRRCC_APB1RSTR_USART3RST (1 << 18)RCC_APB1ENR_CANEN (1 << 25)__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8CAN_IER_ERRIE (1 << 15)__SIZEOF_WCHAR_T__ 4RCC_CFGR_SWS_HSE (1 << RCC_CFGR_SWS_SHIFT)CAN_RDTxR_TIME_MASK (0xFFFF << 16)maskRCC_CFGR_MCOPRE_SHIFT 28fifoid_arrayCAN_MBOX0 0x180CAN_IER_EPVIE (1 << 9)RCC_CR_HSION (1 << 0)__UFRACT_MAX__ 0XFFFFP-16URCAN_RF1R_FULL1 (1 << 3)RCC_APB1RSTR_TIM7RST (1 << 5)INT64_MAXRCC_APB1ENR_I2C1EN (1 << 21)RCC_AHBRSTR_IOPBRST (1 << 18)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0RCC_CFGR3 MMIO32(RCC_BASE + 0x30)CAN_RDTxR_TIME_SHIFT 16__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__RST_TIM15LIBOPENCM3_CAN_H RST_TIM17SYS_TICK_BASE (SCS_BASE + 0x0010)RCC_CR2_HSI48RDY (1 << 17)__USER_LABEL_PREFIX__ __ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64INT16_MIN (-INT16_MAX - 1)RCC_CFGR_PPRE_DIV2 (4 << RCC_CFGR_PPRE_SHIFT)CAN_MBOX2 0x1A0SPI2_BASE (PERIPH_BASE_APB + 0x3800)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)CAN_FMR_CAN2SB_MASK (0x3F << CAN_FMR_CAN2SB_SHIFT)CRS_BASE (PERIPH_BASE_APB + 0x6C00)__ATOMIC_SEQ_CST 5__GCC_ASM_FLAG_OUTPUTS__CAN_IER_EWGIE (1 << 8)__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1RCC_APB1RSTR_DACRST (1 << 29)CAN_RDTxR(can_base,fifo) MMIO32((can_base) + (fifo) + 0x4)txfpRCC_CFGR_MCOPRE_DIV64 (6 << RCC_CFGR_MCOPRE_SHIFT)__USACCUM_IBIT__ 8RCC_CFGR3_USART3SW_SHIFT 18__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UINTMAX_TYPE__ long long unsigned intCAN_BTR_SJW_1TQ (0x0 << 24)RCC_APB1RSTR_USART4RST (1 << 19)__FLT_EVAL_METHOD__ 0CAN_RF0R_FULL0 (1 << 3)unsigned int__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32RCC_CFGR3_USART2SW (3 << RCC_CFGR3_USART2SW_SHIFT)__thumb2__LIBOPENCM3_RCC_COMMON_ALL_H RCC_BASE (PERIPH_BASE_AHB1 + 0x1000)__ARM_FEATURE_LDREX__UQQ_FBIT__ 8RCC_CFGR_HPRE_SHIFT 4INT16_CRCC_CFGR_PLLMUL_MUL6 (0x04 << RCC_CFGR_PLLMUL_SHIFT)__ARM_FP16_ARGS__GCC_IEC_559 0CAN_MCR_TTCM (1 << 7)INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX__RCC_CFGR_PLLMUL (0x0F << RCC_CFGR_PLLMUL_SHIFT)__LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1RCC_CFGR_SWS_HSI48 (3 << RCC_CFGR_SWS_SHIFT)CAN_MCR_ABOM (1 << 6)RCC_APB2RSTR MMIO32(RCC_BASE + 0x0c)RCC_APB2RSTR_SYSCFGRST (1 << 0)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__RTC_BASE (PERIPH_BASE_APB + 0x2800)__UINT8_TYPE__ unsigned charRCC_AHBRSTR_TSCRST (1 << 24)CAN_IER_FMPIE0 (1 << 1)RCC_AHBENR_GPIOCEN (1 << 19)__SIG_ATOMIC_TYPE__ intCAN_RDTxR_FMI_MASK (0xFF << 8)UINT64_MAX __UINT64_MAX__RCC_AHBENR_FLTFEN (1 << 4)INT8_MIN__ORDER_PDP_ENDIAN__ 3412RCC_CFGR_HPRE_DIV512 (0xf << RCC_CFGR_HPRE_SHIFT)PERIPH_BASE (0x40000000U)true 1__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)RCC_APB2ENR MMIO32(RCC_BASE + 0x18)RCC_CSR_IWDGRSTF (1 << 29)__LDBL_MIN_10_EXP__ (-307)RCC_CR_CSSON (1 << 19)BIT28 (1<<28)__LFRACT_EPSILON__ 0x1P-31LRRCC_APB2ENR_USART6EN (1 << 5)CAN_RDLxR(can_base,fifo) MMIO32((can_base) + (fifo) + 0x8)RCC_CR2_HSI14CAL (0xFF << RCC_CR2_HSI14CAL_SHIFT)__ARM_SIZEOF_MINIMAL_ENUM 1__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32xcan_filter_id_list_16bit_init__arm__ 1RCC_CR MMIO32(RCC_BASE + 0x00)RCC_CFGR_PLLMUL_MUL3 (0x01 << RCC_CFGR_PLLMUL_SHIFT)__FLT32_MIN_10_EXP__ (-37)CAN_IER(can_base) MMIO32((can_base) + 0x014)MMIO64(addr) (*(volatile uint64_t *)(addr))CAN_RIxR_IDE (1 << 2)CAN_ESR_EPVF (1 << 1)__ARM_FP16_FORMAT_ALTERNATIVERCC_CFGR3_USART3SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)__LDBL_NORM_MAX__ 1.7976931348623157e+308LRCC_APB1RSTR_CANRST (1 << 25)GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsRCC_AHBENR_DMAEN RCC_AHBENR_DMA1ENDESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)CAN_BTR_TS1_SHIFT 16RCC_APB1RSTR_TIM2RST (1 << 0)RCC_CFGR_PLLMUL_MUL10 (0x08 << RCC_CFGR_PLLMUL_SHIFT)__ARM_ARCH_PROFILE 77CAN_BTR_TS1_11TQ (0xA << 16)RCC_CR2_HSI14RDY (1 << 1)RST_CANRCC_CIR_LSERDYIE (1 << 9)mailbox__ARM_ARCH_6M__ 1__SACCUM_IBIT__ 8CAN_TSR_TXOK1 (1 << 9)__ARM_FEATURE_QRDMXscale_32bit__ARM_ARCH_ISA_THUMB 1DESIG_FLASH_SIZE_BASE (0x1FFFF7CCU)CAN_TDT1R(can_base) CAN_TDTxR((can_base), CAN_MBOX1)__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32CAN_BTR_TS1_9TQ (0x8 << 16)SIG_ATOMIC_MAX __SIG_ATOMIC_MAX____USQ_IBIT__ 0RCC_CFGR2_PREDIV 0xfBIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0__ARM_FEATURE_FMA_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)CAN_ESR_LEC_DOM_ERROR (0x5 << 4)ttcmCAN_RF1R(can_base) MMIO32((can_base) + 0x010)INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1length__FLT32_DIG__ 6RCC_BDCR_LSEDRV_MEDHI (2 << RCC_BDCR_LSEDRV_SHIFT)INT_LEAST16_MAXTIM6_BASE (PERIPH_BASE_APB + 0x1000)BIT15 (1<<15)CAN_RDT0R(can_base) CAN_RDTxR((can_base), CAN_FIFO0)RCC_CFGR_MCO_LSE 3CAN_BTR_TS2_3TQ (0x2 << 20)RCC_CFGR_PLLXTPRE_HSE_CLK 0x0__LDBL_HAS_DENORM__ 1__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)RCC_BDCR_BDRST (1 << 16)__ACCUM_MIN__ (-0X1P15K-0X1P15K)__ACCUM_MAX__ 0X7FFFFFFFP-15KRCC_CFGR3_USART1SW_HSI (3 << RCC_CFGR3_USART1SW_SHIFT)__ARM_FEATURE_CRYPTOCAN_BTR_TS1_10TQ (0x9 << 16)__INT_LEAST32_TYPE__ long intCAN_RF0R_FMP0_MASK (0x3 << 0)RCC_CFGR_PLLSRC (1<<16)RST_DBGMCU__ARM_ARCH_ISA_THUMB__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__UINT_FAST64_MAX__ 0xffffffffffffffffULLUINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2CAN_TI0R(can_base) CAN_TIxR(can_base, CAN_MBOX0)BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)__FLT_NORM_MAX__ 3.4028234663852886e+38FUSART1_BASE (PERIPH_BASE_APB + 0x13800)RCC_CFGR3_USART1SW_LSE (2 << RCC_CFGR3_USART1SW_SHIFT)long long unsigned intRCC_CFGR_SW_HSI48 (3 << RCC_CFGR_SW_SHIFT)GPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)RCC_AHBENR_GPIOAEN (1 << 17)__ULACCUM_IBIT__ 32RCC_AHBENR_GPIOEEN (1 << 21)__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2rdhxr__ULLACCUM_EPSILON__ 0x1P-32ULLKRCC_CFGR_PPRE_NODIV (0 << RCC_CFGR_PPRE_SHIFT)__APCS_32__ 1__DQ_FBIT__ 63CAN_BTR_TS2_4TQ (0x3 << 20)INT_LEAST64_MAXuint16_tRCC_CR_HSITRIM_SHIFT 3__UHQ_IBIT__ 0INT_LEAST8_MINRCC_CR2_HSI14CAL_SHIFT 8BIT29 (1<<29)RCC_CFGR_SWS (3 << RCC_CFGR_SWS_SHIFT)__INT_FAST16_TYPE__ intRCC_CFGR_ADCPRE (1<<14)USART7_BASE (PERIPH_BASE_APB + 0x11800)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRRST_SPI2__UINT_LEAST16_TYPE__ short unsigned intcan_disable_irq__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intRCC_CIR_HSERDYIE (1 << 11)__FLT32X_DIG__ 15CAN_MSR_ERRI (1 << 2)CAN_TI1R(can_base) CAN_TIxR(can_base, CAN_MBOX1)CAN_TDH2R(can_base) CAN_TDHxR((can_base), CAN_MBOX2)__UTQ_FBIT__ 128awumCAN_RI0R(can_base) CAN_RIxR((can_base), CAN_FIFO0)__LLACCUM_EPSILON__ 0x1P-31LLK__FINITE_MATH_ONLY__ 0RCC_CR_HSEBYP (1 << 18)__INT_FAST16_MAX__ 0x7fffffffRCC_CFGR2_PREDIV_DIV4 0x3RCC_APB1ENR_TIM3EN (1 << 1)DMA2_BASE (PERIPH_BASE_AHB1 + 0x0400)PTRDIFF_MAX __PTRDIFF_MAX__RCC_CFGR2_PREDIV_DIV16 0xfRCC_CFGR_PLLMUL_MUL14 (0x0C << RCC_CFGR_PLLMUL_SHIFT)RCC_CR_PLLRDY (1 << 25)CAN_RDHxR(can_base,fifo) MMIO32((can_base) + (fifo) + 0xC)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKCAN_FIFO0 0x1B0CAN_ESR_LEC_MASK (0x7 << 4)CAN2 BX_CAN2_BASEUINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRRCC_CFGR_HPRE_DIV128 (0xd << RCC_CFGR_HPRE_SHIFT)loopbackRCC_AHBRSTR MMIO32(RCC_BASE + 0x28)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intRCC_APB2RSTR_USART7RST (1 << 6)RCC_CFGR_SW_HSI (0 << RCC_CFGR_SW_SHIFT)RCC_CFGR2_PREDIV_DIV12 0xbCAN_TSR_CODE_MASK (0x3 << 24)WCHAR_MINCAN_TSR_TERR0 (1 << 3)DMA1_BASE DMA_BASERCC_CFGR3_ADCSW (1 << 8)BEGIN_DECLS CAN_MSR_INAK (1 << 0)RST_TIM2RCC_APB2RSTR_TIM1RST (1 << 11)RCC_APB2RSTR_SPI1RST (1 << 12)USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)CAN_BTR_TS1_1TQ (0x0 << 16)RCC_CSR MMIO32(RCC_BASE + 0x24)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)RCC_CFGR3_USART1SW (3 << RCC_CFGR3_USART1SW_SHIFT)RCC_CR2 MMIO32(RCC_BASE + 0x34)__ARM_EABI__ 1INT16_MININTPTR_MIN__FLT_IS_IEC_60559__ 2__THUMBEL__ 1CAN_RF0R(can_base) MMIO32((can_base) + 0x00C)RCC_CIR_HSERDYF (1 << 3)RCC_APB1RSTR_TIM6RST (1 << 4)USART6_BASE (PERIPH_BASE_APB + 0x11400)RST_ADCRST_CEC__QQ_IBIT__ 0CAN_TSR_TERR1 (1 << 11)RST_CAN1RCC_CR_PLLON (1 << 24)RCC_APB1ENR_TIM7EN (1 << 5)DESIG_UNIQUE_ID_BASE (0x1FFFF7ACU)__LLACCUM_FBIT__ 31CAN_ESR_LEC_STUFF_ERROR (0x1 << 4)CAN_IER_SLKIE (1 << 17)CAN_MBOX1 0x190__GNUC_MINOR__ 2__UINT_LEAST32_TYPE__ long unsigned intRCC_CFGR_SW_PLL (2 << RCC_CFGR_SW_SHIFT)RCC_APB2ENR_USART7EN (1 << 6)__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long intRCC_CFGR2_PREDIV_DIV3 0x2__GCC_ATOMIC_INT_LOCK_FREE 1RCC_APB1RSTR_CRSRST (1 << 27)RCC_APB2RSTR_TIM17RST (1 << 18)STM32F0 1INTMAX_MAXRST_DACRCC_APB1ENR_SPI2EN (1 << 14)RCC_CIR_CSSF (1 << 7)RCC_APB2ENR_ADCEN (1 << 9)__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1__FLT64_HAS_INFINITY__ 1CAN_BTR_TS2_8TQ (0x7 << 20)__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CRCC_APB1RSTR_USART5RST (1 << 20)CAN_TSR_RQCP1 (1 << 8)INT64_MINCAN_TSR_ALST0 (1 << 2)__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intUINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRCAN_ESR_LEC_REC_ERROR (0x4 << 4)RCC_CFGR_PPRE_DIV8 (6 << RCC_CFGR_PPRE_SHIFT)RCC_CR_HSITRIM (0x1F << RCC_CR_HSITRIM_SHIFT)can_filter_id_list_32bit_init__SIZEOF_SIZE_T__ 4INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__UINT64_TYPE__ long long unsigned intI2C2_BASE (PERIPH_BASE_APB + 0x5800)CAN_RIxR_EXID_SHIFT 3RCC_CFGR3_USART1SW_SHIFT 0RCC_APB2ENR_TIM16EN (1 << 17)RCC_APB1RSTR_I2C1RST (1 << 21)__LDBL_MIN__ 2.2250738585072014e-308Lrelease__ARM_FEATURE_CDE__ACCUM_IBIT__ 16RCC_CFGR_PLLSRC_HSE_CLK 0x1CAN_FM1R(can_base) MMIO32((can_base) + 0x204)__FRACT_IBIT__ 0CORESIGHT_LAR_OFFSET 0xfb0CAN_RDH0R(can_base) CAN_RDHxR((can_base), CAN_FIFO0)RCC_CFGR3_I2C1SW (1 << 4)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x2000)short intRCC_AHBENR_GPIOBEN (1 << 18)__FLT32_IS_IEC_60559__ 2CAN_BTR_TS1_8TQ (0x7 << 16)__UINT16_C(c) cCAN_IER_FFIE0 (1 << 2)CAN_FMR_CAN2SB_SHIFT 8BIT31 (1<<31)__UDA_IBIT__ 32CAN_MCR_NART (1 << 4)UINT_LEAST32_MAXBIT2 (1<<2)RCC_CFGR_MCOPRE_DIV128 (7 << RCC_CFGR_MCOPRE_SHIFT)__ATOMIC_RELAXED 0CAN_MCR_RFLM (1 << 3)__ARM_FEATURE_COPROCRCC_APB1ENR_DACEN (1 << 29)CAN_MCR_RESET (1 << 15)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53RCC_BDCR_LSEBYP (1 << 2)RCC_APB1RSTR_SPI2RST (1 << 14)BIT5 (1<<5)BIT1 (1<<1)USART4_BASE (PERIPH_BASE_APB + 0x4C00)INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1__DBL_DECIMAL_DIG__ 17CAN_IER_BOFIE (1 << 10)BIT8 (1<<8)RST_TIM7RCC_APB1ENR_WWDGEN (1 << 11)__ULACCUM_FBIT__ 32INT16_C(c) __INT16_C(c)RCC_CFGR2_PREDIV_DIV2 0x1RCC_CFGR2 MMIO32(RCC_BASE + 0x2c)CAN_BTR_TS1_6TQ (0x5 << 16)__INT16_MAX__ 0x7fffRST_USBRCC_APB2ENR_TIM17EN (1 << 18)rflmCAN_TSR_TXOK0 (1 << 1)RCC_CIR_PLLRDYC (1 << 20)__INT_WIDTH__ 32RCC_APB1ENR_CRSEN (1 << 27)CAN_BTR_TS2_MASK (0x7 << 20)RCC_CFGR3_CECSW (1 << 6)CAN_FFA1R(can_base) MMIO32((can_base) + 0x214)CAN_TSR(can_base) MMIO32((can_base) + 0x008)__QQ_FBIT__ 7POWER_CONTROL_BASE (PERIPH_BASE_APB + 0x7000)__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64CAN_BTR_TS2_2TQ (0x1 << 20)CAN_MCR_AWUM (1 << 5)CAN_RIxR(can_base,fifo) MMIO32((can_base) + (fifo) + 0x0)__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32__ARM_FEATURE_CRC32RCC_CFGR MMIO32(RCC_BASE + 0x04)__ULLFRACT_EPSILON__ 0x1P-64ULLRRCC_APB2RSTR_DBGMCURST (1 << 22)CAN_FA1R(can_base) MMIO32((can_base) + 0x21C)RCC_CR2_HSI48CAL (0xFF << RCC_CR2_HSI48CAL_SHIFT)__SIZEOF_WINT_T__ 4CAN_BTR_TS1_4TQ (0x3 << 16)__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17CAN_MCR_DBF (1 << 16)RCC_CFGR3_USART2SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)RCC_AHBENR_CRCEN (1 << 6)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)RCC_BDCR_RTCSEL_LSE (1 << RCC_BDCR_RTCSEL_SHIFT)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1RCC_BDCR_LSEDRV (3 << RCC_BDCR_LSEDRV_SHIFT)CAN_TIxR_EXID_SHIFT 3__FLT32X_HAS_DENORM__ 1__ULLACCUM_MIN__ 0.0ULLKwait_ack__INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1__TA_IBIT__ 64RCC_CFGR_PLLMUL_MUL5 (0x03 << RCC_CFGR_PLLMUL_SHIFT)RCC_CFGR_PPRE (7 << RCC_CFGR_PPRE_SHIFT)CAN_IER_FFIE1 (1 << 5)RCC_CFGR_MCOPRE (7 << RCC_CFGR_MCOPRE_SHIFT)RCC_CFGR_PLLMUL_MUL11 (0x09 << RCC_CFGR_PLLMUL_SHIFT)RCC_BDCR_RTCSEL (3 << RCC_BDCR_RTCSEL_SHIFT)__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODRCC_APB2RSTR_ADCRST (1 << 9)CAN_MSR_WKUI (1 << 3)CAN_IER_TMEIE (1 << 0)RST_I2C1RCC_CR_HSICAL (0xFF << RCC_CR_HSICAL_SHIFT)CAN_BTR(can_base) MMIO32((can_base) + 0x01C)__ULLFRACT_MIN__ 0.0ULLRUINT_FAST8_MAX__UDQ_IBIT__ 0RCC_BDCR_RTCSEL_NOCLK (0 << RCC_BDCR_RTCSEL_SHIFT)__GCC_CONSTRUCTIVE_SIZE 64RCC_CSR_PORRSTF (1 << 27)__LLFRACT_IBIT__ 0RCC_BDCR_LSEDRV_MEDLO (1 << RCC_BDCR_LSEDRV_SHIFT)uint32_tCAN_TSR_TME0 (1 << 26)BIT12 (1<<12)RCC_CFGR_PLLMUL_MUL2 (0x00 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB1ENR_USART4EN (1 << 19)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HKCAN_TSR_ALST1 (1 << 10)RCC_CIR_HSI14RDYC (1 << 21)RST_DAC1RCC_CFGR_SW_SHIFT 0RCC_CFGR2_PREDIV_DIV10 0x9__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8RCC_CSR_WWDGRSTF (1 << 30)RCC_APB1RSTR_I2C2RST (1 << 22)__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXBIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15RCC_APB2ENR_TIM1EN (1 << 11)__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8RCC_CFGR3_USART1SW_SYSCLK (1 << RCC_CFGR3_USART1SW_SHIFT)DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)RCC_AHBENR_TSCEN (1 << 24)__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1RST_TIM1__thumb__ 1RST_TIM3BIT30 (1<<30)RST_TIM6INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1RCC_CFGR_HPRE_DIV2 (0x8 << RCC_CFGR_HPRE_SHIFT)CAN_FiR2(can_base,bank) MMIO32((can_base) + 0x240 + ((bank) * 0x8) + 0x4)__HQ_FBIT__ 15__bool_true_false_are_defined 1RCC_APB1ENR_USART3EN (1 << 18)RCC_APB1RSTR MMIO32(RCC_BASE + 0x10)BIT26 (1<<26)__SIZE_MAX__ 0xffffffffURCC_CFGR_MCO_HSI14 1__ARM_FEATURE_SATCAN_TSR_TERR2 (1 << 19)CAN_TDL2R(can_base) CAN_TDLxR((can_base), CAN_MBOX2)CAN_BTR_TS1_7TQ (0x6 << 16)CAN_BTR_TS1_3TQ (0x2 << 16)__ARM_ARCHRCC_AHBRSTR_IOPCRST (1 << 19)__LONG_MAX__ 0x7fffffffL__STRICT_ANSI__ 1RCC_CIR_HSI48RDYIE (1 << 14)CAN_ESR_LEC_FORM_ERROR (0x2 << 4)RCC_CFGR_SWS_HSI (0 << RCC_CFGR_SWS_SHIFT)INT_LEAST64_MINPTRDIFF_MAXRCC_CFGR_PLLMUL_SHIFT 18CAN_BTR_TS2_7TQ (0x6 << 20)RCC_CFGR_SW_HSE (1 << RCC_CFGR_SW_SHIFT)ST_TSENSE_CAL1_30C MMIO16(0x1FFFF7B8)__LLFRACT_EPSILON__ 0x1P-63LLRRCC_APB2RSTR_USART6RST (1 << 5)__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53RCC_CFGR_MCO_PLL 7__ARM_ASM_SYNTAX_UNIFIED___REG_BIT(base,bit) (((base) << 5) + (bit))CAN_TDTxR_TGT (1 << 5)WINT_MAX__INT16_C(c) cRCC_APB1ENR_USART2EN (1 << 17)INT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32RST_TIM14RCC_AHBENR MMIO32(RCC_BASE + 0x14)CAN_RIxR_EXID_MASK (0x1FFFFFFF)RST_USART1nartRST_USART3__ATOMIC_ACQ_REL 4RCC_CFGR_PLLSRC0 (1<<15)__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)dataCAN_ESR_EWGF (1 << 0)RST_PWRRCC_CFGR_MCO_NOCLK 0../can.c__FLT32_NORM_MAX__ 3.4028234663852886e+38F32RST_WWDGI2C1_BASE (PERIPH_BASE_APB + 0x5400)CAN_BTR_SJW_MASK (0x3 << 24)UINT64_C(c) __UINT64_C(c)RCC_CFGR3_USART2SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)RCC_APB2RSTR_TIM16RST (1 << 17)RCC_CFGR_HPRE_DIV256 (0xe << RCC_CFGR_HPRE_SHIFT)__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0RCC_APB1RSTR_PWRRST (1 << 28)INT_FAST16_MAXRCC_AHBRSTR_IOPFRST (1 << 22)__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long intIWDG_BASE (PERIPH_BASE_APB + 0x3000)__ARM_FEATURE_CDE_COPROCRST_ADC1__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xGCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| B„ŽPA„…†‡ŽA8 ˜A €‚„…†‡Ž*A„…ŽA A€‚ƒ„Ž*A„…ŽA A€‚ƒ„Ž ÜA €‚„…†‡Ž ˜A €‚„…†‡ŽA+aeabi!6S-MM ñÿ H € `h Ô !#$&(*>@,.02468:<B 4hœÍþ0a AD ½ ÇÞPç˜÷*3*Qo~ŽÜ›±Â˜Î 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0xffffffffffffffffULL__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__INT_FAST32_MAX__ 0x7fffffff__USFRACT_EPSILON__ 0x1P-8UHR__ATOMIC_ACQUIRE 2CRC_IDR MMIO32(CRC_BASE + 0x04)WINT_MAX __WINT_MAX__TIM7_BASE (PERIPH_BASE_APB + 0x1400)INTPTR_MIN__STDC__ 1BIT10 (1<<10)__SIZEOF_LONG__ 4CRC_DR MMIO32(CRC_BASE + 0x00)__DBL_MAX_EXP__ 1024__ATOMIC_CONSUME 1PTRDIFF_MAX__INT_FAST32_WIDTH__ 32__ARM_BF16_FORMAT_ALTERNATIVE__WINT_TYPE__ unsigned intBIT16 (1<<16)__LONG_MAX__ 0x7fffffffL__INT16_MAX__ 0x7fff__ULFRACT_FBIT__ 32__SCHAR_WIDTH__ 8__ACCUM_MIN__ (-0X1P15K-0X1P15K)__SIZEOF_DOUBLE__ 8INT8_MAX__GNUC_PATCHLEVEL__ 1USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)UINT_LEAST64_MAX __UINT_LEAST64_MAX____GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DIG__ 15__FRACT_MAX__ 0X7FFFP-15R__WINT_MIN__ 0U__ULACCUM_FBIT__ 32__FLT_NORM_MAX__ 3.4028234663852886e+38F__UFRACT_MIN__ 0.0URBIT24 (1<<24)SPI1_BASE (PERIPH_BASE_APB + 0x13000)__ARM_NEON_FPUINT32_C(c) __UINT32_C(c)UINT16_MAX __UINT16_MAX____ULLACCUM_IBIT__ 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1__SOFTFP__ 1BIT12 (1<<12)__FLT64_EPSILON__ 2.2204460492503131e-16F64INTMAX_MAX __INTMAX_MAX__SYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)crc_set_initial__GCC_ATOMIC_LLONG_LOCK_FREE 1__FLT_MAX_EXP__ 128__ATOMIC_ACQ_REL 4__UINT_FAST64_TYPE__ long long unsigned intSCS_BASE (PPBI_BASE + 0xE000)unsigned charWCHAR_MAX__UINTMAX_TYPE__ long long unsigned intCRC_DR16 MMIO16(CRC_BASE + 0x00)__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__LDBL_EPSILON__ 2.2204460492503131e-16L__INTPTR_TYPE__ intBIT9 (1<<9)__DEC_EVAL_METHOD__ 2__USACCUM_MIN__ 0.0UHKUINTMAX_MAX __UINTMAX_MAX____USFRACT_IBIT__ 0EXTI_BASE (PERIPH_BASE_APB + 0x10400)__INT_LEAST32_WIDTH__ 32__ARM_FEATURE_DSP__GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"__UINT_FAST32_TYPE__ unsigned intUINT64_MAX__DQ_IBIT__ 0__FLT_MAX__ 3.4028234663852886e+38F__FLT32_MIN__ 1.1754943508222875e-38F32PERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)MMIO8(addr) (*(volatile uint8_t *)(addr))__SIZE_TYPE__ unsigned intWCHAR_MIN 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2í¯MñD>ò^góƒôžLõk/öÓ÷@øÜù„ú-mû–(üZý¨þÿ„€X„D…¥&†´)‡%7ˆò?‰'g‹Œ¨Xº?Ž©0;Æh’RZ“¶:”ò.•Z—‹a˜\™%šo› Sœ;QžÇ¢8£õM¤ð-¥¦ U§ J¨ª©>2ªÚ8«„L¬4#¸&3¾xZ©”-é‰û ../common/usr/lib/gcc/arm-none-eabi/12.2.1/include../../../include/libopencm3/stm32/f0../../../include/libopencm3/stm32/common../../../include/libopencm3/stm32../../../include/libopencm3/cm3crs_common_all.cstdint.hrcc.hrcc_common_all.hcrs.hcommon.hstdbool.hmemorymap.hmemorymap.hmemorymap.hcrs.hcrs_common_all.hrcc.h'!> / > ./ / RCC_APB2ENR_SYSCFGCOMPEN (1 << 0)SCB_BASE (SCS_BASE + 0x0D00)__UHA_FBIT__ 8RCC_APB1ENR_CECEN (1 << 30)RCC_CIR_LSERDYIE (1 << 9)RCC_CFGR2_PREDIV_DIV15 0xeDMA_BASE (PERIPH_BASE_AHB1 + 0x0000)CRS_CFGR_SYNCSRC_SHIFT 28CORESIGHT_LSR_SLK (1<<1)RCC_CIR_LSIRDYF (1 << 0)__CHAR_UNSIGNED__ 1RCC_CSR_LSION (1 << 0)CRS_CR_ESYNCIE (1 << 3)RCC_BDCR_LSEDRV_MEDHI (2 << RCC_BDCR_LSEDRV_SHIFT)RCC_USB__FLT64_HAS_INFINITY__ 1RCC_CFGR_PLLMUL_MUL4 (0x02 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB1ENR MMIO32(RCC_BASE + 0x1c)__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffff__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)TIM1_BASE (PERIPH_BASE_APB + 0x12C00)__INTMAX_MAX__ 0x7fffffffffffffffLLRCC_APB1ENR_TIM6EN (1 << 4)CRS_CFGR_SYNCSRC_LSE (1 << CRS_CFGR_SYNCSRC_SHIFT)__TQ_IBIT__ 0rcc_periph_clken__FLT64_DECIMAL_DIG__ 17RCC_CSR_RMVF (1 << 24)__LDBL_MIN__ 2.2250738585072014e-308LINT_FAST64_MAX__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffU__ARM_FEATURE_QBITRCC_CFGR2_PREDIV_DIV14 0xdRCC_CR2_HSI48CAL_SHIFT 24INT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8__DBL_MAX_10_EXP__ 308__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned intRCC_APB1RSTR_USART2RST (1 << 17)CRS_CFGR MMIO32(CRS_BASE + 0x04)__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__FLT32_MIN__ 1.1754943508222875e-38F32__USACCUM_MIN__ 0.0UHKRCC_CFGR_PLLSRC_HSI_CLK_DIV2 0x0__FLT32_DECIMAL_DIG__ 9__DECIMAL_DIG__ 17__LDBL_MIN_EXP__ (-1021)__LDBL_MANT_DIG__ 53RCC_CFGR_HPRE_DIV16 (0xb << RCC_CFGR_HPRE_SHIFT)INT64_MIN (-INT64_MAX - 1)WWDG_BASE (PERIPH_BASE_APB + 0x2c00)CRS_CR_TRIM (0x3F << CRS_CR_TRIM_SHIFT)__UINT8_C(c) c__INT16_TYPE__ short int__FLT64_MAX__ 1.7976931348623157e+308F64RCC_CFGR3_USART2SW_SYSCLK (1 << RCC_CFGR3_USART2SW_SHIFT)UINT_FAST32_MAXRCC_CSR_RESET_FLAGS (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF | RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF | RCC_CSR_PINRSTF | RCC_CSR_OBLRSTF)INT_FAST64_MAX __INT_FAST64_MAX__RCC_CR2_HSI14TRIM_SHIFT 3__UINT_LEAST16_MAX__ 0xffff__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64RCC_CFGR_PLLMUL_MUL13 (0x0B << RCC_CFGR_PLLMUL_SHIFT)RCC_CSR_SFTRSTF (1 << 28)CRS_ISR_TRIMOVF (1 << 10)USART5_BASE (PERIPH_BASE_APB + 0x5000)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intGPIO_PORT_C_BASE (PERIPH_BASE_AHB2 + 0x0800)CRS_CFGR_RELOAD_VAL(x) ((x) << CRS_CFGR_RELOAD_SHIFT)INT32_MIN (-INT32_MAX - 1)RCC_AHBENR_SRAMEN (1 << 2)__FLT32_MAX_10_EXP__ 38RCC_CIR MMIO32(RCC_BASE + 0x08)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZRCC_APB1RSTR_TIM3RST (1 << 1)__UINTPTR_MAX__ 0xffffffffU__FLT32_MIN_EXP__ (-125)RCC_CIR_HSIRDYC (1 << 18)RCC_CFGR2_PREDIV_DIV7 0x6UINT32_MAX __UINT32_MAX__TIM3_BASE (PERIPH_BASE_APB + 0x0400)RCC_AHBENR_DMA2EN (1 << 1)USART8_BASE (PERIPH_BASE_APB + 0x11C00)__ULFRACT_FBIT__ 32RCC_APB2ENR_USART1EN (1 << 14)__FLT64_MIN_10_EXP__ (-307)RCC_APB1ENR_TIM14EN (1 << 8)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__RCC_CFGR_HPRE_SHIFT 4RCC_CFGR_HPRE_DIV4 (0x9 << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_MCOPRE_DIV32 (5 << RCC_CFGR_MCOPRE_SHIFT)__SFRACT_EPSILON__ 0x1P-7HR__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAX__SQ_FBIT__ 31INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)__UHQ_FBIT__ 16__FLT64_MIN_EXP__ (-1021)__PTRDIFF_WIDTH__ 32INT_FAST8_MAXINT8_C(c) __INT8_C(c)__UINT_FAST8_MAX__ 0xffffffffUUINT16_C(c) __UINT16_C(c)RCC_APB2ENR_ADCEN (1 << 9)__LACCUM_IBIT__ 32RCC_CFGR_PLLMUL_MUL7 (0x05 << RCC_CFGR_PLLMUL_SHIFT)RCC_BDCR_LSEDRV_SHIFT 3__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__INTPTR_MAX__ 0x7fffffffCRS_ISR_FECAP (0xFFFF << CRS_ISR_FECAP_SHIFT)__UINT_FAST16_MAX__ 0xffffffffUINT64_C(c) __INT64_C(c)../common/crs_common_all.cRCC_CFGR3_USART2SW_SHIFT 16__GCC_IEC_559_COMPLEX 0__UFRACT_MIN__ 0.0URRCC_CFGR_MCO_SHIFT 24WCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__GPIO_PORT_D_BASE (PERIPH_BASE_AHB2 + 0x0C00)__UINT_LEAST8_TYPE__ unsigned charRCC_AHBENR_GPIOFEN (1 << 22)RCC_PWR__ACCUM_FBIT__ 15__UACCUM_IBIT__ 16NVIC_BASE (SCS_BASE + 0x0100)UINT8_MAXSIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1__FLT32X_EPSILON__ 2.2204460492503131e-16F32x__UINT_FAST64_MAX__ 0xffffffffffffffffULLCRS_ICR MMIO32(CRS_BASE + 0x0c)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32__FLT64_MAX_10_EXP__ 308__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 1BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON__RCC_CFGR_PPRE_MASK 0x7__FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)CRS_CR_TRIM_SHIFT 8BIT7 (1<<7)USART6_BASE (PERIPH_BASE_APB + 0x11400)__FLT32X_MIN_10_EXP__ (-307)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICRCC_SPI2LIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64USART2_BASE (PERIPH_BASE_APB + 0x4400)__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4WINT_MIN __WINT_MIN__RCC_APB2RSTR_TIM15RST (1 << 16)CRS_ICR_ESYNCC (1 << 3)RCC_APB2RSTR_USART8RST (1 << 7)RCC_CFGR2_PREDIV_DIV13 0xcRCC_BDCR_RTCEN (1 << 15)__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32RCC_AHBRSTR_IOPERST (1 << 21)__FLT32X_MIN_EXP__ (-1021)INFO_BASE (0x1ffff000U)TIM17_BASE (PERIPH_BASE_APB + 0x14800)BIT27 (1<<27)TIM7_BASE (PERIPH_BASE_APB + 0x1400)RCC_CFGR_MCO_LSE 3RCC_CFGR3_USARTxSW_MASK 3__UTA_FBIT__ 64RCC_CIR_LSERDYC (1 << 17)__FLT_DECIMAL_DIG__ 9__thumb__ 1signed charCRS_CFGR_RELOAD_SHIFT 0INTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1__INT64_C(c) c ## LL__FRACT_FBIT__ 15__FLT_HAS_QUIET_NAN__ 1RCC_CFGR2_PREDIV_DIV8 0x7__GNUC_PATCHLEVEL__ 1PTRDIFF_MINGNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsRCC_TIM6RCC_AHBENR_DMA1EN (1 << 0)__FLT32_HAS_QUIET_NAN__ 1UINTPTR_MAX __UINTPTR_MAX____ARM_ARCH_PROFILE 77RCC_CR2_HSI48ON (1 << 16)RCC_AHBRSTR_IOPBRST (1 << 18)GPIO_PORT_E_BASE (PERIPH_BASE_AHB2 + 0x1000)__FLT_DIG__ 6__WCHAR_WIDTH__ 32MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINRCC_APB1RSTR_CECRST (1 << 30)__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38__FRACT_MAX__ 0X7FFFP-15RPERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)RCC_CFGR_MCO_SYSCLK 4__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5RCC_APB2ENR_USART8EN (1 << 7)__ARM_ARCH_EXT_IDIV__PERIPH_BASE_APB (PERIPH_BASE + 0x00000000)RCC_CFGR2_PREDIV_DIV3 0x2RCC_AHBENR_GPIODEN (1 << 20)RCC_CIR_PLLRDYF (1 << 4)RCC_CFGR2_PREDIV_DIV6 0x5__UINT16_MAX__ 0xffff__TQ_FBIT__ 127RCC_CFGR_MCO_HSI 5TIM14_BASE (PERIPH_BASE_APB + 0x2000)__USQ_FBIT__ 32INT_FAST16_MINRCC_CSR_IWDGRSTF (1 << 29)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32CRS_CR_SYNCOKIE (1 << 0)RCC_APB1ENR_TIM2EN (1 << 0)RCC_APB1ENR_TIM7EN (1 << 5)SPI1_BASE (PERIPH_BASE_APB + 0x13000)INT_FAST32_MIN (-INT_FAST32_MAX - 1)RCC_CFGR_MCO_MASK 0xfCEC_BASE (PERIPH_BASE_APB + 0x7800)RCC_CFGR2_PREDIV_DIV9 0x8UINT_LEAST8_MAXRCC_CFGR_SW_HSI48 (3 << RCC_CFGR_SW_SHIFT)RCC_APB1ENR_PWREN (1 << 28)UINT8_C(c) __UINT8_C(c)RCC_CIR_HSIRDYIE (1 << 10)__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX____USA_IBIT__ 16RCC_CFGR_MCO_HSI48 8PTRDIFF_MIN (-PTRDIFF_MAX - 1)RCC_CSR_V18PWRRSTF (1 << 23)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__DBL_IS_IEC_60559__ 2__UINT_FAST64_TYPE__ long long unsigned intTIM2_BASE (PERIPH_BASE_APB + 0x0000)RCC_CFGR_PLLMUL_MUL9 (0x07 << RCC_CFGR_PLLMUL_SHIFT)RCC_CFGR_PLLXTPRE (1<<17)CRS_CFGR_FELIM_SHIFT 16__FLT_MIN__ 1.1754943508222875e-38FCRS_ICR_SYNCOKC (1 << 0)__HA_FBIT__ 7__FDPIC__RCC_GPIOARCC_GPIOB__UINT32_C(c) c ## ULRCC_GPIODRCC_GPIOERCC_GPIOFRCC_CFGR_HPRE_DIV64 (0xc << RCC_CFGR_HPRE_SHIFT)RCC_CSR_PINRSTF (1 << 26)INT_FAST64_MIN__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16L__USFRACT_MIN__ 0.0UHRTSC_BASE (PERIPH_BASE_AHB1 + 0x4000)RCC_CFGR_PLLMUL_MUL8 (0x06 << RCC_CFGR_PLLMUL_SHIFT)__ARM_NEONRCC_BDCR_RTCSEL_LSI (2 << RCC_BDCR_RTCSEL_SHIFT)__UINT8_MAX__ 0xffRCC_CR2_HSI14ON (1 << 0)RCC_CFGR_HPRE_DIV8 (0xa << RCC_CFGR_HPRE_SHIFT)__LDBL_MAX_EXP__ 1024RCC_CIR_PLLRDYC (1 << 20)LIBOPENCM3_MEMORYMAP_H RCC_CFGR_HPRE_MASK 0xfRCC_APB1ENR_USBEN (1 << 23)__DBL_HAS_DENORM__ 1CRS_ISR_FEDIR (1 << 15)RCC_APB1RSTR_USBRST (1 << 23)__DA_FBIT__ 31BIT17 (1<<17)__GXX_ABI_VERSION 1017RCC_CFGR_PPRE_DIV16 (7 << RCC_CFGR_PPRE_SHIFT)__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LRCC_CFGR3_USART1SW_PCLK (0 << RCC_CFGR3_USART1SW_SHIFT)INT_LEAST32_MAX __INT_LEAST32_MAX__RCC_BDCR_LSEDRV_HIGH (3 << RCC_BDCR_LSEDRV_SHIFT)INT_LEAST8_MAX __INT_LEAST8_MAX__RCC_CFGR_SWS_PLL (2 << RCC_CFGR_SWS_SHIFT)CRS_CFGR_FELIM_VAL(x) ((x) << CRS_CFGR_FELIM_SHIFT)CRS_ISR_SYNCERR (1 << 8)USART3_BASE (PERIPH_BASE_APB + 0x4800)RCC_CFGR_PLLXTPRE_HSE_CLK_DIV2 0x1UINTMAX_MAX__UACCUM_MIN__ 0.0UKRCC_CFGR3_USART3SW (3 << RCC_CFGR3_USART2SW_SHIFT)__FLT_EPSILON__ 1.1920928955078125e-7F__PTRDIFF_TYPE__ int__ARM_ARCH_ISA_THUMBRCC_CR_HSEON (1 << 16)RCC_CFGR_MCO_HSE 6__ARM_FEATURE_MATMUL_INT8__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0RCC_APB1RSTR_USART5RST (1 << 20)DBGMCU_BASE (PERIPH_BASE_APB + 0x15800)__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)TIM16_BASE (PERIPH_BASE_APB + 0x14400)RCC_APB2RSTR_USART1RST (1 << 14)INT8_MAXRCC_CFGR2_PREDIV_DIV11 0xaCRS_CFGR_SYNCSRC_GPIO (0 << CRS_CFGR_SYNCSRC_SHIFT)RCC_CFGR_MCOPRE_DIV4 (2 << RCC_CFGR_MCOPRE_SHIFT)__LDBL_HAS_INFINITY__ 1RCC_CFGR_MCOPRE_DIV1 (0 << RCC_CFGR_MCOPRE_SHIFT)__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))RCC_CFGR3_USART3SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)__FLT32X_MAX_10_EXP__ 308__ARM_PCS 1RCC_CFGR_MCOPRE_DIV8 (3 << RCC_CFGR_MCOPRE_SHIFT)bool _BoolRCC_CRCRCC_APB2ENR_TIM15EN (1 << 16)UINTMAX_MAX __UINTMAX_MAX__RCC_CFGR_PLLMUL_MUL12 (0x0A << RCC_CFGR_PLLMUL_SHIFT)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffRCC_CFGR_PLLMUL_MUL15 (0x0D << RCC_CFGR_PLLMUL_SHIFT)BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)RCC_CR_HSIRDY (1 << 1)RCC_CRS__FLT32X_IS_IEC_60559__ 2SYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXRCC_CFGR_SW_HSE (1 << RCC_CFGR_SW_SHIFT)PERIPH_BASE_AHB1 (PERIPH_BASE + 0x00020000)__INT_LEAST16_WIDTH__ 16RCC_CR_HSITRIM (0x1F << RCC_CR_HSITRIM_SHIFT)RCC_APB1RSTR_TIM14RST (1 << 8)__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLCRS_CFGR_SYNCDIV_DIV2 (1 << CRS_CFGR_SYNCDIV_SHIFT)RCC_BDCR_LSERDY (1 << 1)INT16_MIN (-INT16_MAX - 1)_REG_BIT__USFRACT_EPSILON__ 0x1P-8UHRRCC_DAC1__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)RCC_CR2_HSI48RDY (1 << 17)RCC_AHBRSTR_IOPDRST (1 << 20)/build/libopencm3/lib/stm32/f0__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffULRCC_DMACRS_CFGR_SYNCPOL (1 << 31)__INT_LEAST8_MAX__ 0x7fRCC_CFGR3_CECSW (1 << 6)__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXDAC_BASE (PERIPH_BASE_APB + 0x7400)RCC_CFGR2_PREDIV_DIV5 0x4RCC_CAN1RCC_CIR_LSERDYF (1 << 1)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024RCC_TIM1RCC_TIM2RCC_TIM3CRS_CR_SYNCWARNIE (1 << 1)__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)RCC_TIM7CRS_CFGR_SYNCDIV_DIV4 (2 << CRS_CFGR_SYNCDIV_SHIFT)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1__ACCUM_MAX__ 0X7FFFFFFFP-15KRCC_CFGR MMIO32(RCC_BASE + 0x04)__INT8_MAX__ 0x7fBIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intRCC_AHBRSTR_IOPARST (1 << 17)RCC_CR2_HSI14TRIM (31 << RCC_CR2_HSI14TRIM_SHIFT)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MINRCC_APB1RSTR_WWDGRST (1 << 11)__FLT_EVAL_METHOD_TS_18661_3__ 0ST_VREFINT_CAL MMIO16(0x1FFFF7BA)__SCHAR_WIDTH__ 8rcc_apb2_frequency rcc_apb1_frequencyBIT18 (1<<18)UINT_FAST16_MAX__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32RCC_BDCR_RTCSEL_LSE (1 << RCC_BDCR_RTCSEL_SHIFT)__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)CRS_CFGR_SYNCSRC (3 << CRS_CFGR_SYNCSRC_SHIFT)RCC_CFGR_HPRE_NODIV (0x0 << RCC_CFGR_HPRE_SHIFT)__INT32_MAX__ 0x7fffffffLST_TSENSE_CAL2_110C MMIO16(0x1FFFF7C2)RCC_FLTIFEXTI_BASE (PERIPH_BASE_APB + 0x10400)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLRCC_CIR_CSSC (1 << 23)__ARM_FEATURE_BF16_VECTOR_ARITHMETICRCC_BDCR_LSEDRV_LOW (0 << RCC_BDCR_LSEDRV_SHIFT)RCC_CIR_HSI14RDYIE (1 << 13)LIBOPENCM3_RCC_H PPBI_BASE (0xE0000000U)RCC_APB1ENR_CRSEN (1 << 27)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__RCC_CFGR_PLLMUL_MUL6 (0x04 << RCC_CFGR_PLLMUL_SHIFT)INT8_MAX __INT8_MAX__RCC_CSR_LSIRDY (1 << 1)__INT_LEAST16_TYPE__ short int__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1RCC_CFGR3_USART3SW_SYSCLK (1 << RCC_CFGR3_USART2SW_SHIFT)ADC_BASE (PERIPH_BASE_APB + 0x12400)RCC_CFGR_PPRE_DIV4 (5 << RCC_CFGR_PPRE_SHIFT)__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0RCC_CR_HSERDY (1 << 17)__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64RCC_BDCR MMIO32(RCC_BASE + 0x20)UINTPTR_MAXcrs_autotrim_usb_enableRCC_CR2_HSI14DIS (1 << 2)__LDBL_DENORM_MIN__ 4.9406564584124654e-324LRCC_ADC1__INT64_MAX__ 0x7fffffffffffffffLLRCC_APB1ENR_USART2EN (1 << 17)RCC_BDCR_LSEDRV (3 << RCC_BDCR_LSEDRV_SHIFT)__ULLFRACT_IBIT__ 0CRS CRS_BASERCC_CFGR_HPRE (0xf << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_MCOPRE_DIV2 (1 << RCC_CFGR_MCOPRE_SHIFT)MMIO16(addr) (*(volatile uint16_t *)(addr))RCC_APB2ENR_SPI1EN (1 << 12)RCC_CSR_LPWRRSTF (1 << 31)__GNUC__ 12RCC_CFGR_SW (3 << RCC_CFGR_SW_SHIFT)WCHAR_MAXRCC_CFGR3_USBSW (1 << 7)__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16RCC_CFGR3_USART2SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0RCC_CFGR_SWS_SHIFT 2CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1RCC_ADCRCC_CIR_HSIRDYF (1 << 2)__ARM_ARCH 6__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXRCC_CIR_HSI48RDYF (1 << 6)__LDBL_HAS_QUIET_NAN__ 1__LONG_LONG_WIDTH__ 64BIT6 (1<<6)RCC_APB1ENR_I2C2EN (1 << 22)RCC_CFGR_MCOPRE_SHIFT 28LIBOPENCM3_CRS_H RCC_APB2RSTR MMIO32(RCC_BASE + 0x0c)__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1RCC_CIR_LSIRDYC (1 << 16)RCC_CFGR_MCO_LSI 2BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024RCC_CFGR2_PREDIV_NODIV 0x0UINT16_MAXRCC_APB1ENR_USART5EN (1 << 20)__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLCRS_CFGR_FELIM (0xFF << CRS_CFGR_FELIM_SHIFT)RCC_APB1ENR_CANEN (1 << 25)__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4RCC_CFGR_SWS_HSE (1 << RCC_CFGR_SWS_SHIFT)RCC_CFGR_PPRE_SHIFT 8RCC_CFGR3_USART2SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)RCC_CFGR3_USART3SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)CRS_ICR_ERRC (1 << 2)RCC_CR_HSION (1 << 0)__UFRACT_MAX__ 0XFFFFP-16URRCC_APB1RSTR_TIM7RST (1 << 5)INT64_MAXINT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0RCC_CFGR3 MMIO32(RCC_BASE + 0x30)RCC_APB2RSTR_TIM1RST (1 << 11)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__RCC_TIM14RCC_TIM15RCC_TIM16RCC_TIM17SYS_TICK_BASE (SCS_BASE + 0x0010)CRS_ISR_ESYNCF (1 << 3)__USER_LABEL_PREFIX__ __ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)RCC_CFGR_PPRE_DIV2 (4 << RCC_CFGR_PPRE_SHIFT)SPI2_BASE (PERIPH_BASE_APB + 0x3800)RCC_SRAM__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)__INT_FAST32_TYPE__ intCRS_BASE (PERIPH_BASE_APB + 0x6C00)unsigned int__GCC_ASM_FLAG_OUTPUTS__CRS_CR MMIO32(CRS_BASE + 0x00)__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1RCC_APB1RSTR_DACRST (1 << 29)RCC_CIR_HSI14RDYF (1 << 5)RCC_CFGR_MCOPRE_DIV64 (6 << RCC_CFGR_MCOPRE_SHIFT)__USACCUM_IBIT__ 8RCC_CFGR3_USART3SW_SHIFT 18__FLT64_HAS_DENORM__ 1__ULLACCUM_IBIT__ 32__UACCUM_EPSILON__ 0x1P-16UKRCC_BDCR_RTCSEL_SHIFT 8RCC_APB1RSTR_USART4RST (1 << 19)__FLT_EVAL_METHOD__ 0__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__thumb2__LIBOPENCM3_RCC_COMMON_ALL_H RCC_BASE (PERIPH_BASE_AHB1 + 0x1000)__ARM_FEATURE_LDREX__UQQ_FBIT__ 8RCC_SYSCFG_COMPINT16_C__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1RCC_APB2RSTR_SYSCFGRST (1 << 0)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__CORESIGHT_LAR_OFFSET 0xfb0RTC_BASE (PERIPH_BASE_APB + 0x2800)__UINT8_TYPE__ unsigned charRCC_AHBRSTR_TSCRST (1 << 24)RCC_AHBENR_GPIOCEN (1 << 19)__SIG_ATOMIC_TYPE__ intCRS_CFGR_SYNCDIV_NODIV (0 << CRS_CFGR_SYNCDIV_SHIFT)RCC_AHBENR_FLTFEN (1 << 4)UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"RCC_CSR_OBLRSTF (1 << 25)INT8_MINRCC_CFGR_HPRE_DIV512 (0xf << RCC_CFGR_HPRE_SHIFT)CRS_CR_SWSYNC (1 << 7)PERIPH_BASE (0x40000000U)true 1CRS_ISR_FECAP_SHIFT 16__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)RCC_APB2ENR MMIO32(RCC_BASE + 0x18)__LDBL_MIN_10_EXP__ (-307)long intINT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__GCC_ATOMIC_CHAR_LOCK_FREE 1RCC_CFGR_PLLMUL (0x0F << RCC_CFGR_PLLMUL_SHIFT)BIT28 (1<<28)__LFRACT_EPSILON__ 0x1P-31LRRCC_APB1ENR_I2C1EN (1 << 21)RCC_CR2_HSI14CAL (0xFF << RCC_CR2_HSI14CAL_SHIFT)__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX____FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1RCC_CR MMIO32(RCC_BASE + 0x00)RCC_CFGR_PLLMUL_MUL3 (0x01 << RCC_CFGR_PLLMUL_SHIFT)__FLT32_MIN_10_EXP__ (-37)MMIO64(addr) (*(volatile uint64_t *)(addr))__ARM_FP16_FORMAT_ALTERNATIVERCC_GPIOCRCC_APB1RSTR_CANRST (1 << 25)INTPTR_MINRCC_AHBENR_DMAEN RCC_AHBENR_DMA1ENDESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)INT16_MAX __INT16_MAX____BIGGEST_ALIGNMENT__ 8RCC_SPI1RCC_APB1RSTR_TIM2RST (1 << 0)CRS_CR_CEN (1 << 5)__TA_IBIT__ 64__ARM_FEATURE_SIMD32RCC_CR2_HSI14RDY (1 << 1)RCC_CFGR2_PREDIV_DIV4 0x3CRS_CFGR_SYNCDIV_SHIFT 24__ARM_FEATURE_QRDMX__ARM_ARCH_ISA_THUMB 1DESIG_FLASH_SIZE_BASE (0x1FFFF7CCU)__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__RCC_CFGR_MCOPRE_DIV16 (4 << RCC_CFGR_MCOPRE_SHIFT)RCC_CFGR2_PREDIV 0xfBIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0RCC_CR2_HSI48CAL (0xFF << RCC_CR2_HSI48CAL_SHIFT)_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____ULACCUM_MIN__ 0.0ULK__SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1RCC_CIR_LSIRDYIE (1 << 8)INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1__FLT32_DIG__ 6CRS_CFGR_SYNCDIV_DIV32 (5 << CRS_CFGR_SYNCDIV_SHIFT)INT_LEAST16_MAXCRS_CFGR_RELOAD (0xFFFF << CRS_CFGR_RELOAD_SHIFT)TIM6_BASE (PERIPH_BASE_APB + 0x1000)BIT15 (1<<15)RCC_APB2RSTR_DBGMCURST (1 << 22)CRS_ISR_SYNCOOKF (1 << 0)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7CRS_ISR MMIO32(CRS_BASE + 0x08)INT32_MAXCRS_CFGR_SYNCSRC_USB_SOF (2 << CRS_CFGR_SYNCSRC_SHIFT)RCC_BDCR_BDRST (1 << 16)__ACCUM_MIN__ (-0X1P15K-0X1P15K)RCC_CFGR3_USART1SW_HSI (3 << RCC_CFGR3_USART1SW_SHIFT)__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intRCC_CFGR_PLLNODIV (1 << 31)RCC_CFGR_PLLSRC (1<<16)RCC_CFGR_PLLSRC_HSE_CLK 0x1BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)__FLT_NORM_MAX__ 3.4028234663852886e+38FUSART1_BASE (PERIPH_BASE_APB + 0x13800)RCC_CFGR3_USART1SW_LSE (2 << RCC_CFGR3_USART1SW_SHIFT)long long unsigned intRCC_BDCR_RTCSEL_HSE (3 << RCC_BDCR_RTCSEL_SHIFT)__FLT_MIN_10_EXP__ (-37)GPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)RCC_AHBENR_GPIOAEN (1 << 17)__ULACCUM_IBIT__ 32RCC_AHBENR_GPIOEEN (1 << 21)__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__ULLACCUM_EPSILON__ 0x1P-32ULLKRCC_CFGR_PPRE_NODIV (0 << RCC_CFGR_PPRE_SHIFT)__APCS_32__ 1__DQ_FBIT__ 63INT_LEAST64_MAX__SACCUM_IBIT__ 8RCC_CR_HSITRIM_SHIFT 3__UHQ_IBIT__ 0LIBOPENCM3_MEMORYMAP_COMMON_H RCC_CR2_HSI14CAL_SHIFT 8BIT29 (1<<29)RCC_CFGR_SWS (3 << RCC_CFGR_SWS_SHIFT)__INT_FAST16_TYPE__ intRCC_CFGR_ADCPRE (1<<14)USART7_BASE (PERIPH_BASE_APB + 0x11800)RCC_AHBENR MMIO32(RCC_BASE + 0x14)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRRCC_AHBRSTR_IOPCRST (1 << 19)__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intRCC_CIR_HSERDYIE (1 << 11)__FLT32X_DIG__ 15RCC_CFGR_HPRE_DIV128 (0xd << RCC_CFGR_HPRE_SHIFT)RCC_APB1RSTR_CRSRST (1 << 27)__UTQ_FBIT__ 128RCC_APB2ENR_TIM17EN (1 << 18)__LLACCUM_EPSILON__ 0x1P-31LLK__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffRCC_APB1ENR_TIM3EN (1 << 1)DMA2_BASE (PERIPH_BASE_AHB1 + 0x0400)PTRDIFF_MAX __PTRDIFF_MAX__RCC_CFGR2_PREDIV_DIV16 0xfRCC_CFGR_PLLMUL_MUL14 (0x0C << RCC_CFGR_PLLMUL_SHIFT)RCC_CR_PLLRDY (1 << 25)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKRCC_CFGR3_USART2SW (3 << RCC_CFGR3_USART2SW_SHIFT)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRRCC_CFGR_PLLMUL_MUL5 (0x03 << RCC_CFGR_PLLMUL_SHIFT)RCC_AHBRSTR MMIO32(RCC_BASE + 0x28)RCC_DMA1RCC_DMA2__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intRCC_APB2RSTR_USART7RST (1 << 6)RCC_CFGR_SW_HSI (0 << RCC_CFGR_SW_SHIFT)RCC_CFGR2_PREDIV_DIV12 0xbRCC_CFGR3_I2C1SW (1 << 4)WCHAR_MINDMA1_BASE DMA_BASERCC_CFGR3_ADCSW (1 << 8)BEGIN_DECLS _REG_BIT(base,bit) (((base) << 5) + (bit))CRS_CFGR_SYNCDIV_DIV128 (7 << CRS_CFGR_SYNCDIV_SHIFT)RCC_APB2RSTR_SPI1RST (1 << 12)USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)CRS_ISR_SYNCMISS (1 << 9)__DQ_IBIT__ 0RCC_CSR MMIO32(RCC_BASE + 0x24)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)RCC_CFGR3_USART1SW (3 << RCC_CFGR3_USART1SW_SHIFT)RCC_CR2 MMIO32(RCC_BASE + 0x34)__ARM_EABI__ 1INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1RCC_CR_HSICAL (0xFF << RCC_CR_HSICAL_SHIFT)RCC_CIR_HSERDYF (1 << 3)RCC_APB1RSTR_TIM6RST (1 << 4)RCC_CFGR_SWS_HSI48 (3 << RCC_CFGR_SWS_SHIFT)__QQ_IBIT__ 0RCC_CR_PLLON (1 << 24)DESIG_UNIQUE_ID_BASE (0x1FFFF7ACU)__LLACCUM_FBIT__ 31RCC_APB2ENR_USART6EN (1 << 5)__UINTMAX_TYPE__ long long unsigned intRCC_BDCR_RTCSEL (3 << RCC_BDCR_RTCSEL_SHIFT)__USQ_IBIT__ 0__UINT_LEAST32_TYPE__ long unsigned intRCC_CFGR_SW_PLL (2 << RCC_CFGR_SW_SHIFT)RCC_APB2ENR_USART7EN (1 << 6)__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 1RCC_APB2RSTR_TIM17RST (1 << 18)STM32F0 1INT_LEAST8_MININTMAX_MAXDEBUG_BASE (SCS_BASE + 0x0DF0)RCC_APB1ENR_SPI2EN (1 << 14)RCC_CIR_CSSF (1 << 7)RCC_WWDG__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__LFRACT_MIN__ (-0.5LR-0.5LR)__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CRCC_APB1ENR_WWDGEN (1 << 11)INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intUINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULR__ARM_ARCH_6M__ 1RCC_CAN__UINT64_TYPE__ long long unsigned intI2C2_BASE (PERIPH_BASE_APB + 0x5800)RCC_CIR_PLLRDYIE (1 << 12)RCC_CFGR3_USART1SW_SHIFT 0CRS_ICR_SYNCWARNC (1 << 1)RCC_APB2ENR_TIM16EN (1 << 17)RCC_APB1RSTR_I2C1RST (1 << 21)__LONG_MAX__ 0x7fffffffLTIM15_BASE (PERIPH_BASE_APB + 0x14000)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16CRS_CR_AUTOTRIMEN (1 << 6)FLASH_BASE (0x08000000U)RCC_TSCRCC_BDCR_LSEON (1 << 0)FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x2000)short intRCC_AHBENR_GPIOBEN (1 << 18)CRS_CFGR_SYNCDIV_DIV8 (3 << CRS_CFGR_SYNCDIV_SHIFT)__FLT32_IS_IEC_60559__ 2__UINT16_C(c) cBIT31 (1<<31)__UDA_IBIT__ 32UINT_LEAST32_MAXBIT2 (1<<2)RCC_CFGR_MCOPRE_DIV128 (7 << RCC_CFGR_MCOPRE_SHIFT)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCRCC_APB1ENR_DACEN (1 << 29)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53RCC_BDCR_LSEBYP (1 << 2)RCC_APB1RSTR_SPI2RST (1 << 14)BIT5 (1<<5)BIT1 (1<<1)USART4_BASE (PERIPH_BASE_APB + 0x4C00)INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1CRS_CFGR_SYNCDIV_DIV64 (6 << CRS_CFGR_SYNCDIV_SHIFT)__DBL_DECIMAL_DIG__ 17RCC_RTCBIT8 (1<<8)RCC_CIR_HSI48RDYC (1 << 22)INT16_C(c) __INT16_C(c)RCC_CFGR2 MMIO32(RCC_BASE + 0x2c)__INT16_MAX__ 0x7fffrcc_periph_clock_enableRCC_APB1RSTR_USART3RST (1 << 18)RCC_APB2ENR_DBGMCUEN (1 << 22)__INT_WIDTH__ 32RCC_CR_HSEBYP (1 << 18)__QQ_FBIT__ 7POWER_CONTROL_BASE (PERIPH_BASE_APB + 0x7000)__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64RCC_CFGR3_USART3SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)RCC_CFGR2_PREDIV_DIV2 0x1__UTA_IBIT__ 64RCC_CFGR_PLLMUL_MUL10 (0x08 << RCC_CFGR_PLLMUL_SHIFT)__LDBL_NORM_MAX__ 1.7976931348623157e+308L__ULLFRACT_EPSILON__ 0x1P-64ULLRGPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)__UINT_LEAST32_MAX__ 0xffffffffUL__SIZEOF_WINT_T__ 4__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17RCC_CFGR3_USART2SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)RCC_AHBENR_CRCEN (1 << 6)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1RCC_USART1__FLT32X_HAS_DENORM__ 1CRS_CFGR_SYNCDIV_DIV16 (4 << CRS_CFGR_SYNCDIV_SHIFT)__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1__SIZEOF_SIZE_T__ 4RCC_I2C1RCC_I2C2RCC_CFGR_PPRE (7 << RCC_CFGR_PPRE_SHIFT)CRS_CR_ERRIE (1 << 2)RCC_CFGR_MCOPRE (7 << RCC_CFGR_MCOPRE_SHIFT)RCC_CFGR_PLLMUL_MUL11 (0x09 << RCC_CFGR_PLLMUL_SHIFT)__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODRCC_APB2RSTR_ADCRST (1 << 9)__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H RCC_CFGR_PLLMUL_MUL16 (0x0E << RCC_CFGR_PLLMUL_SHIFT)RCC_BDCR_RTCSEL_NOCLK (0 << RCC_BDCR_RTCSEL_SHIFT)__GCC_CONSTRUCTIVE_SIZE 64RCC_CSR_PORRSTF (1 << 27)__LLFRACT_IBIT__ 0RCC_BDCR_LSEDRV_MEDLO (1 << RCC_BDCR_LSEDRV_SHIFT)uint32_tBIT12 (1<<12)RCC_CFGR_PLLMUL_MUL2 (0x00 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB1ENR_USART4EN (1 << 19)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HKRCC_CIR_HSI14RDYC (1 << 21)RCC_CFGR_SW_SHIFT 0RCC_CFGR2_PREDIV_DIV10 0x9__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8RCC_CSR_WWDGRSTF (1 << 30)RCC_APB1RSTR_I2C2RST (1 << 22)__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXLIBOPENCM3_CM3_MEMORYMAP_H BIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MINCRS_CFGR_SYNCDIV (7 << CRS_CFGR_SYNCDIV_SHIFT)__FLT64_DIG__ 15RCC_APB2ENR_TIM1EN (1 << 11)__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8RCC_CECRCC_CFGR3_USART1SW_SYSCLK (1 << RCC_CFGR3_USART1SW_SHIFT)DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)RCC_AHBENR_TSCEN (1 << 24)__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_C__LDBL_MAX_10_EXP__ 308RCC_CFGR_PLLXTPRE_HSE_CLK 0x0RCC_CFGR_PPRE_DIV8 (6 << RCC_CFGR_PPRE_SHIFT)INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1RCC_CFGR_HPRE_DIV2 (0x8 << RCC_CFGR_HPRE_SHIFT)__HQ_FBIT__ 15__bool_true_false_are_defined 1RCC_APB1ENR_USART3EN (1 << 18)RCC_APB1RSTR MMIO32(RCC_BASE + 0x10)BIT26 (1<<26)__SIZE_MAX__ 0xffffffffURCC_CFGR_MCO_HSI14 1__ARM_FEATURE_SAT__ARM_ARCHINTMAX_C(c) __INTMAX_C(c)__STRICT_ANSI__ 1RCC_CIR_HSI48RDYIE (1 << 14)RCC_CIR_HSERDYC (1 << 19)RCC_CFGR_SWS_HSI (0 << RCC_CFGR_SWS_SHIFT)INT_LEAST64_MINCRS_ISR_SYNCWARNF (1 << 1)PTRDIFF_MAXRCC_CFGR_PLLMUL_SHIFT 18ST_TSENSE_CAL1_30C MMIO16(0x1FFFF7B8)__LLFRACT_EPSILON__ 0x1P-63LLRRCC_APB2RSTR_USART6RST (1 << 5)__SFRACT_MAX__ 0X7FP-7HR__FLT32X_MANT_DIG__ 53RCC_CFGR_MCO_PLL 7__ARM_ASM_SYNTAX_UNIFIED__WINT_MAX__INT16_C(c) cCRS_ISR_ERRF (1 << 2)INT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32RCC_USART2RCC_USART3RCC_USART4RCC_USART5RCC_USART6RCC_USART7RCC_USART8RCC_CR_HSICAL_SHIFT 8__ATOMIC_ACQ_REL 4RCC_CFGR_PLLSRC0 (1<<15)__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)RCC_CR_CSSON (1 << 19)RCC_CFGR_MCO_NOCLK 0__FLT32_NORM_MAX__ 3.4028234663852886e+38F32I2C1_BASE (PERIPH_BASE_APB + 0x5400)UINT64_C(c) __UINT64_C(c)RCC_DBGMCURCC_APB2RSTR_TIM16RST (1 << 17)RCC_CFGR_HPRE_DIV256 (0xe << RCC_CFGR_HPRE_SHIFT)__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0RCC_APB1RSTR_PWRRST (1 << 28)INT_FAST16_MAXRCC_AHBRSTR_IOPFRST (1 << 22)__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long intIWDG_BASE (PERIPH_BASE_APB + 0x3000)RCC_DAC__ARM_FEATURE_CDE_COPROCUINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| @A„ŽA+aeabi!6S-MM ñÿ 0 *, "$&(.?p¡Ó8l¥ -0 Ó@ ëcrs_common_all.c$t$dwm4.0.88d8b58fcc7cb03c549c2662f5adb422wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.memorymap.h.21.991cbfb03a4e91ff777157049f1f9499wm4.memorymap.h.30.896853dc49eef163ea0904dd4a9a50c4wm4.crs_common_all.h.27.8f6af0e2be8d39f7130bfba366c1042bwm4.rcc.h.38.ff8d227a6b85563d2eb792ddaec07026crs_autotrim_usb_enablercc_periph_clock_enable . " &-4;BIPUcjx}—ž¥¬³ºÁÈÏÖÝäëòù#*18?FMT[bipw~…Œ“š¡¨¯¶½ÄËÒÙáóú '-7@HN[is#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýãéïõû %+17=CIOU[agmsy…‹‘—£©¯µ»ÁÇÍÓÙßåëñ÷ý !'-39?EKQW]ciou{‡“™Ÿ¥«±·½ÃÉÏÕÛáçíóùÿ#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýãéïõû %+17=CIOU[agmsy…‹‘—£©¯µ»ÁÇÍÓÙßåëñ÷ý !'-39?EKQW]ciou{‡“™Ÿ¥«±·½ÃÉÏÕÛáçíóùÿ#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýãéïõû %+17=CIOU[agmsy…‹‘—£©¯µ»ÁÇÍÓÙßåëñ÷ý !'-39?EKQW]ciou{‡“™Ÿ¥«±·½ÃÉÏÕÛáçíóùÿ # ) / 5 ; A G M S Y _ e k q w } ƒ ‰ • › ¡ § ³ ¹ ¿ Å Ë Ñ × Ý ã é ï õ û % + 1 7 = C I O U [ a g m s y #)/5;AGMSY_ekqx†”›¢©°·¾ÅÌÓÚáèïöý '.5<CJQX_fmt{‚‰—ž¥¬³ºÁÈÏÖÝäëòù#*18?FMT[bipw~…Œ“š¡¨¯¶½ÄËÒÙàçîõü &-4;BI#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýã#)/5;AGM#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýãéïõû %+17=CIOU[agms#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýãéïõû %+1#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýãéïõû %+17=CIOU[agmsy…Œ“š¡¨¯¶½ÄËÒÙàçîõü &-4;BIPW^elszˆ–¤«²¹ÀÇÎÕÜãêñøÿ ")07>ELSZahov}„‹’™ §®µ¼ÃÊÑØßæíôû %,3:AHOV]dkry€‡Ž•œ£ª±¸¿ÆÍÔÛâéð÷þ!(/6=DKRY`gnu|ƒŠ‘˜Ÿ¦´»ÂÉÐ×Þåìóú$+29@GNU\cjqx†”›¢©°·¾ÅÌÓÚáèïöý '.5<CJQX_fmt{‚‰—ž¥¬³ºÁÈ˜.symtab.strtab.shstrtab.text.data.bss.rel.text.crs_autotrim_usb_enable.rel.debug_info.debug_abbrev.rel.debug_aranges.rel.debug_rnglists.rel.debug_macro.rel.debug_line.debug_str.comment.rel.debug_frame.ARM.attributes.groupé41é@1éL1éX1éd1ép1é|1éˆ1 é”1! ! ' 0 @, @È›1 RàN @Ð›01^÷ p— l @ž1ƒ· @ž1—Ê|“ @žh1—F~ “ @€žø 1—Ä“ @x¬ 1—àN“ @˜¬Ø1—."“ @p°(1—Pè“ @˜°01 —8R“ @È±h1"—Šx“ @0²ð1$—6“ @ ´˜1&—8Í“ @¸µ0 1(¨í¤ @è¾1*´0òev¿0W–'Ì€–(È @ð¾1.Ùp¨–,Ô–ð2- Ä™¿ð/36 0 0 0 644 44124 ` ELF(¢4(BA&'()*+,-./01234567)Ð)Ð)ÑhC`pG€#h[C`øçhKùçÀF)Ð) Ð)Ñh‹C`pGhJ@ùçhJúçÀFÿÿþÿþÿþÿ) Ð)Ð)Ñ€#h[C`pG€#h[øçhKõçÀF)Ð) Ð)ÑhJ@`pGhJùçhJöçÀFÿïÿÿÿÿÿïÿïÿï)Ð) Ð)Ñ#hC`pG€#hÛøçhKõç)Ð) Ð)Ñ"h“C`pGhJ@ùçhJúçÿÿûÿûÿûÿhC`pGh)Ð)Ð)Ñ¿1‹C’àI’@C`pGŠôçÿÿ?ÿµ"ÿ÷þÿ½h) Ð)Ð)ÑI@C`pGI@øç CôçÀFÿðÿÿÿÿÿð+Ñ*Ð*Ð*ÑapG`üçÁ`úç+øÑ*Ð*Ð*òÑÁaðçAaîçaìç+ Ð+Ð+ÑÉ² C‚bpGK @ CböçK @ CBbîçÿ)Ð)Ð)ÑChCA`pGªóë!Ä‰8œ²dac‰+^PðQ‰9MQl/Š„R<&‹vS˜d4œdacd0^P<&d9vÚÎAdFv regf^H@=L œmdacL/^rn<&L8v‰…m P£P Q£Q R0Ù:.,œÌdac.+^P<&.4vªœdQ.K¥ëß reg0^"¿;œþdac&^P:4^Q ,œ0dac#^P<&,vQ“8ì(œ_dacì"^P <&ì+vQ©Ñ0œŽdacÑ^P <&Ñ(vQÄL¹,œ½dac¹^P <&¹'vQÌ.Ÿ,œìdacŸ^P <&Ÿ$vQJ‰,œdac‰^P<&‰#v\V$>:!;9I·B.?:!;9!'@z(:!;9I:!;9I:!;9I.?:!;9!'@z :!;9I I~:!;9!I>!!I:!;9! 4:!;9!I·B%Uy$>:;9I·BH}.?:;9'@z:;9I·BpQ£QŸQ£QŸQ(£QŸ(.Q.<£QŸR£RŸR(£RŸ(,R,<£RŸS£SŸS(£SŸ(*S*<£SŸQ£QŸQ"£QŸ"$Q$4£QŸR£RŸR"£RŸ"&R&4£RŸS S "r8$s!Ÿ"2qs!ŸP £PŸQ £QŸQqÁ~Ÿ£QŸQ"£QŸ"$Q$,£QŸR£RŸR"£RŸ"&R&,£RŸSS S $rÿ6$s!Ÿ$*£Rÿ6$s!ŸQ£QŸ,Q|,,,0(,, 48<W,,,0(,, 48<~?@¥Ñ "Ö;$%ÿ'*B@±4 c*,ˆÜ ¢G;Ù")µQWM)a)Ë?3:ïêV¹³ÚE‹.V8<” øÐ/¼4oÁˆ5ð=8†CÞBY?yV5TUá@[. 5F%rLîE„l(ý;S²ö>AC("p>Û1nD&ME6EUU3Ä=õRCF@9~+«NzNt P&ý$eI‰*3,·g94 /N×.‡RW±Hf&JV$PI¿&÷)¨]" "˜"Û9ÒNlrQ!Kf Í@'B$“FWGs#Á)<ú'šKx3â?» ÿK# õo ´MŽ,Ô -Ç,4?3É%9!„+*)å2g2J=m¦ƒ›*â<lË+‡?!$d6%BRšE}:ÖQó(IO1‚ •#¥1y,ÊGTDñNØ"6»‡OÅ^Kÿ7"8Ê)•:˜,Ø=¦'o*ãš7,)rEõQn÷/Ë'·KdOX×KHšN ¥»-ž n)Ý-jJöÎ2ª~2v<2Q|?æD[#K ªA`7I-Ö iÎK#PØ9 Ÿ¾/¦$ëJ ¿!%aš¡!WT<¼–&è0º9P/ê*x.é9ê#z4Ã6xÁRž@¸>©EPO,M-ŒD‹A2*ÓL‘»J‚;2>ÿDsM©˜2–‚6DÕ•Fž;8$ÜM×*ç’p)ó2¨ vK1?Wj°=`+P@÷MÊB‚&=2iý¦JæK8ü¢IƒBÍOÈQ· ê>µ@¥ûé3+ D> QCû0>)º?KAß,|AÖ$F¦Q°„8ÍMö5jGuGs–J]E¿0P–aH|6‹(·:LZ¤CB+-¼=øLNb;v$š. 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Ÿ!/®!h ! y.!!!!w Ì!!/ä!h!! !!s !!#! ‹/h!i !"! $/h!"!"!»h7 % !v !' "" !' "Ön !SCB_BASE (SCS_BASE + 0x0D00)__UHA_FBIT__ 8DAC_CR_TSEL2_T6 (0x0 << DAC_CR_TSEL2_SHIFT)DMA_BASE (PERIPH_BASE_AHB1 + 0x0000)CORESIGHT_LSR_SLK (1<<1)__CHAR_UNSIGNED__ 1__FLT64_HAS_INFINITY__ 1DAC_CR_TSEL2_T3 (0x1 << DAC_CR_TSEL2_SHIFT)DAC_CR_MAMP2_SHIFT 24__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffff__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)TIM1_BASE (PERIPH_BASE_APB + 0x12C00)__INTMAX_MAX__ 0x7fffffffffffffffLL__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17__LDBL_MIN__ 2.2250738585072014e-308LINT_FAST64_MAX__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffUdac_set_waveform_characteristics__ARM_FEATURE_QBITINT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8__DBL_MAX_10_EXP__ 308__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLKDAC_DHR12RD_DACC2DHR_SHIFT 16__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned intDAC_ALIGN_RIGHT12__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__FLT32_MIN__ 1.1754943508222875e-38F32__USACCUM_MIN__ 0.0UHK__FLT32_DECIMAL_DIG__ 9__DECIMAL_DIG__ 17__LDBL_MIN_EXP__ (-1021)__LDBL_MANT_DIG__ 53INT64_MIN (-INT64_MAX - 1)WWDG_BASE (PERIPH_BASE_APB + 0x2c00)__UINT8_C(c) c__INT16_TYPE__ short int__FLT64_MAX__ 1.7976931348623157e+308F64UINT_FAST32_MAXdac_software_triggerDAC_DHR12L2(dac) MMIO32((dac) + 0x18)INT_FAST64_MAX __INT_FAST64_MAX____UINT_LEAST16_MAX__ 0xffff__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64USART5_BASE (PERIPH_BASE_APB + 0x5000)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intGPIO_PORT_C_BASE (PERIPH_BASE_AHB2 + 0x0800)__FLT32X_HAS_QUIET_NAN__ 1../common/dac_common_all.cINT32_MIN (-INT32_MAX - 1)__FLT32_MAX_10_EXP__ 38DAC_CR_TSEL2_T8 (0x1 << DAC_CR_TSEL2_SHIFT)DAC_CR_TSEL1_T15 (0x3 << DAC_CR_TSEL1_SHIFT)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZ__UINTPTR_MAX__ 0xffffffffU__FLT32_MIN_EXP__ (-125)UINT32_MAX __UINT32_MAX__TIM3_BASE (PERIPH_BASE_APB + 0x0400)DAC_CR_WAVE1_SHIFT 6USART8_BASE (PERIPH_BASE_APB + 0x11C00)__ULFRACT_FBIT__ 32INT8_MIN (-INT8_MAX - 1)__FLT64_MIN_10_EXP__ (-307)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX____SFRACT_EPSILON__ 0x1P-7HR__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAX__SQ_FBIT__ 31DAC_DHR8RD_DACC1DHR_MSK 0xFFINT_LEAST32_MIN (-INT_LEAST32_MAX - 1)__UHQ_FBIT__ 16__FLT64_MIN_EXP__ (-1021)__PTRDIFF_WIDTH__ 32INT_FAST8_MAXDAC_CR_DMAEN2 (1 << 28)__UINT_FAST8_MAX__ 0xffffffffUUINT16_C(c) __UINT16_C(c)__LACCUM_IBIT__ 32__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1__LDBL_MAX__ 1.7976931348623157e+308L__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__GCC_ATOMIC_POINTER_LOCK_FREE 1DAC_CR_EN1 (1 << 0)DAC_DHR12R1_DACC1DHR_SHIFT 0dac_trigger_disable__UINT_FAST16_MAX__ 0xffffffffU__INTPTR_MAX__ 0x7fffffffINT64_C(c) __INT64_C(c)__GCC_IEC_559_COMPLEX 0__UFRACT_MIN__ 0.0URWCHAR_MAX __WCHAR_MAX__DAC_CR_WAVEx_MASK 0x3UINT_FAST16_MAX __UINT_FAST16_MAX__GPIO_PORT_D_BASE (PERIPH_BASE_AHB2 + 0x0C00)__UINT_LEAST8_TYPE__ unsigned char__ACCUM_FBIT__ 15__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17DAC_DHR12LD_DACC1DHR_SHIFT 0__DBL_MIN__ ((double)2.2250738585072014e-308L)DAC_DHR8RD(dac) MMIO32((dac) + 0x28)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xNVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed charDAC_DHR12LD_DACC2DHR_MSK 0xFFFDAC_DHR8R2(dac) MMIO32((dac) + 0x1C)BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX__DAC_CR_EN2 (1 << 16)__THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64USART2_BASE (PERIPH_BASE_APB + 0x4400)__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4WINT_MIN __WINT_MIN__dac_dma_disable__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32__FLT32X_MIN_EXP__ (-1021)INFO_BASE (0x1ffff000U)TIM17_BASE (PERIPH_BASE_APB + 0x14800)BIT27 (1<<27)TIM7_BASE (PERIPH_BASE_APB + 0x1400)__UTA_FBIT__ 64__FLT_DECIMAL_DIG__ 9__thumb__ 1LIBOPENCM3_MEMORYMAP_COMMON_H signed charINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1DAC_DHR12R2_DACC2DHR_SHIFT 0__INT64_C(c) c ## LL__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLK__GNUC_PATCHLEVEL__ 1PTRDIFF_MINGNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsUINTPTR_MAX __UINTPTR_MAX____ARM_ARCH_PROFILE 77GPIO_PORT_E_BASE (PERIPH_BASE_AHB2 + 0x1000)__FLT64_MAX_10_EXP__ 308__WCHAR_WIDTH__ 32MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINLIBOPENCM3_DAC_COMMON_V1_H __UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38__FRACT_MAX__ 0X7FFFP-15RDAC_CR_DMAUDRIE1 (1 << 13)PERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5__ARM_ARCH_EXT_IDIV__PERIPH_BASE_APB (PERIPH_BASE + 0x00000000)__UINT16_MAX__ 0xffff__TQ_FBIT__ 127TIM14_BASE (PERIPH_BASE_APB + 0x2000)INT_FAST16_MIN__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32SPI1_BASE (PERIPH_BASE_APB + 0x13000)INT_FAST32_MIN (-INT_FAST32_MAX - 1)CEC_BASE (PERIPH_BASE_APB + 0x7800)UINT_LEAST8_MAXUINT8_C(c) __UINT8_C(c)dac_align__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX____USA_IBIT__ 16DAC_DHR12R2_DACC2DHR_MASK 0xFFFPTRDIFF_MIN (-PTRDIFF_MAX - 1)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__DBL_IS_IEC_60559__ 2__UINT_FAST64_TYPE__ long long unsigned intTIM2_BASE (PERIPH_BASE_APB + 0x0000)__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC__DAC_SR_DMAUDR2 (1 << 29)__UINT32_C(c) c ## UL__FLT32_IS_IEC_60559__ 2INT_FAST64_MINDAC_DHR12LD(dac) MMIO32((dac) + 0x24)__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16L__USFRACT_MIN__ 0.0UHRTSC_BASE (PERIPH_BASE_AHB1 + 0x4000)__ARM_NEON__UINT8_MAX__ 0xff__LDBL_MAX_EXP__ 1024LIBOPENCM3_MEMORYMAP_H DAC_CR_TSEL1_T8 (0x1 << DAC_CR_TSEL1_SHIFT)DAC_DHR8R1(dac) MMIO32((dac) + 0x10)sourcemamp__DA_FBIT__ 31__GXX_ABI_VERSION 1017__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45FDAC_DHR12R2(dac) MMIO32((dac) + 0x14)INT_LEAST32_MAX __INT_LEAST32_MAX____ULLACCUM_EPSILON__ 0x1P-32ULLKINT_LEAST8_MAX __INT_LEAST8_MAX__USART3_BASE (PERIPH_BASE_APB + 0x4800)DAC_CR_TSEL2_SW (0x7 << DAC_CR_TSEL2_SHIFT)__UACCUM_MIN__ 0.0UKDAC_DOR2_DACC2DOR_SHIFT 0DAC_DHR12R1(dac) MMIO32((dac) + 0x08)DAC_CR_DMAEN1 (1 << 12)__ARM_ARCH_ISA_THUMBDAC_CR_TSEL1_T5 (0x3 << DAC_CR_TSEL1_SHIFT)__ARM_FEATURE_MATMUL_INT8__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0DBGMCU_BASE (PERIPH_BASE_APB + 0x15800)__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1DAC_DHR12L1_DACC1DHR_MASK 0xFFF__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)TIM16_BASE (PERIPH_BASE_APB + 0x14400)__FLT32_HAS_QUIET_NAN__ 1DAC_SWTRIGR(dac) MMIO32((dac) + 0x04)__LDBL_HAS_INFINITY__ 1__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))DAC_CR_BOFF1 (1 << 1)__FLT32X_MAX_10_EXP__ 308__ARM_PCS 1bool _BoolUINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffDAC_DHR12L2_DACC2DHR_SHIFT 4BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)INT16_MAX __INT16_MAX____FLT32X_IS_IEC_60559__ 2DAC_DHR8RD_DACC1DHR_SHIFT 0SYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXPERIPH_BASE_AHB1 (PERIPH_BASE + 0x00020000)__INT_LEAST16_WIDTH__ 16DAC_CR_TSEL1_SHIFT 3__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLDAC_DHR12L2_DACC2DHR_MASK 0xFFFINT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHR__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)/build/libopencm3/lib/stm32/f0__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffULDAC_DHR12LD_DACC1DHR_MSK 0xFFF__INT_LEAST8_MAX__ 0x7fDAC_CR_TSEL2_SHIFT 19__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXDAC_BASE (PERIPH_BASE_APB + 0x7400)DAC_DHR8R1_DACC1DHR_MASK 0xFF__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fBIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned int__SOFTFP__ 1DAC_DHR12LD_DACC2DHR_SHIFT 16UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0ST_VREFINT_CAL MMIO16(0x1FFFF7BA)__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAXchannel__UINT_FAST8_TYPE__ unsigned intDAC_SWTRIGR_SWTRIG1 (1 << 0)__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)__INT32_MAX__ 0x7fffffffLST_TSENSE_CAL2_110C MMIO16(0x1FFFF7C2)UINTMAX_MAXEXTI_BASE (PERIPH_BASE_APB + 0x10400)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_BF16_VECTOR_ARITHMETICPPBI_BASE (0xE0000000U)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__INT8_MAX __INT8_MAX____INT_LEAST16_TYPE__ short int__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1ADC_BASE (PERIPH_BASE_APB + 0x12400)DAC_CR(dac) MMIO32((dac) + 0x00)__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64UINTPTR_MAX__LDBL_DENORM_MIN__ 4.9406564584124654e-324L__INT64_MAX__ 0x7fffffffffffffffLL__ULLFRACT_IBIT__ 0MMIO16(addr) (*(volatile uint16_t *)(addr))dac_wave__GNUC__ 12__FLT32_DIG__ 6WCHAR_MAX__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULK__ARM_ARCH 6__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__FLT_EPSILON__ 1.1920928955078125e-7F__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAX__LDBL_HAS_QUIET_NAN__ 1__LONG_LONG_WIDTH__ 64BIT6 (1<<6)DAC_DOR2(dac) MMIO32((dac) + 0x30)__DBL_HAS_DENORM__ 1__UINT_FAST64_MAX__ 0xffffffffffffffffULLDAC_DHR8R2_DACC2DHR_MASK 0xFF__ARM_FP__HA_IBIT__ 8LIBOPENCM3_DAC_COMMON_ALL_H __INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xDAC_CR_TSEL2_T15 (0x3 << DAC_CR_TSEL2_SHIFT)INTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLDAC_CR_TSEL1_T2 (0x4 << DAC_CR_TSEL1_SHIFT)__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4DAC_DHR8RD_DACC2DHR_MSK 0xFFdac_disableDESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)DAC_DHR12RD(dac) MMIO32((dac) + 0x20)DAC_DHR12R1_DACC1DHR_MASK 0xFFF__UFRACT_MAX__ 0XFFFFP-16URalignINT64_MAXDAC_SWTRIGR_SWTRIG2 (1 << 1)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__DAC_CR_TSEL1_T6 (0x0 << DAC_CR_TSEL1_SHIFT)SYS_TICK_BASE (SCS_BASE + 0x0010)__USER_LABEL_PREFIX__ __ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)SPI2_BASE (PERIPH_BASE_APB + 0x3800)DAC_CR_TEN1 (1 << 2)DAC_CR_TSEL1_SW (0x7 << DAC_CR_TSEL1_SHIFT)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)__INT_FAST32_TYPE__ intCRS_BASE (PERIPH_BASE_APB + 0x6C00)unsigned int__GCC_ASM_FLAG_OUTPUTS____LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1__USACCUM_IBIT__ 8DAC_DOR1(dac) MMIO32((dac) + 0x2C)__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UKDAC_CHANNEL_BOTH (DAC_CHANNEL1 | DAC_CHANNEL2)__FLT_EVAL_METHOD__ 0__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__thumb2__RCC_BASE (PERIPH_BASE_AHB1 + 0x1000)__ARM_FEATURE_LDREXDAC_CR_WAVE2_SHIFT 22__UQQ_FBIT__ 8DAC_DHR8R1_DACC1DHR_SHIFT 0INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0dac_load_data_buffer_dualINT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__RTC_BASE (PERIPH_BASE_APB + 0x2800)__UINT8_TYPE__ unsigned charDAC_CR_TSEL1_T7 (0x2 << DAC_CR_TSEL1_SHIFT)__SIG_ATOMIC_TYPE__ intUINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"DAC_CR_MAMPx_MASK 0xfINT8_MINPERIPH_BASE (0x40000000U)true 1__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)__LDBL_MIN_10_EXP__ (-307)INT_LEAST16_MIN (-INT_LEAST16_MAX - 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Âh &/z 1 SCB_BASE (SCS_BASE + 0x0D00)__UHA_FBIT__ 8DAC_CR_TSEL2_T6 (0x0 << DAC_CR_TSEL2_SHIFT)DMA_BASE (PERIPH_BASE_AHB1 + 0x0000)CORESIGHT_LSR_SLK (1<<1)__CHAR_UNSIGNED__ 1__FLT64_HAS_INFINITY__ 1DAC_CR_TSEL2_T3 (0x1 << DAC_CR_TSEL2_SHIFT)DAC_CR_MAMP2_SHIFT 24__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffff__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)TIM1_BASE (PERIPH_BASE_APB + 0x12C00)__INTMAX_MAX__ 0x7fffffffffffffffLL__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17__LDBL_MIN__ 2.2250738585072014e-308LINT_FAST64_MAX__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffU__ARM_FEATURE_QBITINT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8__DBL_MAX_10_EXP__ 308__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLKDAC_DHR12RD_DACC2DHR_SHIFT 16__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned intDAC_CR_TSEL1_T7 (0x2 << DAC_CR_TSEL1_SHIFT)__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__FLT32_MIN__ 1.1754943508222875e-38F32__USACCUM_MIN__ 0.0UHK__FLT32_DECIMAL_DIG__ 9__DECIMAL_DIG__ 17__LDBL_MIN_EXP__ (-1021)INT_FAST16_MIN__LDBL_MANT_DIG__ 53INT64_MIN (-INT64_MAX - 1)WWDG_BASE (PERIPH_BASE_APB + 0x2c00)__UINT8_C(c) c__INT16_TYPE__ short int__FLT64_MAX__ 1.7976931348623157e+308F64UINT_FAST32_MAXDAC_DHR12L2(dac) MMIO32((dac) + 0x18)INT_FAST64_MAX __INT_FAST64_MAX____UINT_LEAST16_MAX__ 0xffff__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64USART5_BASE (PERIPH_BASE_APB + 0x5000)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intGPIO_PORT_C_BASE (PERIPH_BASE_AHB2 + 0x0800)__FLT32X_HAS_QUIET_NAN__ 1INT32_MIN (-INT32_MAX - 1)__FLT32_MAX_10_EXP__ 38DAC_CR_TSEL2_T8 (0x1 << DAC_CR_TSEL2_SHIFT)DAC_CR_TSEL1_T15 (0x3 << DAC_CR_TSEL1_SHIFT)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZ__UINTPTR_MAX__ 0xffffffffU__FLT32_MIN_EXP__ (-125)UINT32_MAX __UINT32_MAX__TIM3_BASE (PERIPH_BASE_APB + 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__UINT_FAST16_MAX__GPIO_PORT_D_BASE (PERIPH_BASE_AHB2 + 0x0C00)__UINT_LEAST8_TYPE__ unsigned char__ACCUM_FBIT__ 15__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17DAC_DHR12LD_DACC1DHR_SHIFT 0__DBL_MIN__ ((double)2.2250738585072014e-308L)DAC_DHR8RD(dac) MMIO32((dac) + 0x28)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xNVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed charDAC_DHR12LD_DACC2DHR_MSK 0xFFFDAC_DHR8R2(dac) MMIO32((dac) + 0x1C)BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX__DAC_CR_EN2 (1 << 16)__THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)USART6_BASE (PERIPH_BASE_APB + 0x11400)__FLT32X_MIN_10_EXP__ (-307)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64USART2_BASE (PERIPH_BASE_APB + 0x4400)__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4WINT_MIN __WINT_MIN____SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32__FLT32X_MIN_EXP__ (-1021)INFO_BASE (0x1ffff000U)TIM17_BASE (PERIPH_BASE_APB + 0x14800)BIT27 (1<<27)TIM7_BASE (PERIPH_BASE_APB + 0x1400)__UTA_FBIT__ 64__FLT_DECIMAL_DIG__ 9__thumb__ 1LIBOPENCM3_MEMORYMAP_COMMON_H signed charINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1DAC_DHR12R2_DACC2DHR_SHIFT 0__INT64_C(c) c ## LL__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLK__GNUC_PATCHLEVEL__ 1PTRDIFF_MINGNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsUINTPTR_MAX __UINTPTR_MAX____ARM_ARCH_PROFILE 77GPIO_PORT_E_BASE (PERIPH_BASE_AHB2 + 0x1000)__FLT64_MAX_10_EXP__ 308__WCHAR_WIDTH__ 32MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINLIBOPENCM3_DAC_COMMON_V1_H __UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38__FRACT_MAX__ 0X7FFFP-15RDAC_CR_DMAUDRIE1 (1 << 13)PERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5__ARM_ARCH_EXT_IDIV__PERIPH_BASE_APB (PERIPH_BASE + 0x00000000)__UINT16_MAX__ 0xffff__TQ_FBIT__ 127TIM14_BASE (PERIPH_BASE_APB + 0x2000)__USQ_FBIT__ 32__ARM_FEATURE_DSP__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32SPI1_BASE (PERIPH_BASE_APB + 0x13000)INT_FAST32_MIN (-INT_FAST32_MAX - 1)CEC_BASE (PERIPH_BASE_APB + 0x7800)UINT_LEAST8_MAXUINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX____USA_IBIT__ 16PTRDIFF_MIN (-PTRDIFF_MAX - 1)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__DBL_IS_IEC_60559__ 2__UINT_FAST64_TYPE__ long long unsigned intTIM2_BASE (PERIPH_BASE_APB + 0x0000)__STDC_VERSION__ 199901L__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC__DAC_SR_DMAUDR2 (1 << 29)__UINT32_C(c) c ## UL__FLT32_IS_IEC_60559__ 2INT_FAST64_MINDAC_DHR12LD(dac) MMIO32((dac) + 0x24)__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16L__USFRACT_MIN__ 0.0UHRTSC_BASE (PERIPH_BASE_AHB1 + 0x4000)__ARM_NEON__UINT8_MAX__ 0xff__LDBL_MAX_EXP__ 1024LIBOPENCM3_MEMORYMAP_H DAC_CR_TSEL1_T8 (0x1 << DAC_CR_TSEL1_SHIFT)DAC_DHR8R1(dac) MMIO32((dac) + 0x10)__DA_FBIT__ 31BIT17 (1<<17)__GXX_ABI_VERSION 1017__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45FDAC_DHR12R2(dac) MMIO32((dac) + 0x14)INT_LEAST32_MAX __INT_LEAST32_MAX____ULLACCUM_EPSILON__ 0x1P-32ULLKINT_LEAST8_MAX __INT_LEAST8_MAX__USART3_BASE (PERIPH_BASE_APB + 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0SYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXPERIPH_BASE_AHB1 (PERIPH_BASE + 0x00020000)__INT_LEAST16_WIDTH__ 16DAC_CR_TSEL1_SHIFT 3__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLDAC_DHR12L2_DACC2DHR_MASK 0xFFFINT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHR__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)/build/libopencm3/lib/stm32/f0__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffULDAC_DHR12LD_DACC1DHR_MSK 0xFFF__INT_LEAST8_MAX__ 0x7fDAC_CR_TSEL2_SHIFT 19__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXDAC_DHR12L1_DACC1DHR_SHIFT 4DAC_DHR8R1_DACC1DHR_MASK 0xFF__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fBIT14 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int__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1ADC_BASE (PERIPH_BASE_APB + 0x12400)DAC_CR(dac) MMIO32((dac) + 0x00)__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64UINTPTR_MAX__LDBL_DENORM_MIN__ 4.9406564584124654e-324L__INT64_MAX__ 0x7fffffffffffffffLL__ULLFRACT_IBIT__ 0MMIO16(addr) (*(volatile uint16_t *)(addr))__GNUC__ 12WCHAR_MAX__LONG_WIDTH__ 32DAC_SWTRIGR_SWTRIG2 (1 << 1)INT32_MAX __INT32_MAX____UACCUM_FBIT__ 16__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULK__ARM_ARCH 6__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAX__LDBL_HAS_QUIET_NAN__ 1__LONG_LONG_WIDTH__ 64BIT6 (1<<6)DAC_DOR2(dac) MMIO32((dac) + 0x30)__DBL_HAS_DENORM__ 1__UINT_FAST64_MAX__ 0xffffffffffffffffULLDAC_DHR8R2_DACC2DHR_MASK 0xFF__ARM_FP__HA_IBIT__ 8LIBOPENCM3_DAC_COMMON_ALL_H __INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xDAC_CR_TSEL2_T15 (0x3 << DAC_CR_TSEL2_SHIFT)INTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLDAC_CR_TSEL1_T2 (0x4 << DAC_CR_TSEL1_SHIFT)__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4DAC_DHR8RD_DACC2DHR_MSK 0xFFDESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)DAC_DHR12RD(dac) MMIO32((dac) + 0x20)__UFRACT_MAX__ 0XFFFFP-16URINT64_MAXINT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0../common/dac_common_v1.c__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__DAC_CR_TSEL1_T6 (0x0 << DAC_CR_TSEL1_SHIFT)SYS_TICK_BASE (SCS_BASE + 0x0010)__USER_LABEL_PREFIX__ __ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)SPI2_BASE (PERIPH_BASE_APB + 0x3800)DAC_CR_TEN1 (1 << 2)DAC_CR_TSEL1_SW (0x7 << DAC_CR_TSEL1_SHIFT)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)__INT_FAST32_TYPE__ intCRS_BASE (PERIPH_BASE_APB + 0x6C00)unsigned int__GCC_ASM_FLAG_OUTPUTS____LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1__USACCUM_IBIT__ 8DAC_DOR1(dac) MMIO32((dac) + 0x2C)__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UKDAC_CHANNEL_BOTH (DAC_CHANNEL1 | DAC_CHANNEL2)__FLT_EVAL_METHOD__ 0__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__thumb2__RCC_BASE (PERIPH_BASE_AHB1 + 0x1000)__ARM_FEATURE_LDREXDAC_CR_WAVE2_SHIFT 22__UQQ_FBIT__ 8DAC_DHR8R1_DACC1DHR_SHIFT 0INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__RTC_BASE (PERIPH_BASE_APB + 0x2800)__UINT8_TYPE__ unsigned char__SIG_ATOMIC_TYPE__ intUINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"DAC_CR_MAMPx_MASK 0xfINT8_MINPERIPH_BASE (0x40000000U)true 1__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)DAC_DHR12RD_DACC2DHR_MASK 0xFFF__LDBL_MIN_10_EXP__ (-307)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1BIT28 (1<<28)DAC_CR_DMAUDRIE2 (1 << 29)__LFRACT_EPSILON__ 0x1P-31LRDAC_CR_TSEL2_T4 (0x5 << DAC_CR_TSEL2_SHIFT)__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX__DAC_CHANNEL2 (1 << 1)__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1__FLT32_MIN_10_EXP__ (-37)MMIO64(addr) (*(volatile uint64_t *)(addr))__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MINDAC_SR(dac) MMIO32((dac) + 0x34)__BIGGEST_ALIGNMENT__ 8DAC_SWTRIGR_SWTRIG1 (1 << 0)__TA_IBIT__ 64DAC_CR_TSEL2_T5 (0x3 << DAC_CR_TSEL2_SHIFT)__ARM_FEATURE_QRDMXDAC_DHR12RD_DACC1DHR_MSK 0xFFF__ARM_ARCH_ISA_THUMB 1DESIG_FLASH_SIZE_BASE (0x1FFFF7CCU)__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__DAC_CR_TEN2 (1 << 18)__SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1__FLT32_DIG__ 6INT_LEAST16_MAXTIM6_BASE (PERIPH_BASE_APB + 0x1000)BIT15 (1<<15)DAC_DOR2_DACC2DOR_MSK 0xFFFBIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7INT32_MAX__ACCUM_MIN__ (-0X1P15K-0X1P15K)LIBOPENCM3_DAC_H __ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intBIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)__FLT_NORM_MAX__ 3.4028234663852886e+38FUSART1_BASE (PERIPH_BASE_APB + 0x13800)long long unsigned int__FLT_MIN_10_EXP__ (-37)GPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int__APCS_32__ 1__DQ_FBIT__ 63INT_LEAST64_MAX__SACCUM_IBIT__ 8__UHQ_IBIT__ 0INT_LEAST8_MINBIT29 (1<<29)__INT_FAST16_TYPE__ intDAC_CR_DMAEN2 (1 << 28)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15DAC_CR_TSEL1_E9 (0x6 << DAC_CR_TSEL1_SHIFT)__UTQ_FBIT__ 128__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffUSART7_BASE (PERIPH_BASE_APB + 0x11800)DMA2_BASE (PERIPH_BASE_AHB1 + 0x0400)PTRDIFF_MAX __PTRDIFF_MAX__DAC1 DAC_BASE__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKUINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULR__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intWCHAR_MINDMA1_BASE DMA_BASEBEGIN_DECLS dac_buffer_enableUSB_PMA_BASE (PERIPH_BASE_APB + 0x6000)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)__ARM_EABI__ 1INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1__QQ_IBIT__ 0DAC_CHANNEL1 (1 << 0)DESIG_UNIQUE_ID_BASE (0x1FFFF7ACU)__LLACCUM_FBIT__ 31__UINTMAX_TYPE__ long long unsigned int__USQ_IBIT__ 0DAC_CR_TSEL2_T7 (0x2 << DAC_CR_TSEL2_SHIFT)__UINT_LEAST32_TYPE__ long unsigned int__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 1STM32F0 1DAC_DHR8RD_DACC2DHR_SHIFT 8INTMAX_MAXDEBUG_BASE (SCS_BASE + 0x0DF0)__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CINT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intUINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULR__ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned intI2C2_BASE (PERIPH_BASE_APB + 0x5800)__LONG_MAX__ 0x7fffffffLTIM15_BASE (PERIPH_BASE_APB + 0x14000)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16FLASH_BASE (0x08000000U)CORESIGHT_LAR_OFFSET 0xfb0DAC_CR_TSEL2_E9 (0x6 << DAC_CR_TSEL2_SHIFT)FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x2000)short intDAC_DHR12R2_DACC2DHR_MASK 0xFFF__UINT16_C(c) cBIT31 (1<<31)__UDA_IBIT__ 32UINT_LEAST32_MAXBIT2 (1<<2)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCDAC_DHR12R1(dac) MMIO32((dac) + 0x08)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53__GCC_ATOMIC_BOOL_LOCK_FREE 1BIT5 (1<<5)DAC_CR_BOFF2 (1 << 17)BIT1 (1<<1)USART4_BASE (PERIPH_BASE_APB + 0x4C00)INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1__DBL_DECIMAL_DIG__ 17BIT8 (1<<8)INT16_C(c) __INT16_C(c)DAC_CR_MAMP1_SHIFT 8__INT16_MAX__ 0x7fff__INT_WIDTH__ 32DAC_CR_TSEL1_T4 (0x5 << DAC_CR_TSEL1_SHIFT)__QQ_FBIT__ 7DAC_CR_TSEL1_T3 (0x1 << DAC_CR_TSEL1_SHIFT)POWER_CONTROL_BASE (PERIPH_BASE_APB + 0x7000)__SIG_ATOMIC_WIDTH__ 32DAC_CR_TSEL2_T2 (0x4 << DAC_CR_TSEL2_SHIFT)__FLT64_EPSILON__ 2.2204460492503131e-16F64__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32__ULLFRACT_EPSILON__ 0x1P-64ULLRGPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)__SIZEOF_WINT_T__ 4__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1__FLT_MAX__ 3.4028234663852886e+38F__FLT32X_HAS_DENORM__ 1__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1DAC_DHR12RD_DACC1DHR_SHIFT 0__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPROD__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H __GCC_CONSTRUCTIVE_SIZE 64DAC_SR_DMAUDR1 (1 << 13)__LLFRACT_IBIT__ 0uint32_tBIT12 (1<<12)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HK__UINT_FAST16_TYPE__ unsigned intDAC_DOR1_DACC1DOR_MSK 0xFFF__UHA_IBIT__ 8__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXLIBOPENCM3_CM3_MEMORYMAP_H BIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_C__LDBL_MAX_10_EXP__ 308INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1__HQ_FBIT__ 15__bool_true_false_are_defined 1BIT26 (1<<26)__SIZE_MAX__ 0xffffffffU__FLT32X_HAS_INFINITY__ 1__ARM_FEATURE_SATDAC_DHR8R2_DACC2DHR_SHIFT 0__ARM_ARCHINTMAX_C(c) __INTMAX_C(c)__STRICT_ANSI__ 1INT_LEAST64_MINPTRDIFF_MAXDAC_DOR1_DACC1DOR_SHIFT 0ST_TSENSE_CAL1_30C MMIO16(0x1FFFF7B8)__LLFRACT_EPSILON__ 0x1P-63LLR__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53DAC_BASE (PERIPH_BASE_APB + 0x7400)__ARM_ASM_SYNTAX_UNIFIED__WINT_MAX__INT16_C(c) cINT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32__ATOMIC_ACQ_REL 4DAC_DHR12L1_DACC1DHR_MASK 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../common/usr/lib/gcc/arm-none-eabi/12.2.1/include../../../include/libopencm3/stm32../../../include/libopencm3/cm3../../../include/libopencm3/stm32/f0../../../include/libopencm3/stm32/commondma_common_l1f013.cstdint.hdma.hcommon.hstdbool.hmemorymap.hmemorymap.hmemorymap.hdma.hdma_common_l1f013.hdma_common_csel.h6 w .""""< /Ñ" !!ã " =õ0 /! /†0. = /—0. = /¬0. = /½/ /É/ . /Ù/ /å/ . /ø0 / =‡/ . /•/ /¡/ // . /¹/ /Å/ . /Ñ/ /Ý/ . /é/ /ø/ . /‹.. /".. /" / ..!¾/. !DMA_CCR_HTIE (1 << 2)SCB_BASE (SCS_BASE + 0x0D00)__UHA_FBIT__ 8DMA2_CCR(channel) DMA_CCR(DMA2, channel)DMA_ISR_HTIF5 DMA_ISR_HTIF(DMA_CHANNEL5)DMA_BASE (PERIPH_BASE_AHB1 + 0x0000)dma_set_peripheral_addressCORESIGHT_LSR_SLK (1<<1)__CHAR_UNSIGNED__ 1DMA1_CPAR5 DMA1_CPAR(DMA_CHANNEL5)__FLT64_HAS_INFINITY__ 1DMA_ISR_TCIF_BIT DMA_TCIF__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffff__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)TIM1_BASE (PERIPH_BASE_APB + 0x12C00)__INTMAX_MAX__ 0x7fffffffffffffffLL__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17DMA_CCR_PSIZE_8BIT (0x0 << 8)WINT_MIN __WINT_MIN__INT_FAST64_MAXDMA_ISR_HTIF4 DMA_ISR_HTIF(DMA_CHANNEL4)__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffU__ARM_FEATURE_QBITDMA_ISR_GIF5 DMA_ISR_GIF(DMA_CHANNEL5)DMA_IFCR_CTCIF4 DMA_IFCR_CTCIF(DMA_CHANNEL4)DMA2_CMAR2 DMA2_CMAR(DMA_CHANNEL2)INT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8__DBL_MAX_10_EXP__ 308__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLKDMA_ISR_HTIF6 DMA_ISR_HTIF(DMA_CHANNEL6)__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64dma_set_read_from_peripheral__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned int__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed charDMA1_IFCR DMA_IFCR(DMA1)__USACCUM_MIN__ 0.0UHK__FLT32_DECIMAL_DIG__ 9__DECIMAL_DIG__ 17__LDBL_MIN_EXP__ (-1021)DMA2_CPAR1 DMA2_CPAR(DMA_CHANNEL1)__LDBL_MANT_DIG__ 53INT64_MIN (-INT64_MAX - 1)WWDG_BASE (PERIPH_BASE_APB + 0x2c00)__UINT8_C(c) c__INT16_TYPE__ short intDMA2_CNDTR4 DMA2_CNDTR(DMA_CHANNEL4)__FLT64_MAX__ 1.7976931348623157e+308F64peripheral_sizeUINT_FAST32_MAXDMA1_CMAR(channel) DMA_CMAR(DMA1, channel)INT_FAST64_MAX __INT_FAST64_MAX__DMA1_CPAR(channel) DMA_CPAR(DMA1, channel)DMA_IFCR_CTCIF2 DMA_IFCR_CTCIF(DMA_CHANNEL2)__UINT_LEAST16_MAX__ 0xffff__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64DMA1_CNDTR(channel) DMA_CNDTR(DMA1, channel)DMA2_CNDTR5 DMA2_CNDTR(DMA_CHANNEL5)USART5_BASE (PERIPH_BASE_APB + 0x5000)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intGPIO_PORT_C_BASE (PERIPH_BASE_AHB2 + 0x0800)DMA1_CNDTR2 DMA1_CNDTR(DMA_CHANNEL2)INT32_MIN (-INT32_MAX - 1)__FLT32_MAX_10_EXP__ 38dma_set_read_from_memoryDMA2_CNDTR2 DMA2_CNDTR(DMA_CHANNEL2)dma_enable_mem2mem_mode__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZDMA_IFCR_CIF4 DMA_IFCR_CIF(DMA_CHANNEL4)__UINTPTR_MAX__ 0xffffffffU__FLT32_MIN_EXP__ (-125)DMA1_CPAR7 DMA1_CPAR(DMA_CHANNEL7)dma_set_memory_sizeUINT32_MAX __UINT32_MAX__TIM3_BASE (PERIPH_BASE_APB + 0x0400)__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64__ULFRACT_FBIT__ 32__FLT64_MIN_10_EXP__ (-307)DMA_IFCR_CTEIF7 DMA_IFCR_CTEIF(DMA_CHANNEL7)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__DMA_CCR_TCIE (1 << 1)__SFRACT_EPSILON__ 0x1P-7HR__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAX__SQ_FBIT__ 31DMA_CCR_PL_HIGH (0x2 << 12)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)DMA1_CCR(channel) DMA_CCR(DMA1, channel)prioDMA_CHANNEL2 2__UHQ_FBIT__ 16__FLT64_MIN_EXP__ (-1021)DMA_IFCR_CHTIF1 DMA_IFCR_CHTIF(DMA_CHANNEL1)__PTRDIFF_WIDTH__ 32INT_FAST8_MAXDMA_ISR_TEIF3 DMA_ISR_TEIF(DMA_CHANNEL3)__UINT_FAST8_MAX__ 0xffffffffUUINT16_C(c) __UINT16_C(c)DMA_CCR_PINC (1 << 6)__LACCUM_IBIT__ 32DMA_ISR_GIF3 DMA_ISR_GIF(DMA_CHANNEL3)__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__INTPTR_MAX__ 0x7fffffff__UINT_FAST16_MAX__ 0xffffffffUDMA_IFCR_CHTIF3 DMA_IFCR_CHTIF(DMA_CHANNEL3)INT64_C(c) __INT64_C(c)DMA1_CSELR DMA_CSELR(DMA1)__GCC_IEC_559_COMPLEX 0__UFRACT_MIN__ 0.0URWCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__GPIO_PORT_D_BASE (PERIPH_BASE_AHB2 + 0x0C00)__UINT_LEAST8_TYPE__ unsigned char__ACCUM_FBIT__ 15__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1DMA_ISR_TEIF4 DMA_ISR_TEIF(DMA_CHANNEL4)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xNVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed charDMA_CCR_PSIZE_16BIT (0x1 << 8)__GCC_ATOMIC_BOOL_LOCK_FREE 1BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____TA_FBIT__ 63__THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)USART2_BASE (PERIPH_BASE_APB + 0x4400)__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4DMA_ISR_HTIF1 DMA_ISR_HTIF(DMA_CHANNEL1)__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32__FLT32X_MIN_EXP__ (-1021)DMA_ISR_TEIF5 DMA_ISR_TEIF(DMA_CHANNEL5)DMA_IFCR_CIF7 DMA_IFCR_CIF(DMA_CHANNEL7)INFO_BASE (0x1ffff000U)TIM17_BASE (PERIPH_BASE_APB + 0x14800)BIT27 (1<<27)DMA_IFCR_CTEIF(channel) (DMA_IFCR_CTEIF_BIT << (DMA_FLAG_OFFSET(channel)))TIM7_BASE (PERIPH_BASE_APB + 0x1400)__UTA_FBIT__ 64__FLT_DECIMAL_DIG__ 9__thumb__ 1LIBOPENCM3_MEMORYMAP_COMMON_H signed charuint8_tINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)DMA_CCR_PL_MASK (0x3 << 12)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1__INT64_C(c) c ## LL__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLKDMA_IFCR_CTCIF(channel) (DMA_IFCR_CTCIF_BIT << (DMA_FLAG_OFFSET(channel)))__GNUC_PATCHLEVEL__ 1PTRDIFF_MINdma_disable_peripheral_increment_modeGNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsUINTPTR_MAX __UINTPTR_MAX__DMA_ISR_HTIF2 DMA_ISR_HTIF(DMA_CHANNEL2)GPIO_PORT_E_BASE (PERIPH_BASE_AHB2 + 0x1000)__FLT64_MAX_10_EXP__ 308__WCHAR_WIDTH__ 32MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINDMA2_CCR1 DMA2_CCR(DMA_CHANNEL1)__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38__FRACT_MAX__ 0X7FFFP-15RPERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)DMA2_CMAR3 DMA2_CMAR(DMA_CHANNEL3)__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5__ARM_ARCH_EXT_IDIV__DMA_IFCR_CGIF4 DMA_IFCR_CGIF(DMA_CHANNEL4)PERIPH_BASE_APB (PERIPH_BASE + 0x00000000)__UINT16_MAX__ 0xffff__LDBL_MIN__ 2.2250738585072014e-308L__TQ_FBIT__ 127DMA_CHANNEL7 7TIM14_BASE (PERIPH_BASE_APB + 0x2000)__USQ_FBIT__ 32INT_FAST16_MINDMA2_CPAR2 DMA2_CPAR(DMA_CHANNEL2)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32DMA2_CPAR(channel) DMA_CPAR(DMA2, channel)_BoolDMA1_CCR3 DMA1_CCR(DMA_CHANNEL3)SPI1_BASE (PERIPH_BASE_APB + 0x13000)INT_FAST32_MIN (-INT_FAST32_MAX - 1)CEC_BASE (PERIPH_BASE_APB + 0x7800)USART8_BASE (PERIPH_BASE_APB + 0x11C00)UINT_LEAST8_MAXUINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX____USA_IBIT__ 16dma_enable_memory_increment_modePTRDIFF_MIN (-PTRDIFF_MAX - 1)DMA_ISR_TEIF1 DMA_ISR_TEIF(DMA_CHANNEL1)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__DBL_IS_IEC_60559__ 2__UINT_FAST64_TYPE__ long long unsigned intDMA1_CNDTR5 DMA1_CNDTR(DMA_CHANNEL5)TIM2_BASE (PERIPH_BASE_APB + 0x0000)DMA_CCR_PL_SHIFT 12DMA_CSELR_CxS_SHIFT(channel) (4 * ((channel) - 1))__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC____UINT32_C(c) c ## UL__FLT32_IS_IEC_60559__ 2DMA_IFCR_CHTIF2 DMA_IFCR_CHTIF(DMA_CHANNEL2)INT_FAST64_MIN__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16LDMA2_IFCR DMA_IFCR(DMA2)TSC_BASE (PERIPH_BASE_AHB1 + 0x4000)__ARM_NEON__UINT8_MAX__ 0xffDMA_IFCR_CIF5 DMA_IFCR_CIF(DMA_CHANNEL5)__LDBL_MAX_EXP__ 1024LIBOPENCM3_MEMORYMAP_H __DBL_HAS_DENORM__ 1DMA_HTIF (1 << 2)__DA_FBIT__ 31flagsDMA2_CCR3 DMA2_CCR(DMA_CHANNEL3)__GXX_ABI_VERSION 1017DMA2_CMAR5 DMA2_CMAR(DMA_CHANNEL5)__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LDMA_IFCR_CGIF2 DMA_IFCR_CGIF(DMA_CHANNEL2)INT_LEAST32_MAX __INT_LEAST32_MAX____ULLACCUM_EPSILON__ 0x1P-32ULLKDMA_ISR_TCIF(channel) (DMA_ISR_TCIF_BIT << (DMA_FLAG_OFFSET(channel)))INT_LEAST8_MAX __INT_LEAST8_MAX__DMA_CSELR(dma_base) MMIO32((dma_base) + 0xA8)USART3_BASE (PERIPH_BASE_APB + 0x4800)__UACCUM_MIN__ 0.0UKdma_get_interrupt_flag__FLT_EPSILON__ 1.1920928955078125e-7FDMA_IFCR_CIF6 DMA_IFCR_CIF(DMA_CHANNEL6)DMA2_CPAR4 DMA2_CPAR(DMA_CHANNEL4)__ARM_ARCH_ISA_THUMBDMA1_CMAR1 DMA1_CMAR(DMA_CHANNEL1)DMA_IFCR_CIF(channel) (DMA_IFCR_CIF_BIT << (DMA_FLAG_OFFSET(channel)))__ARM_FEATURE_MATMUL_INT8__UINT8_TYPE__ unsigned charDMA_CMAR(dma_base,channel) MMIO32((dma_base) + 0x14 + (0x14 * ((channel) - 1)))__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0DBGMCU_BASE (PERIPH_BASE_APB + 0x15800)__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)TIM16_BASE (PERIPH_BASE_APB + 0x14400)DMA_IFCR_CTEIF_BIT DMA_TEIF__FLT32_MIN__ 1.1754943508222875e-38F32__FLT32_HAS_QUIET_NAN__ 1__LDBL_HAS_INFINITY__ 1dma_enable_transfer_error_interruptUINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308DMA_ISR_TCIF7 DMA_ISR_TCIF(DMA_CHANNEL7)DMA1_CNDTR6 DMA1_CNDTR(DMA_CHANNEL6)__ARM_PCS 1bool _BoolDMA_ISR_TEIF(channel) (DMA_ISR_TEIF_BIT << (DMA_FLAG_OFFSET(channel)))UINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffBBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)INT16_MAX __INT16_MAX__DMA_ISR_HTIF3 DMA_ISR_HTIF(DMA_CHANNEL3)DMA2_CMAR4 DMA2_CMAR(DMA_CHANNEL4)__FLT32X_IS_IEC_60559__ 2SYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXPERIPH_BASE_AHB1 (PERIPH_BASE + 0x00020000)__INT_LEAST16_WIDTH__ 16__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLDMA1_CNDTR4 DMA1_CNDTR(DMA_CHANNEL4)DMA1_CCR6 DMA1_CCR(DMA_CHANNEL6)INT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHRDMA_IFCR_CHTIF(channel) (DMA_IFCR_CHTIF_BIT << (DMA_FLAG_OFFSET(channel)))DMA_CCR_MSIZE_MASK (0x3 << 10)__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)DMA_IFCR_CTEIF3 DMA_IFCR_CTEIF(DMA_CHANNEL3)/build/libopencm3/lib/stm32/f0__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffUL__INT_LEAST8_MAX__ 0x7f__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXDMA_CCR_EN (1 << 0)DAC_BASE (PERIPH_BASE_APB + 0x7400)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)DMA2_CNDTR(channel) DMA_CNDTR(DMA2, channel)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1DMA1_CNDTR7 DMA1_CNDTR(DMA_CHANNEL7)DMA_CCR_PL_MEDIUM (0x1 << 12)DMA2_CNDTR3 DMA2_CNDTR(DMA_CHANNEL3)__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fBIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intDMA_ISR_MASK(channel) (DMA_FLAGS << DMA_FLAG_OFFSET(channel))__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0addressST_VREFINT_CAL MMIO16(0x1FFFF7BA)__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAXchannel__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)__INT32_MAX__ 0x7fffffffLST_TSENSE_CAL2_110C MMIO16(0x1FFFF7C2)UINTMAX_MAXEXTI_BASE (PERIPH_BASE_APB + 0x10400)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_BF16_VECTOR_ARITHMETICdma_set_prioritydma_clear_interrupt_flags__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__INT8_MAX __INT8_MAX__DMA2_CPAR3 DMA2_CPAR(DMA_CHANNEL3)__INT_LEAST16_TYPE__ short int__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1DMA_CCR(dma_base,channel) MMIO32((dma_base) + 0x08 + (0x14 * ((channel) - 1)))__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24dma_set_number_of_data__UDQ_IBIT__ 0__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64UINTPTR_MAXDMA_TCIF (1 << 1)__LDBL_DENORM_MIN__ 4.9406564584124654e-324L__INT64_MAX__ 0x7fffffffffffffffLLinterrupts__ULLFRACT_IBIT__ 0DMA_ISR_TEIF_BIT DMA_TEIFDMA_FLAG_OFFSET(channel) (4*((channel) - 1))dma_enable_peripheral_increment_modeMMIO16(addr) (*(volatile uint16_t *)(addr))DMA_ISR_TCIF5 DMA_ISR_TCIF(DMA_CHANNEL5)__GNUC__ 12WCHAR_MAXDMA_IFCR_CIF1 DMA_IFCR_CIF(DMA_CHANNEL1)DMA_IFCR_CIF_BIT 0xFDMA_ISR_TCIF6 DMA_ISR_TCIF(DMA_CHANNEL6)__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULK__ARM_ARCH 6__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAX__LDBL_HAS_QUIET_NAN__ 1__LONG_LONG_WIDTH__ 64BIT6 (1<<6)DMA2_CCR5 DMA2_CCR(DMA_CHANNEL5)DMA_IFCR_CGIF1 DMA_IFCR_CGIF(DMA_CHANNEL1)DMA_ISR_TCIF2 DMA_ISR_TCIF(DMA_CHANNEL2)__UINT_FAST64_MAX__ 0xffffffffffffffffULL__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xdma_set_peripheral_sizeINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAXDMA_CHANNEL4 4__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLdma_disable_transfer_complete_interruptDMA_IFCR_CGIF3 DMA_IFCR_CGIF(DMA_CHANNEL3)__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8interrupt__SIZEOF_WCHAR_T__ 4DMA1_CMAR2 DMA1_CMAR(DMA_CHANNEL2)DMA_CCR_MEM2MEM (1 << 14)__UFRACT_MAX__ 0XFFFFP-16URINT64_MAXDMA_IFCR_CTEIF2 DMA_IFCR_CTEIF(DMA_CHANNEL2)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0dma_enable_transfer_complete_interrupt__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__DMA1_CPAR1 DMA1_CPAR(DMA_CHANNEL1)SYS_TICK_BASE (SCS_BASE + 0x0010)__USER_LABEL_PREFIX__ DMA_IFCR_CGIF_BIT DMA_GIF__ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)DMA_IFCR_CTEIF4 DMA_IFCR_CTEIF(DMA_CHANNEL4)SPI2_BASE (PERIPH_BASE_APB + 0x3800)DMA_FLAGS (DMA_TEIF | DMA_TCIF | DMA_HTIF | DMA_GIF)DMA_ISR(dma_base) MMIO32((dma_base) + 0x00)DMA_IFCR_CTCIF1 DMA_IFCR_CTCIF(DMA_CHANNEL1)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)DMA_CCR_PL_LOW (0x0 << 12)__INT_FAST32_TYPE__ intCRS_BASE (PERIPH_BASE_APB + 0x6C00)unsigned int__GCC_ASM_FLAG_OUTPUTS__DMA_IFCR_CTCIF7 DMA_IFCR_CTCIF(DMA_CHANNEL7)__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1DMA_IFCR_CIF3 DMA_IFCR_CIF(DMA_CHANNEL3)__USACCUM_IBIT__ 8__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UK__FLT_EVAL_METHOD__ 0DMA_CCR_MINC (1 << 7)__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32DMA_IFCR(dma_base) MMIO32((dma_base) + 0x04)__thumb2__RCC_BASE (PERIPH_BASE_AHB1 + 0x1000)__ARM_FEATURE_LDREX../common/dma_common_l1f013.c__UQQ_FBIT__ 8INT16_Cflag__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX__DMA_GIF (1 << 0)__LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__RTC_BASE (PERIPH_BASE_APB + 0x2800)dma_disable_channel__SIG_ATOMIC_TYPE__ intUINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINDMA_CCR_CIRC (1 << 5)PERIPH_BASE (0x40000000U)true 1__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)__LDBL_MIN_10_EXP__ (-307)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1BIT28 (1<<28)__LFRACT_EPSILON__ 0x1P-31LR__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX____FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1DMA_ISR_GIF(channel) (DMA_ISR_GIF_BIT << (DMA_FLAG_OFFSET(channel)))DMA_CHANNEL3 3DMA_IFCR_CGIF7 DMA_IFCR_CGIF(DMA_CHANNEL7)__FLT32_MIN_10_EXP__ (-37)MMIO64(addr) (*(volatile uint64_t *)(addr))DMA_TEIF (1 << 3)__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MINDESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)__ARM_ARCH_PROFILE 77__SACCUM_IBIT__ 8DMA_ISR_TCIF1 DMA_ISR_TCIF(DMA_CHANNEL1)__ARM_FEATURE_QRDMX__ARM_ARCH_ISA_THUMB 1DESIG_FLASH_SIZE_BASE (0x1FFFF7CCU)__LDBL_HAS_DENORM__ 1DMA_ISR_TEIF2 DMA_ISR_TEIF(DMA_CHANNEL2)__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)DMA1_CCR2 DMA1_CCR(DMA_CHANNEL2)INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1__FLT32_DIG__ 6INT_LEAST16_MAXTIM6_BASE (PERIPH_BASE_APB + 0x1000)PPBI_BASE (0xE0000000U)BIT15 (1<<15)DMA_ISR_GIF_BIT DMA_GIFBIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7INT32_MAX__ACCUM_MIN__ (-0X1P15K-0X1P15K)__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intDMA2 DMA2_BASEBIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)__FLT_NORM_MAX__ 3.4028234663852886e+38FUSART1_BASE (PERIPH_BASE_APB + 0x13800)DMA_IFCR_CGIF5 DMA_IFCR_CGIF(DMA_CHANNEL5)long long unsigned int__FLT_MIN_10_EXP__ (-37)GPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int__APCS_32__ 1__DQ_FBIT__ 63INT_LEAST64_MAXuint16_tDMA_CCR_PSIZE_32BIT (0x2 << 8)__UHQ_IBIT__ 0dma_disable_memory_increment_modeINT_LEAST8_MINBIT29 (1<<29)__INT_FAST16_TYPE__ intUSART7_BASE (PERIPH_BASE_APB + 0x11800)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__UINT_LEAST16_TYPE__ short unsigned intDMA_CNDTR(dma_base,channel) MMIO32((dma_base) + 0x0C + (0x14 * ((channel) - 1)))__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15DMA2_CCR2 DMA2_CCR(DMA_CHANNEL2)__UTQ_FBIT__ 128__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffDMA_CHANNEL5 5DMA2_BASE (PERIPH_BASE_AHB1 + 0x0400)PTRDIFF_MAX __PTRDIFF_MAX__DMA1_CMAR3 DMA1_CMAR(DMA_CHANNEL3)DMA1_CNDTR3 DMA1_CNDTR(DMA_CHANNEL3)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKDMA_ISR_TCIF3 DMA_ISR_TCIF(DMA_CHANNEL3)DMA_ISR_GIF2 DMA_ISR_GIF(DMA_CHANNEL2)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRDMA_IFCR_CTCIF6 DMA_IFCR_CTCIF(DMA_CHANNEL6)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intWCHAR_MINdma_enable_circular_modeDMA1_BASE DMA_BASEDMA1_CPAR2 DMA1_CPAR(DMA_CHANNEL2)BEGIN_DECLS USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)DMA_ISR_TCIF4 DMA_ISR_TCIF(DMA_CHANNEL4)DMA1_CNDTR1 DMA1_CNDTR(DMA_CHANNEL1)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)DMA_ISR_HTIF_BIT DMA_HTIF__ARM_EABI__ 1DMA_ISR_HTIF7 DMA_ISR_HTIF(DMA_CHANNEL7)INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1DMA_CCR_DIR (1 << 4)USART6_BASE (PERIPH_BASE_APB + 0x11400)DMA_ISR_GIF4 DMA_ISR_GIF(DMA_CHANNEL4)__QQ_IBIT__ 0DESIG_UNIQUE_ID_BASE (0x1FFFF7ACU)__LLACCUM_FBIT__ 31LIBOPENCM3_DMA_COMMON_F13_H __UINTMAX_TYPE__ long long unsigned int__USQ_IBIT__ 0__UINT_LEAST32_TYPE__ long unsigned intnumber__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 1DMA1_CCR5 DMA1_CCR(DMA_CHANNEL5)DMA1 DMA1_BASEDMA_IFCR_CTEIF5 DMA_IFCR_CTEIF(DMA_CHANNEL5)INTMAX_MAXDEBUG_BASE (SCS_BASE + 0x0DF0)__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CDMA2_CPAR5 DMA2_CPAR(DMA_CHANNEL5)INT64_MINdma_set_memory_address__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intDMA_ISR_GIF6 DMA_ISR_GIF(DMA_CHANNEL6)UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRDMA1_CMAR5 DMA1_CMAR(DMA_CHANNEL5)__ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned intI2C2_BASE (PERIPH_BASE_APB + 0x5800)DMA2_CNDTR1 DMA2_CNDTR(DMA_CHANNEL1)DMA_IFCR_CTCIF_BIT DMA_TCIFLIBOPENCM3_DMA_H __LONG_MAX__ 0x7fffffffLTIM15_BASE (PERIPH_BASE_APB + 0x14000)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16DMA2_ISR DMA_ISR(DMA2)dma_channel_resetFLASH_BASE (0x08000000U)CORESIGHT_LAR_OFFSET 0xfb0dma_enable_channelDMA_IFCR_CHTIF_BIT DMA_HTIFDMA1_CPAR4 DMA1_CPAR(DMA_CHANNEL4)FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x2000)short intDMA_CCR_MSIZE_SHIFT 10__UINT16_C(c) cBIT31 (1<<31)__UDA_IBIT__ 32DMA1_ISR DMA_ISR(DMA1)DMA_CCR_MSIZE_32BIT (0x2 << 10)UINT_LEAST32_MAXDMA2_CMAR(channel) DMA_CMAR(DMA2, channel)BIT2 (1<<2)__ATOMIC_RELAXED 0ADC_BASE (PERIPH_BASE_APB + 0x12400)__ARM_FEATURE_COPROCDMA_IFCR_CHTIF5 DMA_IFCR_CHTIF(DMA_CHANNEL5)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53DMA_IFCR_CIF2 DMA_IFCR_CIF(DMA_CHANNEL2)BIT5 (1<<5)__USFRACT_MIN__ 0.0UHRBIT1 (1<<1)USART4_BASE (PERIPH_BASE_APB + 0x4C00)INT8_CINT_LEAST32_MAXDMA2_CMAR1 DMA2_CMAR(DMA_CHANNEL1)__USES_INITFINI__ 1__DBL_DECIMAL_DIG__ 17DMA_IFCR_CGIF6 DMA_IFCR_CGIF(DMA_CHANNEL6)DMA_ISR_GIF1 DMA_ISR_GIF(DMA_CHANNEL1)BIT8 (1<<8)DMA_CCR_MSIZE_8BIT (0x0 << 10)INT16_C(c) __INT16_C(c)DMA_IFCR_CHTIF7 DMA_IFCR_CHTIF(DMA_CHANNEL7)__INT16_MAX__ 0x7fff__INT_WIDTH__ 32DMA_IFCR_CTEIF1 DMA_IFCR_CTEIF(DMA_CHANNEL1)__QQ_FBIT__ 7STM32F0 1POWER_CONTROL_BASE (PERIPH_BASE_APB + 0x7000)__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32DMA_IFCR_CTCIF3 DMA_IFCR_CTCIF(DMA_CHANNEL3)__ULLFRACT_EPSILON__ 0x1P-64ULLRGPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)__SIZEOF_WINT_T__ 4DMA_CPAR(dma_base,channel) MMIO32((dma_base) + 0x10 + (0x14 * ((channel) - 1)))__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17DMA1_CMAR4 DMA1_CMAR(DMA_CHANNEL4)DMA1_CMAR7 DMA1_CMAR(DMA_CHANNEL7)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1__FLT32X_HAS_DENORM__ 1__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1__TA_IBIT__ 64DMA_IFCR_CTCIF5 DMA_IFCR_CTCIF(DMA_CHANNEL5)DMA_CCR_PSIZE_SHIFT 8__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPROD__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H __GCC_CONSTRUCTIVE_SIZE 64__LLFRACT_IBIT__ 0mem_sizeuint32_tBIT12 (1<<12)DMA_ISR_TEIF6 DMA_ISR_TEIF(DMA_CHANNEL6)DMA2_CCR4 DMA2_CCR(DMA_CHANNEL4)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HKDMA1_CPAR3 DMA1_CPAR(DMA_CHANNEL3)DMA_CHANNEL1 1dma_enable_half_transfer_interruptDMA_IFCR_CTEIF6 DMA_IFCR_CTEIF(DMA_CHANNEL6)__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULKdma_get_number_of_data__LDBL_DIG__ 15DMA2_CSELR DMA_CSELR(DMA2)UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXLIBOPENCM3_CM3_MEMORYMAP_H BIT16 (1<<16)DMA_CHANNEL6 6__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8DMA_ISR_HTIF(channel) (DMA_ISR_HTIF_BIT << (DMA_FLAG_OFFSET(channel)))DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_C__LDBL_MAX_10_EXP__ 308INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1DMA_ISR_GIF7 DMA_ISR_GIF(DMA_CHANNEL7)__HQ_FBIT__ 15__bool_true_false_are_defined 1DMA_ISR_TEIF7 DMA_ISR_TEIF(DMA_CHANNEL7)BIT26 (1<<26)__SIZE_MAX__ 0xffffffffU__ARM_FEATURE_SATDMA_IFCR_CGIF(channel) (DMA_IFCR_CGIF_BIT << (DMA_FLAG_OFFSET(channel)))__ARM_ARCHINTMAX_C(c) __INTMAX_C(c)__STRICT_ANSI__ 1DMA_CCR_TEIE (1 << 3)DMA_CCR_MSIZE_16BIT (0x1 << 10)DMA_CCR_PSIZE_MASK (0x3 << 8)INT_LEAST64_MINPTRDIFF_MAXDMA_CSELR_CxS_MASK (0x0f)ST_TSENSE_CAL1_30C MMIO16(0x1FFFF7B8)__LLFRACT_EPSILON__ 0x1P-63LLR__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53__ARM_ASM_SYNTAX_UNIFIED__WINT_MAX__INT16_C(c) cINT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32DMA1_CCR4 DMA1_CCR(DMA_CHANNEL4)__ATOMIC_ACQ_REL 4DMA1_CCR7 DMA1_CCR(DMA_CHANNEL7)__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)DMA1_CCR1 DMA1_CCR(DMA_CHANNEL1)DMA_IFCR_CHTIF4 DMA_IFCR_CHTIF(DMA_CHANNEL4)__FLT32_NORM_MAX__ 3.4028234663852886e+38F32dma_disable_transfer_error_interruptI2C1_BASE (PERIPH_BASE_APB + 0x5400)UINT64_C(c) __UINT64_C(c)__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53DMA_CCR_PL_VERY_HIGH (0x3 << 12)__ULFRACT_IBIT__ 0INT_FAST16_MAXdma_disable_half_transfer_interrupt__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long intDMA1_CMAR6 DMA1_CMAR(DMA_CHANNEL6)IWDG_BASE (PERIPH_BASE_APB + 0x3000)__ARM_FEATURE_CDE_COPROCDMA_IFCR_CHTIF6 DMA_IFCR_CHTIF(DMA_CHANNEL6)DMA1_CPAR6 DMA1_CPAR(DMA_CHANNEL6)UINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| A+aeabi!6S-MM ñÿ !!""##$$%%&&')*,.0DF2468:<>@BHBs¤Ö;o« GJ å ÷ (@ Q e }žÀå $AZ~£Æê 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1)WWDG_BASE (PERIPH_BASE_APB + 0x2c00)__UINT8_C(c) c__INT16_TYPE__ short intDMA2_CNDTR4 DMA2_CNDTR(DMA_CHANNEL4)__FLT64_MAX__ 1.7976931348623157e+308F64UINT_FAST32_MAXDMA1_CMAR(channel) DMA_CMAR(DMA1, channel)BIT24 (1<<24)INT_FAST64_MAX __INT_FAST64_MAX__DMA1_CPAR(channel) DMA_CPAR(DMA1, channel)DMA_IFCR_CTCIF2 DMA_IFCR_CTCIF(DMA_CHANNEL2)__UINT_LEAST16_MAX__ 0xffff__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64DMA1_CNDTR(channel) DMA_CNDTR(DMA1, channel)DMA2_CNDTR5 DMA2_CNDTR(DMA_CHANNEL5)USART5_BASE (PERIPH_BASE_APB + 0x5000)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intGPIO_PORT_C_BASE (PERIPH_BASE_AHB2 + 0x0800)DMA1_CNDTR2 DMA1_CNDTR(DMA_CHANNEL2)INT32_MIN (-INT32_MAX - 1)__FLT32_MAX_10_EXP__ 38DMA2_CNDTR2 DMA2_CNDTR(DMA_CHANNEL2)DMA_ISR_TEIF2 DMA_ISR_TEIF(DMA_CHANNEL2)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZDMA_IFCR_CIF4 DMA_IFCR_CIF(DMA_CHANNEL4)__UINTPTR_MAX__ 0xffffffffU__FLT32_MIN_EXP__ (-125)DMA1_CPAR7 DMA1_CPAR(DMA_CHANNEL7)UINT32_MAX __UINT32_MAX__TIM3_BASE (PERIPH_BASE_APB + 0x0400)USART8_BASE (PERIPH_BASE_APB + 0x11C00)__ULFRACT_FBIT__ 32__FLT64_MIN_10_EXP__ (-307)DMA_IFCR_CTEIF7 DMA_IFCR_CTEIF(DMA_CHANNEL7)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__DMA_CCR_TCIE (1 << 1)__SFRACT_EPSILON__ 0x1P-7HR__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAX__SQ_FBIT__ 31DMA_CCR_PL_HIGH (0x2 << 12)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)DMA1_CCR(channel) DMA_CCR(DMA1, channel)DMA_CHANNEL2 2__UHQ_FBIT__ 16__FLT64_MIN_EXP__ (-1021)DMA_IFCR_CHTIF1 DMA_IFCR_CHTIF(DMA_CHANNEL1)__PTRDIFF_WIDTH__ 32INT_FAST8_MAXDMA_ISR_TEIF3 DMA_ISR_TEIF(DMA_CHANNEL3)__UINT_FAST8_MAX__ 0xffffffffUUINT16_C(c) __UINT16_C(c)DMA_CCR_PINC (1 << 6)__LACCUM_IBIT__ 32DMA_ISR_GIF3 DMA_ISR_GIF(DMA_CHANNEL3)__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__INTPTR_MAX__ 0x7fffffff__UINT_FAST16_MAX__ 0xffffffffUDMA_IFCR_CHTIF3 DMA_IFCR_CHTIF(DMA_CHANNEL3)INT64_C(c) __INT64_C(c)DMA1_CSELR DMA_CSELR(DMA1)__GCC_IEC_559_COMPLEX 0__UFRACT_MIN__ 0.0URWCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__GPIO_PORT_D_BASE (PERIPH_BASE_AHB2 + 0x0C00)__UINT_LEAST8_TYPE__ unsigned char__ACCUM_FBIT__ 15__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1DMA_ISR_TEIF4 DMA_ISR_TEIF(DMA_CHANNEL4)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xDMA_IFCR_CTEIF5 DMA_IFCR_CTEIF(DMA_CHANNEL5)NVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed charDMA_CCR_PSIZE_16BIT (0x1 << 8)__GCC_ATOMIC_BOOL_LOCK_FREE 1BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64USART2_BASE (PERIPH_BASE_APB + 0x4400)__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4WINT_MIN __WINT_MIN__DMA_ISR_HTIF1 DMA_ISR_HTIF(DMA_CHANNEL1)__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32__FLT32X_MIN_EXP__ (-1021)DMA_ISR_TEIF5 DMA_ISR_TEIF(DMA_CHANNEL5)DMA_IFCR_CIF7 DMA_IFCR_CIF(DMA_CHANNEL7)INFO_BASE (0x1ffff000U)TIM17_BASE (PERIPH_BASE_APB + 0x14800)BIT27 (1<<27)DMA_IFCR_CTEIF(channel) (DMA_IFCR_CTEIF_BIT << (DMA_FLAG_OFFSET(channel)))TIM7_BASE (PERIPH_BASE_APB + 0x1400)__UTA_FBIT__ 64__FLT_DECIMAL_DIG__ 9__thumb__ 1LIBOPENCM3_MEMORYMAP_COMMON_H signed charuint8_tINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)DMA_CCR_PL_MASK (0x3 << 12)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1DMA1_CPAR6 DMA1_CPAR(DMA_CHANNEL6)__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLKDMA_IFCR_CTCIF(channel) (DMA_IFCR_CTCIF_BIT << (DMA_FLAG_OFFSET(channel)))__GNUC_PATCHLEVEL__ 1PTRDIFF_MINGNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsUINTPTR_MAX __UINTPTR_MAX____ARM_ARCH_PROFILE 77DMA_ISR_HTIF2 DMA_ISR_HTIF(DMA_CHANNEL2)GPIO_PORT_E_BASE (PERIPH_BASE_AHB2 + 0x1000)__FLT64_MAX_10_EXP__ 308__WCHAR_WIDTH__ 32MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINDMA2_CCR1 DMA2_CCR(DMA_CHANNEL1)__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38__FRACT_MAX__ 0X7FFFP-15RPERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)DMA2_CMAR3 DMA2_CMAR(DMA_CHANNEL3)__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5__ARM_ARCH_EXT_IDIV__DMA_IFCR_CGIF4 DMA_IFCR_CGIF(DMA_CHANNEL4)PERIPH_BASE_APB (PERIPH_BASE + 0x00000000)__UINT16_MAX__ 0xffff__TQ_FBIT__ 127DMA_CHANNEL7 7TIM14_BASE (PERIPH_BASE_APB + 0x2000)__USQ_FBIT__ 32INT_FAST16_MINDMA2_CPAR2 DMA2_CPAR(DMA_CHANNEL2)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32DMA2_CPAR(channel) DMA_CPAR(DMA2, channel)DMA1_CCR3 DMA1_CCR(DMA_CHANNEL3)SPI1_BASE (PERIPH_BASE_APB + 0x13000)INT_FAST32_MIN (-INT_FAST32_MAX - 1)CEC_BASE (PERIPH_BASE_APB + 0x7800)DMA2_IFCR DMA_IFCR(DMA2)UINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX____USA_IBIT__ 16PTRDIFF_MIN (-PTRDIFF_MAX - 1)DMA_ISR_TEIF1 DMA_ISR_TEIF(DMA_CHANNEL1)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__DBL_IS_IEC_60559__ 2__UINT_FAST64_TYPE__ long long unsigned intTIM2_BASE (PERIPH_BASE_APB + 0x0000)DMA_CCR_PL_SHIFT 12DMA_CSELR_CxS_SHIFT(channel) (4 * ((channel) - 1))__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC____UINT32_C(c) c ## ULDMA2_CNDTR(channel) DMA_CNDTR(DMA2, channel)DMA_IFCR_CHTIF2 DMA_IFCR_CHTIF(DMA_CHANNEL2)INT_FAST64_MIN__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16L__USFRACT_MIN__ 0.0UHRTSC_BASE (PERIPH_BASE_AHB1 + 0x4000)__ARM_NEON__UINT8_MAX__ 0xffDMA_IFCR_CIF5 DMA_IFCR_CIF(DMA_CHANNEL5)__LDBL_MAX_EXP__ 1024LIBOPENCM3_MEMORYMAP_H __DBL_HAS_DENORM__ 1DMA_HTIF (1 << 2)__DA_FBIT__ 31DMA2_CCR3 DMA2_CCR(DMA_CHANNEL3)__GXX_ABI_VERSION 1017DMA2_CMAR5 DMA2_CMAR(DMA_CHANNEL5)__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LDMA_IFCR_CGIF2 DMA_IFCR_CGIF(DMA_CHANNEL2)INT_LEAST32_MAX __INT_LEAST32_MAX____ULLACCUM_EPSILON__ 0x1P-32ULLKDMA_ISR_TCIF(channel) (DMA_ISR_TCIF_BIT << (DMA_FLAG_OFFSET(channel)))INT_LEAST8_MAX __INT_LEAST8_MAX__DMA_CSELR(dma_base) MMIO32((dma_base) + 0xA8)USART3_BASE (PERIPH_BASE_APB + 0x4800)__UACCUM_MIN__ 0.0UK__FLT_EPSILON__ 1.1920928955078125e-7FDMA_IFCR_CIF6 DMA_IFCR_CIF(DMA_CHANNEL6)DMA2_CPAR4 DMA2_CPAR(DMA_CHANNEL4)__ARM_ARCH_ISA_THUMBDMA1_CMAR1 DMA1_CMAR(DMA_CHANNEL1)DMA_IFCR_CIF(channel) (DMA_IFCR_CIF_BIT << (DMA_FLAG_OFFSET(channel)))__ARM_FEATURE_MATMUL_INT8DMA_CMAR(dma_base,channel) MMIO32((dma_base) + 0x14 + (0x14 * ((channel) - 1)))__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0DBGMCU_BASE (PERIPH_BASE_APB + 0x15800)__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)TIM16_BASE (PERIPH_BASE_APB + 0x14400)DMA_IFCR_CTEIF_BIT DMA_TEIF__FLT32_MIN__ 1.1754943508222875e-38F32__FLT32_HAS_QUIET_NAN__ 1__LDBL_HAS_INFINITY__ 1__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308DMA_ISR_TCIF7 DMA_ISR_TCIF(DMA_CHANNEL7)DMA1_CNDTR6 DMA1_CNDTR(DMA_CHANNEL6)__ARM_PCS 1bool _BoolDMA_ISR_TEIF(channel) (DMA_ISR_TEIF_BIT << (DMA_FLAG_OFFSET(channel)))UINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffBBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)INT16_MAX __INT16_MAX__DMA_ISR_HTIF3 DMA_ISR_HTIF(DMA_CHANNEL3)DMA2_CMAR4 DMA2_CMAR(DMA_CHANNEL4)__FLT32X_IS_IEC_60559__ 2SYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXPERIPH_BASE_AHB1 (PERIPH_BASE + 0x00020000)__INT_LEAST16_WIDTH__ 16__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLDMA1_CNDTR4 DMA1_CNDTR(DMA_CHANNEL4)DMA1_CCR6 DMA1_CCR(DMA_CHANNEL6)INT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHRDMA_IFCR_CHTIF(channel) (DMA_IFCR_CHTIF_BIT << (DMA_FLAG_OFFSET(channel)))DMA_CCR_MSIZE_MASK (0x3 << 10)__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)DMA_IFCR_CTEIF3 DMA_IFCR_CTEIF(DMA_CHANNEL3)/build/libopencm3/lib/stm32/f0__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffUL__INT_LEAST8_MAX__ 0x7f__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXDMA_CCR_EN (1 << 0)DAC_BASE (PERIPH_BASE_APB + 0x7400)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1DMA1_CNDTR7 DMA1_CNDTR(DMA_CHANNEL7)DMA_CCR_PL_MEDIUM (0x1 << 12)DMA2_CNDTR3 DMA2_CNDTR(DMA_CHANNEL3)__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fBIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intDMA_ISR_MASK(channel) (DMA_FLAGS << DMA_FLAG_OFFSET(channel))__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0../common/dma_common_csel.cST_VREFINT_CAL MMIO16(0x1FFFF7BA)__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAXchannel__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RDMA2_CNDTR1 DMA2_CNDTR(DMA_CHANNEL1)__INT32_MAX__ 0x7fffffffL__INT64_C(c) c ## LLST_TSENSE_CAL2_110C MMIO16(0x1FFFF7C2)UINTMAX_MAXEXTI_BASE (PERIPH_BASE_APB + 0x10400)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_BF16_VECTOR_ARITHMETICPPBI_BASE (0xE0000000U)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__INT8_MAX __INT8_MAX__DMA2_CPAR3 DMA2_CPAR(DMA_CHANNEL3)__INT_LEAST16_TYPE__ short int__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1DMA_CCR(dma_base,channel) MMIO32((dma_base) + 0x08 + (0x14 * ((channel) - 1)))__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64UINTPTR_MAXDMA_TCIF (1 << 1)__LDBL_DENORM_MIN__ 4.9406564584124654e-324L__INT64_MAX__ 0x7fffffffffffffffLL__ULLFRACT_IBIT__ 0DMA_ISR_TEIF_BIT DMA_TEIFDMA_FLAG_OFFSET(channel) (4*((channel) - 1))MMIO16(addr) (*(volatile uint16_t *)(addr))DMA_ISR_TCIF5 DMA_ISR_TCIF(DMA_CHANNEL5)GPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)WCHAR_MAXDMA_IFCR_CIF1 DMA_IFCR_CIF(DMA_CHANNEL1)DMA_IFCR_CIF_BIT 0xFDMA_ISR_TCIF6 DMA_ISR_TCIF(DMA_CHANNEL6)INTMAX_MIN__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULK__ARM_ARCH 6__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__ARM_FEATURE_CMSE__LONG_WIDTH__ 32INTPTR_MAX__LDBL_HAS_QUIET_NAN__ 1__LONG_LONG_WIDTH__ 64BIT6 (1<<6)DMA2_CCR5 DMA2_CCR(DMA_CHANNEL5)DMA_IFCR_CGIF1 DMA_IFCR_CGIF(DMA_CHANNEL1)DMA_ISR_TCIF2 DMA_ISR_TCIF(DMA_CHANNEL2)__UINT_FAST64_MAX__ 0xffffffffffffffffULL__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xDMA_ISR_GIF_BIT DMA_GIFINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAXDMA_CHANNEL4 4__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLDMA_IFCR_CGIF3 DMA_IFCR_CGIF(DMA_CHANNEL3)__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4DMA1_CMAR2 DMA1_CMAR(DMA_CHANNEL2)DMA_CCR_MEM2MEM (1 << 14)__UFRACT_MAX__ 0XFFFFP-16URINT64_MAXDMA_IFCR_CTEIF2 DMA_IFCR_CTEIF(DMA_CHANNEL2)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__DMA1_CPAR1 DMA1_CPAR(DMA_CHANNEL1)SYS_TICK_BASE (SCS_BASE + 0x0010)__USER_LABEL_PREFIX__ DMA_IFCR_CGIF_BIT DMA_GIF__ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)DMA_IFCR_CTEIF4 DMA_IFCR_CTEIF(DMA_CHANNEL4)SPI2_BASE (PERIPH_BASE_APB + 0x3800)DMA_FLAGS (DMA_TEIF | DMA_TCIF | DMA_HTIF | DMA_GIF)DMA_ISR(dma_base) MMIO32((dma_base) + 0x00)DMA_IFCR_CTCIF1 DMA_IFCR_CTCIF(DMA_CHANNEL1)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)DMA_CCR_PL_LOW (0x0 << 12)__INT_FAST32_TYPE__ intCRS_BASE (PERIPH_BASE_APB + 0x6C00)unsigned int__GCC_ASM_FLAG_OUTPUTS__DMA_IFCR_CTCIF7 DMA_IFCR_CTCIF(DMA_CHANNEL7)__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1DMA_IFCR_CIF3 DMA_IFCR_CIF(DMA_CHANNEL3)__USACCUM_IBIT__ 8__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UK__FLT_EVAL_METHOD__ 0DMA_CCR_MINC (1 << 7)__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32DMA_IFCR(dma_base) MMIO32((dma_base) + 0x04)__thumb2__RCC_BASE (PERIPH_BASE_AHB1 + 0x1000)__ARM_FEATURE_LDREX__UQQ_FBIT__ 8INT16_CDMA_ISR_GIF1 DMA_ISR_GIF(DMA_CHANNEL1)__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX__DMA_GIF (1 << 0)__LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__RTC_BASE (PERIPH_BASE_APB + 0x2800)__UINT8_TYPE__ unsigned char__SIG_ATOMIC_TYPE__ intUINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINDMA_CCR_CIRC (1 << 5)PERIPH_BASE (0x40000000U)true 1__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)__LDBL_MIN_10_EXP__ (-307)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1BIT28 (1<<28)__LFRACT_EPSILON__ 0x1P-31LR__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX____FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1DMA_ISR_GIF(channel) (DMA_ISR_GIF_BIT << (DMA_FLAG_OFFSET(channel)))DMA_CHANNEL3 3DMA_IFCR_CGIF7 DMA_IFCR_CGIF(DMA_CHANNEL7)__FLT32_MIN_10_EXP__ (-37)MMIO64(addr) (*(volatile uint64_t *)(addr))DMA_TEIF (1 << 3)__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MINDESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)__USACCUM_MIN__ 0.0UHK__TA_IBIT__ 64DMA_ISR_TCIF1 DMA_ISR_TCIF(DMA_CHANNEL1)__ARM_FEATURE_QRDMX__ARM_ARCH_ISA_THUMB 1DESIG_FLASH_SIZE_BASE (0x1FFFF7CCU)__LDBL_HAS_DENORM__ 1__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)DMA1_CCR2 DMA1_CCR(DMA_CHANNEL2)INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1__FLT32_DIG__ 6INT_LEAST16_MAXTIM6_BASE (PERIPH_BASE_APB + 0x1000)BIT15 (1<<15)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7INT32_MAX__ACCUM_MIN__ (-0X1P15K-0X1P15K)INT16_MAX__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intDMA2 DMA2_BASEBIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)__FLT_NORM_MAX__ 3.4028234663852886e+38FUSART1_BASE (PERIPH_BASE_APB + 0x13800)DMA_IFCR_CGIF5 DMA_IFCR_CGIF(DMA_CHANNEL5)long long unsigned int__FLT_MIN_10_EXP__ (-37)dma_set_channel_request__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int__APCS_32__ 1__DQ_FBIT__ 63INT_LEAST64_MAX__SACCUM_IBIT__ 8reg32DMA_CCR_PSIZE_32BIT (0x2 << 8)__UHQ_IBIT__ 0DMA1_CNDTR5 DMA1_CNDTR(DMA_CHANNEL5)BIT29 (1<<29)__INT_FAST16_TYPE__ intUSART7_BASE (PERIPH_BASE_APB + 0x11800)INT64_CDMA2_CCR2 DMA2_CCR(DMA_CHANNEL2)__UINT_LEAST16_TYPE__ short unsigned intDMA_CNDTR(dma_base,channel) MMIO32((dma_base) + 0x0C + (0x14 * ((channel) - 1)))__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15__UTQ_FBIT__ 128__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffDMA_CHANNEL5 5DMA2_BASE (PERIPH_BASE_AHB1 + 0x0400)PTRDIFF_MAX __PTRDIFF_MAX__DMA1_CMAR3 DMA1_CMAR(DMA_CHANNEL3)DMA1_CNDTR3 DMA1_CNDTR(DMA_CHANNEL3)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKDMA_ISR_TCIF3 DMA_ISR_TCIF(DMA_CHANNEL3)DMA_ISR_GIF2 DMA_ISR_GIF(DMA_CHANNEL2)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRDMA_IFCR_CTCIF6 DMA_IFCR_CTCIF(DMA_CHANNEL6)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intWCHAR_MINDMA1_BASE DMA_BASEDMA1_CPAR2 DMA1_CPAR(DMA_CHANNEL2)BEGIN_DECLS USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)DMA_ISR_TCIF4 DMA_ISR_TCIF(DMA_CHANNEL4)DMA1_CNDTR1 DMA1_CNDTR(DMA_CHANNEL1)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)DMA_ISR_HTIF_BIT DMA_HTIFUINT_LEAST8_MAX__ARM_EABI__ 1DMA_ISR_HTIF7 DMA_ISR_HTIF(DMA_CHANNEL7)INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1DMA_CCR_DIR (1 << 4)USART6_BASE (PERIPH_BASE_APB + 0x11400)DMA_ISR_GIF4 DMA_ISR_GIF(DMA_CHANNEL4)__QQ_IBIT__ 0DESIG_UNIQUE_ID_BASE (0x1FFFF7ACU)__LLACCUM_FBIT__ 31LIBOPENCM3_DMA_COMMON_F13_H __UINTMAX_TYPE__ long long unsigned int__USQ_IBIT__ 0__UINT_LEAST32_TYPE__ long unsigned int__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 1DMA1_CCR5 DMA1_CCR(DMA_CHANNEL5)DMA1 DMA1_BASEINT_LEAST8_MININTMAX_MAXDEBUG_BASE (SCS_BASE + 0x0DF0)__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CDMA2_CPAR5 DMA2_CPAR(DMA_CHANNEL5)INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intDMA_ISR_GIF6 DMA_ISR_GIF(DMA_CHANNEL6)UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRDMA1_CMAR5 DMA1_CMAR(DMA_CHANNEL5)__ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned intI2C2_BASE (PERIPH_BASE_APB + 0x5800)DMA_IFCR_CTCIF_BIT DMA_TCIFLIBOPENCM3_DMA_H __LONG_MAX__ 0x7fffffffLTIM15_BASE (PERIPH_BASE_APB + 0x14000)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16DMA2_ISR DMA_ISR(DMA2)FLASH_BASE (0x08000000U)CORESIGHT_LAR_OFFSET 0xfb0DMA_IFCR_CHTIF_BIT DMA_HTIFDMA1_CPAR4 DMA1_CPAR(DMA_CHANNEL4)FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x2000)short int__FLT32_IS_IEC_60559__ 2DMA_CCR_MSIZE_SHIFT 10__UINT16_C(c) cBIT31 (1<<31)__UDA_IBIT__ 32DMA1_ISR DMA_ISR(DMA1)DMA_CCR_MSIZE_32BIT (0x2 << 10)UINT_LEAST32_MAXDMA2_CMAR(channel) DMA_CMAR(DMA2, channel)BIT2 (1<<2)__ATOMIC_RELAXED 0ADC_BASE (PERIPH_BASE_APB + 0x12400)__ARM_FEATURE_COPROCDMA_IFCR_CHTIF5 DMA_IFCR_CHTIF(DMA_CHANNEL5)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53DMA_IFCR_CIF2 DMA_IFCR_CIF(DMA_CHANNEL2)BIT5 (1<<5)BIT1 (1<<1)USART4_BASE (PERIPH_BASE_APB + 0x4C00)INT8_CINT_LEAST32_MAXDMA2_CMAR1 DMA2_CMAR(DMA_CHANNEL1)__USES_INITFINI__ 1__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__DBL_DECIMAL_DIG__ 17DMA_IFCR_CGIF6 DMA_IFCR_CGIF(DMA_CHANNEL6)BIT8 (1<<8)DMA_CCR_MSIZE_8BIT (0x0 << 10)INT16_C(c) __INT16_C(c)DMA_IFCR_CHTIF7 DMA_IFCR_CHTIF(DMA_CHANNEL7)__INT16_MAX__ 0x7fff__INT_WIDTH__ 32DMA_IFCR_CTEIF1 DMA_IFCR_CTEIF(DMA_CHANNEL1)__QQ_FBIT__ 7STM32F0 1POWER_CONTROL_BASE (PERIPH_BASE_APB + 0x7000)__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32DMA_IFCR_CTCIF3 DMA_IFCR_CTCIF(DMA_CHANNEL3)__ULLFRACT_EPSILON__ 0x1P-64ULLRGPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)__SIZEOF_WINT_T__ 4DMA_CPAR(dma_base,channel) MMIO32((dma_base) + 0x10 + (0x14 * ((channel) - 1)))__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17DMA1_CMAR4 DMA1_CMAR(DMA_CHANNEL4)DMA1_CMAR7 DMA1_CMAR(DMA_CHANNEL7)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1__FLT32X_HAS_DENORM__ 1__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1DMA_IFCR_CTCIF5 DMA_IFCR_CTCIF(DMA_CHANNEL5)DMA_CCR_PSIZE_SHIFT 8__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPROD__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H __GCC_CONSTRUCTIVE_SIZE 64__LLFRACT_IBIT__ 0uint32_tBIT12 (1<<12)DMA_ISR_TEIF6 DMA_ISR_TEIF(DMA_CHANNEL6)DMA2_CCR4 DMA2_CCR(DMA_CHANNEL4)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HKDMA1_CPAR3 DMA1_CPAR(DMA_CHANNEL3)DMA_CHANNEL1 1DMA_IFCR_CTEIF6 DMA_IFCR_CTEIF(DMA_CHANNEL6)__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15DMA2_CSELR DMA_CSELR(DMA2)UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXLIBOPENCM3_CM3_MEMORYMAP_H BIT16 (1<<16)DMA_CHANNEL6 6__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8DMA_ISR_HTIF(channel) (DMA_ISR_HTIF_BIT << (DMA_FLAG_OFFSET(channel)))DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_C__LDBL_MAX_10_EXP__ 308INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1DMA_ISR_GIF7 DMA_ISR_GIF(DMA_CHANNEL7)__HQ_FBIT__ 15__bool_true_false_are_defined 1DMA_ISR_TEIF7 DMA_ISR_TEIF(DMA_CHANNEL7)BIT26 (1<<26)__SIZE_MAX__ 0xffffffffU__ARM_FEATURE_SATDMA_IFCR_CGIF(channel) (DMA_IFCR_CGIF_BIT << (DMA_FLAG_OFFSET(channel)))__ARM_ARCHINTMAX_C(c) __INTMAX_C(c)__STRICT_ANSI__ 1DMA_CCR_TEIE (1 << 3)DMA_CCR_MSIZE_16BIT (0x1 << 10)DMA_CCR_PSIZE_MASK (0x3 << 8)INT_LEAST64_MINPTRDIFF_MAXDMA_CSELR_CxS_MASK (0x0f)ST_TSENSE_CAL1_30C MMIO16(0x1FFFF7B8)__LLFRACT_EPSILON__ 0x1P-63LLR__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53__ARM_ASM_SYNTAX_UNIFIED__WINT_MAX__INT16_C(c) cINT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32DMA1_CCR4 DMA1_CCR(DMA_CHANNEL4)__GNUC__ 12__ATOMIC_ACQ_REL 4DMA1_CCR7 DMA1_CCR(DMA_CHANNEL7)__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)DMA1_CCR1 DMA1_CCR(DMA_CHANNEL1)DMA_IFCR_CHTIF4 DMA_IFCR_CHTIF(DMA_CHANNEL4)__FLT32_NORM_MAX__ 3.4028234663852886e+38F32I2C1_BASE (PERIPH_BASE_APB + 0x5400)UINT64_C(c) __UINT64_C(c)__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53DMA_CCR_PL_VERY_HIGH (0x3 << 12)__ULFRACT_IBIT__ 0INT_FAST16_MAX__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long intDMA1_CMAR6 DMA1_CMAR(DMA_CHANNEL6)IWDG_BASE (PERIPH_BASE_APB + 0x3000)__ARM_FEATURE_CDE_COPROCDMA_IFCR_CHTIF6 DMA_IFCR_CHTIF(DMA_CHANNEL6)UINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| A„…ŽA+aeabi!6S-MM ñÿ +-!#%')/=nŸÑ6j¦ .1 à dma_common_csel.c$twm4.0.88d8b58fcc7cb03c549c2662f5adb422wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.memorymap.h.21.991cbfb03a4e91ff777157049f1f9499wm4.memorymap.h.30.896853dc49eef163ea0904dd4a9a50c4wm4.dma_common_l1f013.h.40.d146a609b72d90beef1aca4a3724028bwm4.dma_common_csel.h.33.10bcdc1d66140fa425c6f7a4cd4745fedma_set_channel_request " &-4;BGT[`mt‚‡Ž¤ ¨ ¶ º ¿È Ì ÑÜ à (?V '-7@HNYaj#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýãéïõû %+17=CIOU[agmsy…‹‘—£©¯µ»ÁÇÍÓÙßåëñ÷ý !'-39?EKQW]ciou{‡“™Ÿ¥«±·½ÃÉÏÕÛáçíóùÿ#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýãéïõû %+17=CIOU[agmsy…‹‘—£©¯µ»ÁÇÍÓÙßåëñ÷ý !'-39?EKQW]ciou{‡“™Ÿ¥«±·½ÃÉÏÕÛáçíóùÿ#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýãéïõû %+17=CIOU[agmsy…‹‘—£©¯µ»ÁÇÍÓÙßåëñ÷ý !'-39?EKQW]ciou{‡“™Ÿ¥«±·½ÃÉÏÕÛáçíóùÿ # ) / 5 ; A G M S Y _ e k q w } ƒ ‰ • › ¡ § ³ ¹ ¿ Å Ë Ñ × Ý ã é ï õ û % + 1 7 = C I O U [ a g m s y #)/5;AGMSY_ekqx†”›¢©°·¾ÅÌÓÚáèïöý '.5<CJQX_fmt{‚‰—ž¥¬³ºÁÈÏÖÝäëòù#*18?FMT[bipw~…Œ“š¡¨¯¶½ÄËÒÙàçîõü &-4;BI#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýã#)/5;AGM#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýãéïõû %+17=CIOU[agms#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýãéïõû %+17=CIOU[bipw~…Œ“š¡¨¯¶½ÄËÒÙàçîõü &-4;BIPW^elszˆ–¤«²¹ÀÇÎÕÜãêñøÿ ")07>ELSZahov}„‹’™ §®µ¼ÃÊÑØßæíôû %,3:AHOV]dkry€‡Ž•œ£ª±¸¿ÆÍÔÛâéð‹.symtab.strtab.shstrtab.text.data.bss.text.dma_set_channel_request.rel.debug_info.debug_abbrev.rel.debug_loclists.rel.debug_aranges.rel.debug_rnglists.rel.debug_macro.rel.debug_line.debug_str.comment.rel.debug_frame.ARM.attributes.groupù42ù@2ùL2ùX2ùd2ùp2ù|2ùˆ2 ù”2! ! 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15LIBOPENCM3_GPIO_COMMON_ALL_H __UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX____ARM_FEATURE_SAT__INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1GPIO9 (1 << 9)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xEXTI0 (1 << 0)GPIOH_OSPEEDR GPIO_OSPEEDR(GPIOH)NVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed charGPIOJ_AFRL GPIO_AFRL(GPIOJ)GPIOJ_OTYPER GPIO_OTYPER(GPIOJ)__GCC_ATOMIC_BOOL_LOCK_FREE 1BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON__GPIO_AF1 0x1__FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLR__FLT64_DECIMAL_DIG__ 17shiftshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)UINT8_MAX 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GPIO_AFRH(GPIOH)CEC_BASE (PERIPH_BASE_APB + 0x7800)EXTI27 (1 << 27)UINT_LEAST8_MAXGPIOG_AFRH GPIO_AFRH(GPIOG)UINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)GPIO_OTYPER(port) MMIO32((port) + 0x04)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__GPIOD_PUPDR GPIO_PUPDR(GPIOD)__USA_IBIT__ 16GPIOB_AFRH GPIO_AFRH(GPIOB)EXTI6 (1 << 6)PTRDIFF_MIN (-PTRDIFF_MAX - 1)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__DBL_IS_IEC_60559__ 2__UINT_FAST64_TYPE__ long long unsigned intTIM2_BASE (PERIPH_BASE_APB + 0x0000)GPIOB_BSRR GPIO_BSRR(GPIOB)GPIOG_AFRL GPIO_AFRL(GPIOG)exti_disable_request__FLT_MIN__ 1.1754943508222875e-38FGPIOG_ODR GPIO_ODR(GPIOG)__HA_FBIT__ 7__FDPIC____UINT32_C(c) c ## UL__FLT32_IS_IEC_60559__ 2GPIOI_OSPEEDR GPIO_OSPEEDR(GPIOI)SYSCFG_EXTICR_GPIOD 3INT_FAST64_MINGPIO13 (1 << 13)__USFRACT_IBIT__ 0SYSCFG_CFGR1_TIM16_DMA_RMP2 (1 << 13)GPIOK_OSPEEDR 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10)SYSCFG_CFGR2_PVD_LOCK (1 << 2)__PTRDIFF_TYPE__ int__ARM_ARCH_ISA_THUMB__ARM_FEATURE_MATMUL_INT8__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0DBGMCU_BASE (PERIPH_BASE_APB + 0x15800)__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)TIM16_BASE (PERIPH_BASE_APB + 0x14400)GPIOC_BSRR GPIO_BSRR(GPIOC)GPIOF_PUPDR GPIO_PUPDR(GPIOF)__FLT32_HAS_QUIET_NAN__ 1GPIOB_ODR GPIO_ODR(GPIOB)__LDBL_HAS_INFINITY__ 1__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308GPIO_PUPD_PULLDOWN 0x2GPIO_MODE(n,mode) ((mode) << (2 * (n)))__ARM_PCS 1GPIO_PUPD_NONE 0x0bool _BoolUINTMAX_MAX __UINTMAX_MAX__EXTI37 (1 << 5)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffGPIOA_IDR GPIO_IDR(GPIOA)BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)GPIO3 (1 << 3)INT16_MAX __INT16_MAX__GPIOD_MODER GPIO_MODER(GPIOD)SYSCFG_CFGR1 MMIO32(SYSCFG_COMP_BASE + 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MMIO32((port) + 0x00)__UINT_LEAST32_MAX__ 0xffffffffULSYSCFG_EXTICR_FIELDSIZE 4__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1GPIOJ_OSPEEDR GPIO_OSPEEDR(GPIOJ)__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fBIT14 (1<<14)GPIO_OSPEED_MASK(n) (0x3 << (2 * (n)))__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__SHRT_WIDTH__ 16BIT20 (1<<20)EXTI5 (1 << 5)extis__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intGPIOF_AFRL GPIO_AFRL(GPIOF)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MINGPIO_AFRH(port) MMIO32((port) + 0x24)__FLT_EVAL_METHOD_TS_18661_3__ 0ST_VREFINT_CAL MMIO16(0x1FFFF7BA)__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAX__UINT_FAST8_TYPE__ unsigned intEXTI10 (1 << 10)__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)GPIO_AF11 0xb__INT32_MAX__ 0x7fffffffLST_TSENSE_CAL2_110C MMIO16(0x1FFFF7C2)__GXX_TYPEINFO_EQUALITY_INLINE 0lineUINTMAX_MAXEXTI_BASE (PERIPH_BASE_APB + 0x10400)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLGPIOI_ODR GPIO_ODR(GPIOI)__ARM_FEATURE_BF16_VECTOR_ARITHMETICSYSCFG_CFGR1_I2C1_FMP (1 << 20)PPBI_BASE (0xE0000000U)SYSCFG_CFGR1_I2C_PB7_FMP (1 << 17)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__GPIOH_LCKR GPIO_LCKR(GPIOH)INT8_MAX __INT8_MAX____INT_LEAST16_TYPE__ short inttrig__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1GPIOF_BRR GPIO_BRR(GPIOF)ADC_BASE (PERIPH_BASE_APB + 0x12400)__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3../common/exti_common_all.cUINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0GPIOK_AFRL GPIO_AFRL(GPIOK)__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64GPIOE_IDR GPIO_IDR(GPIOE)GPIOE_PUPDR GPIO_PUPDR(GPIOE)UINTPTR_MAX__LDBL_DENORM_MIN__ 4.9406564584124654e-324LSYSCFG_CFGR1_MEM_MODE_SHIFT 0__INT64_MAX__ 0x7fffffffffffffffLLGPIO_OTYPE_PP 0x0__ULLFRACT_IBIT__ 0SYSCFG_CFGR1_MEM_MODE_SRAM (3 << SYSCFG_CFGR1_MEM_MODE_SHIFT)MMIO16(addr) (*(volatile uint16_t *)(addr))__GNUC__ 12GPIOF_AFRH GPIO_AFRH(GPIOF)WCHAR_MAX__WCHAR_WIDTH__ 32__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULKSYSCFG_CFGR2_SRAM_PARITY_LOCK (1 << 1)__ARM_ARCH 6EXTI_SWIER MMIO32(EXTI_BASE + 0x10)__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXEXTI30 (1 << 30)EXTI36 (1 << 4)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)GPIO_AF14 0xe__UINT_FAST64_MAX__ 0xffffffffffffffffULL__ARM_FPGPIOA_AFRL GPIO_AFRL(GPIOA)__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1EXTI20 (1 << 20)BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLLIBOPENCM3_GPIO_COMMON_F24_H __ARM_ARCH_PROFILE__INT64_TYPE__ long long intGPIO_OSPEED_50MHZ 0x2__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4maskGPIOC GPIO_PORT_C_BASEGPIO_MODE_INPUT 0x0__UFRACT_MAX__ 0XFFFFP-16URINT64_MAXGPIOC_LCKR GPIO_LCKR(GPIOC)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0GPIOG GPIO_PORT_G_BASEGPIOE_MODER GPIO_MODER(GPIOE)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__SYS_TICK_BASE (SCS_BASE + 0x0010)__USER_LABEL_PREFIX__ __ARM_32BIT_STATE__UFRACT_FBIT__ 16GPIO_AF5 0x5__UDQ_FBIT__ 64exti_reset_requestGPIO6 (1 << 6)LIBOPENCM3_EXTI_H GPIOD_ODR GPIO_ODR(GPIOD)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)SYSCFG_CFGR2_LOCKUP_LOCK (1 << 0)__INT_FAST32_TYPE__ intCRS_BASE (PERIPH_BASE_APB + 0x6C00)unsigned intEXTI31 (1 << 31)__GCC_ASM_FLAG_OUTPUTS____LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1EXTI4 (1 << 4)GPIOA_BRR GPIO_BRR(GPIOA)__USACCUM_IBIT__ 8GPIOG_OSPEEDR GPIO_OSPEEDR(GPIOG)GPIO_OSPEED_25MHZ 0x1__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UK__FLT_EVAL_METHOD__ 0GPIO12 (1 << 12)GPIO4 (1 << 4)__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__thumb2__RCC_BASE (PERIPH_BASE_AHB1 + 0x1000)__ARM_FEATURE_LDREX__UQQ_FBIT__ 8EXTI12 (1 << 12)INT16_CGPIOE_BSRR GPIO_BSRR(GPIOE)__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4bits__STDC__ 1EXTI26 (1 << 26)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__RTC_BASE (PERIPH_BASE_APB + 0x2800)__UINT8_TYPE__ unsigned charEXTI13 (1 << 13)__SIG_ATOMIC_TYPE__ intUINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINGPIOD GPIO_PORT_D_BASEGPIO14 (1 << 14)PERIPH_BASE (0x40000000U)true 1__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)__LDBL_MIN_10_EXP__ (-307)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1EXTI14 (1 << 14)BIT28 (1<<28)__LFRACT_EPSILON__ 0x1P-31LRGPIOI_PUPDR GPIO_PUPDR(GPIOI)__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX__GPIOF_IDR GPIO_IDR(GPIOF)__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32xGPIOC_OSPEEDR GPIO_OSPEEDR(GPIOC)__arm__ 1__FLT32_MIN_10_EXP__ (-37)SYSCFG_CFGR1_MEM_MODE_FLASH (0 << SYSCFG_CFGR1_MEM_MODE_SHIFT)MMIO64(addr) (*(volatile uint64_t *)(addr))GPIOG_IDR GPIO_IDR(GPIOG)__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MIN__DA_FBIT__ 31DESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)GPIOH_MODER GPIO_MODER(GPIOH)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)GPIOA_OTYPER GPIO_OTYPER(GPIOA)__TA_IBIT__ 64GPIOG_MODER GPIO_MODER(GPIOG)EXTICR_SELECTION_REG(x) SYSCFG_EXTICR(x)GPIOE_AFRL GPIO_AFRL(GPIOE)GPIOD_OTYPER GPIO_OTYPER(GPIOD)__ARM_FEATURE_QRDMX__ARM_ARCH_ISA_THUMB 1DESIG_FLASH_SIZE_BASE (0x1FFFF7CCU)__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32GPIOC_MODER GPIO_MODER(GPIOC)SIG_ATOMIC_MAX __SIG_ATOMIC_MAX____USQ_IBIT__ 0BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0SYSCFG_EXTICR_GPIOC 2_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__GPIOD_BSRR GPIO_BSRR(GPIOD)__SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)EXTI35 (1 << 3)__DBL_MIN_EXP__ (-1021)GPIOA GPIO_PORT_A_BASE__LDBL_HAS_DENORM__ 1EXTICR_SELECTION_FIELDSIZE SYSCFG_EXTICR_FIELDSIZEINT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1GPIO1 (1 << 1)EXTI_IMR MMIO32(EXTI_BASE + 0x00)__FLT32_DIG__ 6INT_LEAST16_MAXTIM6_BASE (PERIPH_BASE_APB + 0x1000)GPIOG_LCKR GPIO_LCKR(GPIOG)SYSCFG_CFGR1_MEM_MODE_SYSTEM (1 << SYSCFG_CFGR1_MEM_MODE_SHIFT)BIT15 (1<<15)GPIO_LCKK (1 << 16)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)GPIOI_LCKR GPIO_LCKR(GPIOI)__ACCUM_MIN__ (-0X1P15K-0X1P15K)__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intSYSCFG_EXTICR1 SYSCFG_EXTICR(0)GPIOJ_ODR GPIO_ODR(GPIOJ)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2GPIO_PUPDR(port) MMIO32((port) + 0x0c)BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)__FLT_NORM_MAX__ 3.4028234663852886e+38FUSART1_BASE (PERIPH_BASE_APB + 0x13800)long long unsigned int__FLT_MIN_10_EXP__ (-37)GPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__ULLACCUM_EPSILON__ 0x1P-32ULLK__APCS_32__ 1__DQ_FBIT__ 63GPIOE_AFRH GPIO_AFRH(GPIOE)GPIO_PUPD(n,pupd) ((pupd) << (2 * (n)))INT_LEAST64_MAX__SACCUM_IBIT__ 8__UHQ_IBIT__ 0LIBOPENCM3_MEMORYMAP_COMMON_H EXTI_FTSR MMIO32(EXTI_BASE + 0x0c)BIT29 (1<<29)LIBOPENCM3_GPIO_COMMON_F234_H __INT_FAST16_TYPE__ intSYSCFG_CFGR1_ADC_DMA_RMP (1 << 8)USART7_BASE (PERIPH_BASE_APB + 0x11800)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15EXTI3 (1 << 3)GPIOI_BSRR GPIO_BSRR(GPIOI)__UTQ_FBIT__ 128SYSCFG_CFGR1_USART2_DMA_RMP (1 << 25)__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffDMA2_BASE (PERIPH_BASE_AHB1 + 0x0400)PTRDIFF_MAX __PTRDIFF_MAX__EXTI16 (1 << 16)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKGPIOC_BRR GPIO_BRR(GPIOC)GPIO_LCKR(port) MMIO32((port) + 0x1c)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRGPIO_AF4 0x4__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intGPIOF_MODER GPIO_MODER(GPIOF)SYSCFG_CFGR1_USART1_TX_DMA_RMP (1 << 9)GPIOH_PUPDR GPIO_PUPDR(GPIOH)GPIOK_LCKR GPIO_LCKR(GPIOK)WCHAR_MINDMA1_BASE DMA_BASEGPIOB_IDR GPIO_IDR(GPIOB)BEGIN_DECLS GPIOJ_AFRH GPIO_AFRH(GPIOJ)EXTI32 (1 << 0)USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)CORESIGHT_LSR_SLK (1<<1)SYSCFG_CFGR1_I2C2_FMP (1 << 21)GPIOC_AFRH GPIO_AFRH(GPIOC)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)GPIOB_LCKR GPIO_LCKR(GPIOB)__FLT32_MIN__ 1.1754943508222875e-38F32GPIOA_MODER GPIO_MODER(GPIOA)SYSCFG_CFGR1_TIM17_DMA_RMP2 (1 << 14)INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1SYSCFG_CFGR1_I2C_PA9_FMP (1 << 22)GPIOE GPIO_PORT_E_BASEUSART6_BASE (PERIPH_BASE_APB + 0x11400)GPIOE_OTYPER GPIO_OTYPER(GPIOE)SYSCFG_CFGR1_TIM3_DMA_RMP (1 << 30)__QQ_IBIT__ 0DESIG_UNIQUE_ID_BASE (0x1FFFF7ACU)__LLACCUM_FBIT__ 31__UINTMAX_TYPE__ long long unsigned intLIBOPENCM3_SYSCFG_H __GNUC_MINOR__ 2GPIO7 (1 << 7)__UINT_LEAST32_TYPE__ long unsigned intGPIO_AFR(n,af) ((af) << ((n) * 4))EXTI7 (1 << 7)__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 1GPIO_OSPEED_2MHZ 0x0STM32F0 1GPIOG_PUPDR GPIO_PUPDR(GPIOG)INT_LEAST8_MININTMAX_MAXDEBUG_BASE (SCS_BASE + 0x0DF0)GPIOB GPIO_PORT_B_BASE__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CSYSCFG_CFGR1_TIM16_DMA_RMP (1 << 11)INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intGPIOE_ODR GPIO_ODR(GPIOE)UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULREXTI34 (1 << 2)__ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned intI2C2_BASE (PERIPH_BASE_APB + 0x5800)gpioportGPIOD_IDR GPIO_IDR(GPIOD)GPIOB_BRR GPIO_BRR(GPIOB)__LONG_MAX__ 0x7fffffffLTIM15_BASE (PERIPH_BASE_APB + 0x14000)SYSCFG_EXTICR_GPIOF 5__ARM_FEATURE_CDE__ACCUM_IBIT__ 16EXTI_TRIGGER_FALLINGGPIOJ_MODER GPIO_MODER(GPIOJ)FLASH_BASE (0x08000000U)CORESIGHT_LAR_OFFSET 0xfb0LIBOPENCM3_GPIO_H GPIO_AF12 0xcFLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x2000)short intSYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)__UINT16_C(c) cBIT31 (1<<31)__UDA_IBIT__ 32UINT_LEAST32_MAXGPIOI_MODER GPIO_MODER(GPIOI)SYSCFG_EXTICR(i) MMIO32(SYSCFG_COMP_BASE + 0x08 + (i)*4)BIT2 (1<<2)EXTI9 (1 << 9)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCGPIOA_ODR GPIO_ODR(GPIOA)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53GPIO_BRR(port) MMIO32((port) + 0x28)CORESIGHT_LSR_SLI (1<<0)BIT5 (1<<5)BIT1 (1<<1)USART4_BASE (PERIPH_BASE_APB + 0x4C00)INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1__DBL_DECIMAL_DIG__ 17BIT8 (1<<8)__ULACCUM_FBIT__ 32INT16_C(c) __INT16_C(c)GPIO_OSPEED_MED 0x1GPIO_MODE_OUTPUT 0x1__GCC_ATOMIC_CHAR_LOCK_FREE 1__INT16_MAX__ 0x7fff__INT_WIDTH__ 32GPIOJ GPIO_PORT_J_BASEGPIOD_AFRL GPIO_AFRL(GPIOD)__QQ_FBIT__ 7GPIOC_OTYPER GPIO_OTYPER(GPIOC)__ULLFRACT_EPSILON__ 0x1P-64ULLRPOWER_CONTROL_BASE (PERIPH_BASE_APB + 0x7000)GPIO_AF3 0x3__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64GPIO_IDR(port) MMIO32((port) + 0x10)GPIO_AFRL(port) MMIO32((port) + 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GPIO_OSPEEDR(GPIOA)__UHA_IBIT__ 8__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15GPIO_AF15 0xfUINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXLIBOPENCM3_CM3_MEMORYMAP_H BIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MINSYSCFG_EXTICR4 SYSCFG_EXTICR(3)__FLT64_DIG__ 15__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_C__LDBL_MAX_10_EXP__ 308GPIOD_BRR GPIO_BRR(GPIOD)INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1GPIO15 (1 << 15)EXTI_RTSR MMIO32(EXTI_BASE + 0x08)GPIOH_OTYPER GPIO_OTYPER(GPIOH)__HQ_FBIT__ 15__bool_true_false_are_defined 1BIT26 (1<<26)__SIZE_MAX__ 0xffffffffUEXTI15 (1 << 15)SYSCFG_CFGR2_SRAM_PEF (1 << 8)EXTI2 (1 << 2)EXTI33 (1 << 1)__ARM_ARCHINTMAX_C(c) __INTMAX_C(c)__STRICT_ANSI__ 1EXTI29 (1 << 29)GPIO_OSPEED_100MHZ 0x3INT_LEAST64_MINPTRDIFF_MAXST_TSENSE_CAL1_30C MMIO16(0x1FFFF7B8)__LLFRACT_EPSILON__ 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AA5BÑOCþ%DÇFM#G¶*IÓGJCK MË,NØO|QqAR-+Sx T¼VèYU[9F\yD^Ï6`ÀLbWd’gÉAh$Qi·j! kxl"Goü<p)Hq®Urê;s^vˆ)w¯Wxƒ*%G-g?5œK6Û>7Ã08Ò"9–:b;åT<—H=4>g?¢@ÞAy6BÒ7Cÿ8D¬VEbZ0¤71g2‚+3è84³G5Z637`>}&?¹@]AE/Bù"C@5DÈEE—<F<IüXJh<KáSL±OM LNûGOÒP|SQ½VTÀPU\TVCYWÔ:X£XY¥Z([ÿ5\“_Î@`ÒZaãbÖcõdæ-e» fhIgõEjPPk`"lLFmeYn¼KoÌ-pŠ:qW;r QuÙ%vMwó xay§4zœJ{"|m}T€<;S‚ƒŸ „ý=…7†1#‡ˆS‹EŒ{OGŽÈ2úî ‘€R’/?“$,–uP—Ò0˜W™7š‡O›µ<œã(-ž¬Y¡A)¢S£#¤K¥SX¦hB§¾.¨ ©¿ ¬!®R²Ž2³5O´üµœR¾`.À‹%ÅòÆÉ'ÊIIËÂÌA2Í|WÒJÓ‘×à!Ø2Ù»Dëg?óÎHôÅXøwùóúáûÿOüwEý14þHÿÑ€“—‚´ƒY?„²L…AZ†‹0‡×T0´1pO27&8>M9ML:[D= >q?BÎCi'DG.:H–IzLœ M’!Nî7Q+R@@S¹VùCWX[Å?\Å]F`ºaUbJ-eqfsFg?%,AN-Ò5.ÖK/üD0dV1±,:C;!O<"&¾’û ../common/usr/lib/gcc/arm-none-eabi/12.2.1/include../../../include/libopencm3/stm32../../../include/libopencm3/cm3../../../include/libopencm3/stm32/f0../../../include/libopencm3/stm32/commongpio_common_all.cstdint.hgpio.hcommon.hstdbool.hmemorymap.hmemorymap.hmemorymap.hgpio.hgpio_common_f24.hgpio_common_f234.hgpio_common_all.h)!8 !Ç b"!×!(.8 / !æ! !ó!„" "t.!!!!%GPIOJ_BSRR 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1GPIO_PUPD_PULLUP 0x1LIBOPENCM3_GPIO_COMMON_ALL_H __FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLKGPIO4 (1 << 4)PTRDIFF_MINGNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsUINTPTR_MAX __UINTPTR_MAX____ARM_ARCH_PROFILE 77GPIO_PORT_E_BASE (PERIPH_BASE_AHB2 + 0x1000)GPIOE_OSPEEDR GPIO_OSPEEDR(GPIOE)__FLT64_MAX_10_EXP__ 308__WCHAR_WIDTH__ 32MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINGPIOF_OSPEEDR GPIO_OSPEEDR(GPIOF)GPIO_PUPD(n,pupd) ((pupd) << (2 * (n)))__UINT_FAST32_TYPE__ unsigned intunsigned charGPIO10 (1 << 10)__SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38__FRACT_MAX__ 0X7FFFP-15RPERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5__ARM_ARCH_EXT_IDIV__PERIPH_BASE_APB (PERIPH_BASE + 0x00000000)GPIO_AF7 0x7GPIO11 (1 << 11)__UINT16_MAX__ 0xffff__TQ_FBIT__ 127TIM14_BASE (PERIPH_BASE_APB + 0x2000)__USQ_FBIT__ 32uint16_t__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32SPI1_BASE (PERIPH_BASE_APB + 0x13000)INT_FAST32_MIN (-INT_FAST32_MAX - 1)CEC_BASE (PERIPH_BASE_APB + 0x7800)UINT_LEAST8_MAXINT_LEAST8_MAXGPIOG_AFRH GPIO_AFRH(GPIOG)UINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__GPIOD_PUPDR GPIO_PUPDR(GPIOD)__USA_IBIT__ 16GPIOB_AFRH GPIO_AFRH(GPIOB)PTRDIFF_MIN (-PTRDIFF_MAX - 1)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__DBL_IS_IEC_60559__ 2__UINT_FAST64_TYPE__ long long unsigned intTIM2_BASE (PERIPH_BASE_APB + 0x0000)GPIOB_BSRR GPIO_BSRR(GPIOB)GPIOG_AFRL GPIO_AFRL(GPIOG)__FLT_MIN__ 1.1754943508222875e-38FGPIOG_ODR GPIO_ODR(GPIOG)__HA_FBIT__ 7__FDPIC____UINT32_C(c) c ## UL__FLT32_IS_IEC_60559__ 2GPIOI_OSPEEDR GPIO_OSPEEDR(GPIOI)INT_FAST64_MIN__USFRACT_IBIT__ 0GPIOK_OSPEEDR GPIO_OSPEEDR(GPIOK)__LDBL_EPSILON__ 2.2204460492503131e-16LGPIOB_MODER GPIO_MODER(GPIOB)__USFRACT_MIN__ 0.0UHRTSC_BASE (PERIPH_BASE_AHB1 + 0x4000)__ARM_NEON__UINT8_MAX__ 0xff__LDBL_MAX_EXP__ 1024LIBOPENCM3_MEMORYMAP_H GPIOK_BSRR GPIO_BSRR(GPIOK)__DBL_HAS_DENORM__ 1GPIO8 (1 << 8)GPIO_OSPEED_LOW 0x0GPIOB_AFRL GPIO_AFRL(GPIOB)__DA_FBIT__ 31__GXX_ABI_VERSION 1017__INT_LEAST16_MAX__ 0x7fffGPIOI GPIO_PORT_I_BASE__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LINT_LEAST32_MAX __INT_LEAST32_MAX____ULLACCUM_EPSILON__ 0x1P-32ULLKGPIOC_ODR GPIO_ODR(GPIOC)GPIOA_LCKR GPIO_LCKR(GPIOA)INT_LEAST8_MAX __INT_LEAST8_MAX__GPIOK_ODR GPIO_ODR(GPIOK)USART3_BASE (PERIPH_BASE_APB + 0x4800)GPIOD_LCKR GPIO_LCKR(GPIOD)__UACCUM_MIN__ 0.0UK__FLT_EPSILON__ 1.1920928955078125e-7FGPIO_MODE_MASK(n) (0x3 << (2 * (n)))GPIO_AF0 0x0__ARM_ARCH_ISA_THUMB__ARM_FEATURE_MATMUL_INT8__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0__HQ_IBIT__ 0DBGMCU_BASE (PERIPH_BASE_APB + 0x15800)__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)TIM16_BASE (PERIPH_BASE_APB + 0x14400)GPIOC_BSRR GPIO_BSRR(GPIOC)GPIOF_PUPDR GPIO_PUPDR(GPIOF)__FLT32_HAS_QUIET_NAN__ 1GPIOB_ODR GPIO_ODR(GPIOB)__LDBL_HAS_INFINITY__ 1__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308GPIOJ_IDR GPIO_IDR(GPIOJ)GPIO_MODE(n,mode) ((mode) << (2 * (n)))__ARM_PCS 1GPIO_PUPD_NONE 0x0bool _BoolUINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffGPIOA_IDR GPIO_IDR(GPIOA)BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)GPIO3 (1 << 3)INT16_MAX __INT16_MAX__GPIOD_MODER GPIO_MODER(GPIOD)__FLT32X_IS_IEC_60559__ 2GPIOF_BSRR GPIO_BSRR(GPIOF)SYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXPERIPH_BASE_AHB1 (PERIPH_BASE + 0x00020000)__INT_LEAST16_WIDTH__ 16__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLINT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHR__OPTIMIZE_SIZE__ 1__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)UINT64_C/build/libopencm3/lib/stm32/f0__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffULGPIOK_AFRH GPIO_AFRH(GPIOK)INT64_C(c) __INT64_C(c)__INT_LEAST8_MAX__ 0x7fGPIO_OTYPE_OD 0x1__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXGPIO_ODR(port) MMIO32((port) + 0x14)DAC_BASE (PERIPH_BASE_APB + 0x7400)GPIO_OSPEED_HIGH 0x3GPIOK GPIO_PORT_K_BASE__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024GPIO_MODER(port) MMIO32((port) + 0x00)__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1GPIOJ_OSPEEDR GPIO_OSPEEDR(GPIOJ)__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fBIT14 (1<<14)GPIO_OSPEED_MASK(n) (0x3 << (2 * (n)))__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intGPIOF_AFRL GPIO_AFRL(GPIOF)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MINGPIO_AFRH(port) MMIO32((port) + 0x24)__FLT_EVAL_METHOD_TS_18661_3__ 0ST_VREFINT_CAL MMIO16(0x1FFFF7BA)__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAX__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)../common/gpio_common_all.c__INT32_MAX__ 0x7fffffffL__INT64_C(c) c ## LLST_TSENSE_CAL2_110C MMIO16(0x1FFFF7C2)UINTMAX_MAXEXTI_BASE (PERIPH_BASE_APB + 0x10400)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLGPIOI_ODR GPIO_ODR(GPIOI)TIM15_BASE (PERIPH_BASE_APB + 0x14000)PPBI_BASE (0xE0000000U)__FLT32_MANT_DIG__ 24GPIOC GPIO_PORT_C_BASE__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__GPIOH_LCKR GPIO_LCKR(GPIOH)INT8_MAX __INT8_MAX____INT_LEAST16_TYPE__ short intUINT32_MAX __UINT32_MAX____GCC_ATOMIC_CHAR16_T_LOCK_FREE 1GPIOF_BRR GPIO_BRR(GPIOF)ADC_BASE (PERIPH_BASE_APB + 0x12400)__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0GPIOK_AFRL GPIO_AFRL(GPIOK)gpioport__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64GPIOE_IDR GPIO_IDR(GPIOE)GPIOE_PUPDR GPIO_PUPDR(GPIOE)UINTPTR_MAX__LDBL_DENORM_MIN__ 4.9406564584124654e-324L__INT64_MAX__ 0x7fffffffffffffffLLGPIO_OTYPE_PP 0x0__ULLFRACT_IBIT__ 0MMIO16(addr) (*(volatile uint16_t *)(addr))__GNUC__ 12GPIOF_AFRH GPIO_AFRH(GPIOF)WCHAR_MAX__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16GPIOC_MODER GPIO_MODER(GPIOC)__WCHAR_MIN__ 0U__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULK__ARM_ARCH 6__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAX__LDBL_HAS_QUIET_NAN__ 1__LONG_LONG_WIDTH__ 64BIT6 (1<<6)GPIO_AF14 0xe__UINT_FAST64_MAX__ 0xffffffffffffffffULLGPIO2 (1 << 2)GPIOA_AFRL GPIO_AFRL(GPIOA)__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLLIBOPENCM3_GPIO_COMMON_F24_H __ARM_ARCH_PROFILE__INT64_TYPE__ long long intGPIO_OSPEED_50MHZ 0x2__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4GPIO_MODE_INPUT 0x0__UFRACT_MAX__ 0XFFFFP-16URINT64_MAXGPIOC_LCKR GPIO_LCKR(GPIOC)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0GPIOG GPIO_PORT_G_BASE__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__SYS_TICK_BASE (SCS_BASE + 0x0010)__USER_LABEL_PREFIX__ __ARM_32BIT_STATE__UFRACT_FBIT__ 16GPIO_AF5 0x5__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)SPI2_BASE (PERIPH_BASE_APB + 0x3800)GPIOD_ODR GPIO_ODR(GPIOD)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)__INT_FAST32_TYPE__ intCRS_BASE (PERIPH_BASE_APB + 0x6C00)unsigned intGPIOE_MODER GPIO_MODER(GPIOE)__GCC_ASM_FLAG_OUTPUTS____LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1GPIOA_BRR GPIO_BRR(GPIOA)__USACCUM_IBIT__ 8GPIOG_OSPEEDR GPIO_OSPEEDR(GPIOG)__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UK__FLT_EVAL_METHOD__ 0GPIO12 (1 << 12)__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__thumb2__RCC_BASE (PERIPH_BASE_AHB1 + 0x1000)__ARM_FEATURE_LDREX__UQQ_FBIT__ 8INT16_CGPIOE_BSRR GPIO_BSRR(GPIOE)__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX__GPIOA GPIO_PORT_A_BASE__SIZEOF_PTRDIFF_T__ 4GPIO13 (1 << 13)__STDC__ 1GPIOK_IDR GPIO_IDR(GPIOK)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__RTC_BASE (PERIPH_BASE_APB + 0x2800)__UINT8_TYPE__ unsigned chargpio_set__SIG_ATOMIC_TYPE__ intUINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINGPIOD GPIO_PORT_D_BASEGPIO14 (1 << 14)PERIPH_BASE (0x40000000U)true 1__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)__LDBL_MIN_10_EXP__ (-307)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xINT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1BIT28 (1<<28)__LFRACT_EPSILON__ 0x1P-31LRGPIOI_PUPDR GPIO_PUPDR(GPIOI)__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX__GPIOF_IDR GPIO_IDR(GPIOF)__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32xGPIOC_OSPEEDR GPIO_OSPEEDR(GPIOC)__arm__ 1__FLT32_MIN_10_EXP__ (-37)MMIO64(addr) (*(volatile uint64_t *)(addr))gpio_port_writeGPIOG_IDR GPIO_IDR(GPIOG)__ARM_FEATURE_BF16_VECTOR_ARITHMETIC__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MINDESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)GPIOH_MODER GPIO_MODER(GPIOH)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)GPIOA_OTYPER GPIO_OTYPER(GPIOA)__TA_IBIT__ 64GPIOG_MODER GPIO_MODER(GPIOG)GPIOE_AFRL GPIO_AFRL(GPIOE)__ARM_FEATURE_QRDMX__ARM_ARCH_ISA_THUMB 1DESIG_FLASH_SIZE_BASE (0x1FFFF7CCU)__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__GPIOD_BSRR GPIO_BSRR(GPIOD)__SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1GPIO1 (1 << 1)__FLT32_DIG__ 6INT_LEAST16_MAXTIM6_BASE (PERIPH_BASE_APB + 0x1000)GPIOG_LCKR GPIO_LCKR(GPIOG)BIT15 (1<<15)GPIO_AF11 0xbGPIO_LCKK (1 << 16)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7INT32_MAXGPIOI_LCKR GPIO_LCKR(GPIOI)__ACCUM_MIN__ (-0X1P15K-0X1P15K)END_DECLS __ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intGPIOJ_ODR GPIO_ODR(GPIOJ)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2GPIO_PUPDR(port) MMIO32((port) + 0x0c)BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)__FLT_NORM_MAX__ 3.4028234663852886e+38FUSART1_BASE (PERIPH_BASE_APB + 0x13800)long long unsigned int__FLT_MIN_10_EXP__ (-37)GPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int__APCS_32__ 1__DQ_FBIT__ 63GPIOE_AFRH GPIO_AFRH(GPIOE)INT_LEAST64_MAX__SACCUM_IBIT__ 8reg32__UHQ_IBIT__ 0INT_LEAST8_MINBIT29 (1<<29)LIBOPENCM3_GPIO_COMMON_F234_H __INT_FAST16_TYPE__ intUSART7_BASE (PERIPH_BASE_APB + 0x11800)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15GPIOI_BSRR GPIO_BSRR(GPIOI)__UTQ_FBIT__ 128__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffGPIOK_MODER GPIO_MODER(GPIOK)DMA2_BASE (PERIPH_BASE_AHB1 + 0x0400)PTRDIFF_MAX __PTRDIFF_MAX__GPIO_PUPD_PULLDOWN 0x2__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKGPIOC_BRR GPIO_BRR(GPIOC)GPIO_LCKR(port) MMIO32((port) + 0x1c)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRGPIO_AF4 0x4__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intGPIOF_MODER GPIO_MODER(GPIOF)gpio_port_readGPIOH_PUPDR GPIO_PUPDR(GPIOH)GPIOK_LCKR GPIO_LCKR(GPIOK)WCHAR_MINDMA1_BASE DMA_BASEGPIOB_IDR GPIO_IDR(GPIOB)BEGIN_DECLS GPIOJ_AFRH GPIO_AFRH(GPIOJ)USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)GPIOB_LCKR GPIO_LCKR(GPIOB)__ARM_EABI__ 1INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1GPIOE GPIO_PORT_E_BASE__ARM_FPUSART6_BASE (PERIPH_BASE_APB + 0x11400)GPIOE_OTYPER GPIO_OTYPER(GPIOE)__QQ_IBIT__ 0DESIG_UNIQUE_ID_BASE (0x1FFFF7ACU)__LLACCUM_FBIT__ 31__UINTMAX_TYPE__ long long unsigned int__USQ_IBIT__ 0GPIO7 (1 << 7)__UINT_LEAST32_TYPE__ long unsigned intGPIO_AFR(n,af) ((af) << ((n) * 4))__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 1GPIO_OSPEED_2MHZ 0x0STM32F0 1GPIOG_PUPDR GPIO_PUPDR(GPIOG)INTMAX_MAXDEBUG_BASE (SCS_BASE + 0x0DF0)__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CINT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intGPIOE_ODR GPIO_ODR(GPIOE)UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULR__ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned intI2C2_BASE (PERIPH_BASE_APB + 0x5800)GPIO0 (1 << 0)gpio_toggleportGPIOD_IDR GPIO_IDR(GPIOD)GPIOB_BRR GPIO_BRR(GPIOB)__LONG_MAX__ 0x7fffffffLGPIOD_OTYPER GPIO_OTYPER(GPIOD)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16GPIOJ_MODER GPIO_MODER(GPIOJ)FLASH_BASE (0x08000000U)CORESIGHT_LAR_OFFSET 0xfb0LIBOPENCM3_GPIO_H GPIO_AF12 0xcFLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x2000)short int__UINT16_C(c) cBIT31 (1<<31)__UDA_IBIT__ 32UINT_LEAST32_MAXGPIOI_MODER GPIO_MODER(GPIOI)BIT2 (1<<2)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCGPIOA_ODR GPIO_ODR(GPIOA)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53GPIO_BRR(port) MMIO32((port) + 0x28)BIT5 (1<<5)__GNUC_PATCHLEVEL__ 1BIT1 (1<<1)USART4_BASE (PERIPH_BASE_APB + 0x4C00)INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1__DBL_DECIMAL_DIG__ 17BIT8 (1<<8)INT16_C(c) __INT16_C(c)GPIO_OSPEED_MED 0x1GPIO_MODE_OUTPUT 0x1__INT16_MAX__ 0x7fff__INT_WIDTH__ 32GPIOJ GPIO_PORT_J_BASEGPIOD_AFRL GPIO_AFRL(GPIOD)__QQ_FBIT__ 7GPIOC_OTYPER GPIO_OTYPER(GPIOC)POWER_CONTROL_BASE (PERIPH_BASE_APB + 0x7000)GPIO_AF3 0x3__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64GPIO_IDR(port) MMIO32((port) + 0x10)GPIO_AFRL(port) MMIO32((port) + 0x20)__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32GPIO_OSPEEDR(port) MMIO32((port) + 0x08)__ULLFRACT_EPSILON__ 0x1P-64ULLRGPIOH_IDR GPIO_IDR(GPIOH)GPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)__SIZEOF_WINT_T__ 4__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1__FLT32X_HAS_DENORM__ 1__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1GPIOF_LCKR GPIO_LCKR(GPIOF)GPIO_MODE_ANALOG 0x3__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODGPIOA_AFRH GPIO_AFRH(GPIOA)GPIOH_BSRR GPIO_BSRR(GPIOH)GPIOA_BSRR GPIO_BSRR(GPIOA)__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H GPIOG_OTYPER GPIO_OTYPER(GPIOG)__GCC_CONSTRUCTIVE_SIZE 64__LLFRACT_IBIT__ 0uint32_tBIT12 (1<<12)GPIOB_OTYPER GPIO_OTYPER(GPIOB)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HK__UINT_FAST16_TYPE__ unsigned intGPIOA_OSPEEDR GPIO_OSPEEDR(GPIOA)__UHA_IBIT__ 8__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15GPIO_AF15 0xfGPIO6 (1 << 6)__SIZE_WIDTH__ 32SIG_ATOMIC_MAXLIBOPENCM3_CM3_MEMORYMAP_H BIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_C__LDBL_MAX_10_EXP__ 308GPIOD_BRR GPIO_BRR(GPIOD)INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1GPIO15 (1 << 15)GPIOH_OTYPER GPIO_OTYPER(GPIOH)__HQ_FBIT__ 15__bool_true_false_are_defined 1BIT26 (1<<26)__SIZE_MAX__ 0xffffffffU__ARM_FEATURE_SAT__ARM_ARCHINTMAX_C(c) __INTMAX_C(c)__STRICT_ANSI__ 1GPIO_OSPEED_100MHZ 0x3INT_LEAST64_MINPTRDIFF_MAXST_TSENSE_CAL1_30C MMIO16(0x1FFFF7B8)__LLFRACT_EPSILON__ 0x1P-63LLR__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53__ARM_ASM_SYNTAX_UNIFIED__WINT_MAX__INT16_C(c) cGPIOD_AFRH GPIO_AFRH(GPIOD)INT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32GPIOD_OSPEEDR GPIO_OSPEEDR(GPIOD)GPIO_AFR_MASK(n) (0xf << ((n) * 4))__ATOMIC_ACQ_REL 4GPIO_OTYPER(port) MMIO32((port) + 0x04)__DBL_MIN_10_EXP__ (-307)dataGPIOB_OSPEEDR GPIO_OSPEEDR(GPIOB)GPIOC_IDR GPIO_IDR(GPIOC)__FLT32_NORM_MAX__ 3.4028234663852886e+38F32GPIOH_AFRL GPIO_AFRL(GPIOH)I2C1_BASE (PERIPH_BASE_APB + 0x5400)UINT64_C(c) __UINT64_C(c)__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53GPIO_AF13 0xd__ULFRACT_IBIT__ 0GPIO_ALL 0xffffINT_FAST16_MAXGPIOF GPIO_PORT_F_BASE__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long intGPIOA_PUPDR GPIO_PUPDR(GPIOA)IWDG_BASE (PERIPH_BASE_APB + 0x3000)__ARM_FEATURE_CDE_COPROCUINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| A+aeabi!6S-MM ñÿ 79!#%')+-/135;=nŸÑ6j¤ ß := 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"†!!; "Œ !/‘! =– !7 "œ !/¡! =¦ !/« !/° !/µ !/º !/¿ !/Ë!/Ö!/à! =ê !/ô! =þ !/Ž Z 0K=L>>"/"</ ö} † .U /=K/2> # MTB‚~ ô Œ~ ô ./<n<.È "J" ! /KKKp. ! /KKK =i2c_busySCB_BASE (SCS_BASE + 0x0D00)__UHA_FBIT__ 8I2C_CR2_STOP (1 << 14)RCC_APB1ENR_CECEN (1 << 30)RCC_AHBRSTR MMIO32(RCC_BASE + 0x28)__INTMAX_C(c) c ## LL__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64I2C_TIMINGR_SCLL_MASK (0xFF << I2C_TIMINGR_SCLL_SHIFT)CORESIGHT_LSR_SLK (1<<1)RCC_CIR_LSIRDYF (1 << 0)__CHAR_UNSIGNED__ 1size_tRCC_CSR_LSION (1 << 0)RCC_BDCR_LSEDRV_MEDHI (2 << RCC_BDCR_LSEDRV_SHIFT)I2C_CR1_ALERTEN (1 << 22)__FLT64_HAS_INFINITY__ 1rcc_periph_reset_pulsei2c_set_write_transfer_dir__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffffRCC_APB1ENR_USART3EN (1 << 18)__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)TIM1_BASE (PERIPH_BASE_APB + 0x12C00)__INTMAX_MAX__ 0x7fffffffffffffffLLRCC_APB1ENR_TIM6EN (1 << 4)__TQ_IBIT__ 0LIBOPENCM3_I2C_COMMON_V2_H __FLT64_DECIMAL_DIG__ 17RCC_CSR_RMVF (1 << 24)__LDBL_MIN__ 2.2250738585072014e-308LINT_FAST64_MAX__ATOMIC_CONSUME 1__LFRACT_MIN__ (-0.5LR-0.5LR)__WCHAR_MAX__ 0xffffffffU___int_ptrdiff_t_h RCC_CFGR_SW_HSI (0 << RCC_CFGR_SW_SHIFT)_WCHAR_T_H RCC_CR2_HSI48CAL_SHIFT 24RCC_CFGR_PLLMUL_MUL11 (0x09 << RCC_CFGR_PLLMUL_SHIFT)INT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8__DBL_MAX_10_EXP__ 308__FRACT_MIN__ (-0.5R-0.5R)RCC_CR_PLLRDY (1 << 25)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLKi2c_set_7bit_address__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64h_time__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0rcc_periph_rst__SIZE_TYPE__ unsigned intRCC_APB1RSTR_USART2RST (1 << 17)RCC_CIR_PLLRDYIE (1 << 12)__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__ARM_ARCH_PROFILE 77__USACCUM_MIN__ 0.0UHKGPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)__FLT32_DECIMAL_DIG__ 9__GCC_ATOMIC_LLONG_LOCK_FREE 1__DECIMAL_DIG__ 17i2c_disable_txdmaUINTPTR_MAX __UINTPTR_MAX____LDBL_MANT_DIG__ 53RCC_CFGR_HPRE_DIV16 (0xb << RCC_CFGR_HPRE_SHIFT)INT64_MIN (-INT64_MAX - 1)WWDG_BASE (PERIPH_BASE_APB + 0x2c00)__UINT8_C(c) c__INT16_TYPE__ short int__FLT64_MAX__ 1.7976931348623157e+308F64RCC_CFGR3_USART2SW_SYSCLK (1 << RCC_CFGR3_USART2SW_SHIFT)UINT_FAST32_MAXRCC_CSR_RESET_FLAGS (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF | RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF | RCC_CSR_PINRSTF | RCC_CSR_OBLRSTF)LIBOPENCM3_I2C_H I2C_TIMINGR_SCLDEL_SHIFT 20I2C_CR1_PE (1 << 0)INT_FAST64_MAX __INT_FAST64_MAX__I2C_ICR_OVRCF (1 << 10)I2C_CR2_PECBYTE (1 << 26)RCC_BDCR_LSEDRV_SHIFT 3I2C_CR2_HEAD10R (1 << 12)__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64RCC_CFGR_PLLMUL_MUL13 (0x0B << RCC_CFGR_PLLMUL_SHIFT)RCC_CSR_SFTRSTF (1 << 28)__GXX_ABI_VERSION 1017USART5_BASE (PERIPH_BASE_APB + 0x5000)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intGPIO_PORT_C_BASE (PERIPH_BASE_AHB2 + 0x0800)__SIZE_T__ INT32_MIN (-INT32_MAX - 1)RCC_AHBENR_SRAMEN (1 << 2)__FLT32_MAX_10_EXP__ 38I2C_ISR_ADDR (1 << 3)RCC_BDCR_RTCSEL_SHIFT 8RCC_CIR MMIO32(RCC_BASE + 0x08)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZRCC_APB1RSTR_TIM3RST (1 << 1)__UINTPTR_MAX__ 0xffffffffURCC_CFGR2_PREDIV_DIV9 0x8__need_wchar_t__FLT32_MIN_EXP__ (-125)RCC_CIR_HSIRDYC (1 << 18)RCC_CFGR2_PREDIV_DIV7 0x6I2C_OAR2_OA2MSK_OA2_7_OA2_3 (0x2 << 8)UINT32_MAX __UINT32_MAX__TIM3_BASE (PERIPH_BASE_APB + 0x0400)I2C_PECR(i2c_base) MMIO32((i2c_base) + 0x20)__WCHAR_T __WCHAR_WIDTH__ 32__ULFRACT_FBIT__ 32RCC_APB2ENR_USART1EN (1 << 14)__FLT64_MIN_10_EXP__ (-307)RCC_APB1ENR_TIM14EN (1 << 8)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)slave__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__RCC_CFGR_HPRE_DIV4 (0x9 << RCC_CFGR_HPRE_SHIFT)I2C_TIMINGR(i2c_base) MMIO32((i2c_base) + 0x10)__SFRACT_EPSILON__ 0x1P-7HR_T_SIZE __INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAX__SQ_FBIT__ 31RST_SYSCFGRCC_CFGR_PLLMUL_MUL7 (0x05 << RCC_CFGR_PLLMUL_SHIFT)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)__DEFINED_ptrdiff_t I2C_CR1_DNF_MASK 0xFINTPTR_MAX__UHQ_FBIT__ 16__FLT64_MIN_EXP__ (-1021)__PTRDIFF_WIDTH__ 32RCC_BDCR_RTCSEL_HSE (3 << RCC_BDCR_RTCSEL_SHIFT)RCC_CSR_V18PWRRSTF (1 << 23)RCC_CFGR2_PREDIV_NODIV 0x0__UINT_FAST8_MAX__ 0xffffffffUI2C_OAR1_OA1EN_ENABLE (0x1 << 15)UINT16_C(c) __UINT16_C(c)RCC_APB2ENR_ADCEN (1 << 9)__LACCUM_IBIT__ 32_SIZE_T_DEFINED I2C_CR2_NBYTES_SHIFT 16__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"LIBOPENCM3_RCC_COMMON_ALL_H __VFP_FP__ 1RCC_CR2_HSI48ON (1 << 16)__LLFRACT_MIN__ (-0.5LLR-0.5LLR)INT_FAST8_MAXRCC_CIR_HSERDYC (1 << 19)__UINT_FAST16_MAX__ 0xffffffffUI2C_CR2_SADD_7BIT_MASK (0x7F << I2C_CR2_SADD_7BIT_SHIFT)__INTPTR_MAX__ 0x7fffffffINT64_C(c) __INT64_C(c)i2c_set_data_hold_timeRCC_CFGR3_USART2SW_SHIFT 16I2C_CR1_ADDRIE (1 << 3)__GCC_IEC_559_COMPLEX 0I2C_CR1_NACKIE (1 << 4)__UFRACT_MIN__ 0.0URi2c_send_startI2C_ISR_TXIS (1 << 1)WCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX___SYS_SIZE_T_H GPIO_PORT_D_BASE (PERIPH_BASE_AHB2 + 0x0C00)__UINT_LEAST8_TYPE__ unsigned charRCC_AHBENR_GPIOFEN (1 << 22)__ACCUM_FBIT__ 15RCC_APB1ENR_CRSEN (1 << 27)__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1I2C_TIEMOUTR_TIDLE_SCL_SDA_HIGH (0x1 << 12)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xNVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32__size_t__ __FLT64_MAX_10_EXP__ 308__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed charI2C2_TXDR I2C_TXDR(I2C2)__GCC_ATOMIC_BOOL_LOCK_FREE 1BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON__RCC_CFGR_PPRE_MASK 0x7__FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX__RCC_APB1ENR MMIO32(RCC_BASE + 0x1c)__THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)__LDBL_MIN_EXP__ (-1021)_SIZE_T_DECLARED UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)I2C_CR1_TCIE (1 << 6)__DBL_IS_IEC_60559__ 2__UINT_FAST32_MAX__ 0xffffffffUI2C_OAR2(i2c_base) MMIO32((i2c_base) + 0x0c)__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4WINT_MIN __WINT_MIN__RCC_APB2RSTR_TIM15RST (1 << 16)_REG_BIT(base,bit) (((base) << 5) + (bit))RCC_APB2RSTR_USART8RST (1 << 7)RCC_CFGR2_PREDIV_DIV13 0xc__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32RCC_AHBRSTR_IOPERST (1 << 21)__FLT32X_MIN_EXP__ (-1021)RCC_CFGR_MCO_SHIFT 24INFO_BASE (0x1ffff000U)TIM17_BASE (PERIPH_BASE_APB + 0x14800)BIT27 (1<<27)RST_CRSI2C_TIEMOUTR_TEXTEN (1 << 31)RCC_CFGR3_USARTxSW_MASK 3__UTA_FBIT__ 64INTMAX_C(c) __INTMAX_C(c)RCC_AHBENR_TSCEN (1 << 24)RCC_CIR_LSERDYC (1 << 17)__FLT_DECIMAL_DIG__ 9__thumb__ 1I2C_OAR1_OA1EN_DISABLE (0x0 << 15)LIBOPENCM3_MEMORYMAP_COMMON_H signed chari2c_set_speeduint8_tINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1I2C_TIMINGR_SCLH_SHIFT 8SPI2_BASE (PERIPH_BASE_APB + 0x3800)__FRACT_FBIT__ 15__FLT_HAS_QUIET_NAN__ 1RCC_CFGR2_PREDIV_DIV8 0x7__GNUC_PATCHLEVEL__ 1RCC_CFGR_PLLMUL_MUL15 (0x0D << RCC_CFGR_PLLMUL_SHIFT)PTRDIFF_MINI2C2_OAR1 I2C_OAR1(I2C2)__UINT_LEAST16_MAX__ 0xffffI2C_TIMINGR_SCLDEL_MASK (0xF << I2C_TIMINGR_SCLDEL_SHIFT)PPBI_BASE (0xE0000000U)RCC_BDCR_RTCEN (1 << 15)I2C_CR1_TXIE (1 << 1)RCC_AHBRSTR_IOPBRST (1 << 18)INT32_MAXGPIO_PORT_E_BASE (PERIPH_BASE_AHB2 + 0x1000)__FLT_DIG__ 6GPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINI2C_CR1_RXDMAEN (1 << 15)RCC_APB1RSTR_CECRST (1 << 30)_BSD_SIZE_T_DEFINED_ I2C_CR1_ANFOFF (1 << 12)__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38__FRACT_MAX__ 0X7FFFP-15RPERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)RCC_CFGR_MCO_SYSCLK 4I2C_TIMINGR_PRESC_SHIFT 28__INT_FAST32_MAX__ 0x7fffffffRCC_APB2ENR_USART8EN (1 << 7)__ARM_ARCH_EXT_IDIV____DEFINED_size_t I2C_ICR_BERRCF (1 << 8)PERIPH_BASE_APB (PERIPH_BASE + 0x00000000)RCC_CFGR2_PREDIV_DIV3 0x2RCC_AHBENR_GPIODEN (1 << 20)i2c_peripheral_disableI2C_ISR_TCR (1 << 7)__UINT16_MAX__ 0xffff__TQ_FBIT__ 127RCC_CFGR_MCO_HSI 5TIM14_BASE (PERIPH_BASE_APB + 0x2000)__USQ_FBIT__ 32INT_FAST16_MINRCC_CSR_IWDGRSTF (1 << 29)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32RCC_AHBENR_GPIOEEN (1 << 21)RCC_APB1ENR_TIM2EN (1 << 0)_BoolRCC_APB1ENR_TIM7EN (1 << 5)RST_SPI1INT_FAST32_MIN (-INT_FAST32_MAX - 1)RCC_CFGR_MCO_MASK 0xf__STRICT_ANSI__ 1_SIZE_T_DEFINED_ __ARM_FEATURE_QBITUSART8_BASE (PERIPH_BASE_APB + 0x11C00)RCC_CFGR3_USART3SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)UINT_LEAST8_MAXI2C_CR2(i2c_base) MMIO32((i2c_base) + 0x04)I2C1_PECR I2C_PECR(I2C1)UINT8_C(c) __UINT8_C(c)RCC_CIR_HSIRDYIE (1 << 10)__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__TIM7_BASE (PERIPH_BASE_APB + 0x1400)__USA_IBIT__ 16RCC_CFGR_MCO_HSI48 8i2c_enable_stretchingPTRDIFF_MIN (-PTRDIFF_MAX - 1)RCC_CFGR_MCOPRE_DIV16 (4 << RCC_CFGR_MCOPRE_SHIFT)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HRI2C_TIEMOUTR_TIDLE_SCL_LOW (0x0 << 12)__UINT_FAST64_TYPE__ long long unsigned intTIM2_BASE (PERIPH_BASE_APB + 0x0000)RCC_CFGR_PLLMUL_MUL9 (0x07 << RCC_CFGR_PLLMUL_SHIFT)i2c_enable_rxdmaRCC_CFGR_PLLXTPRE (1<<17)RCC_CIR_HSI48RDYC (1 << 22)__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7i2c_speed_sm_100k__FDPIC__RST_GPIOARST_GPIOBRST_GPIOCRST_GPIODRST_GPIOEi2c_send_stopRCC_CFGR_HPRE_DIV64 (0xc << RCC_CFGR_HPRE_SHIFT)I2C_CR1_STOPIE (1 << 5)RCC_CSR_PINRSTF (1 << 26)INT_FAST64_MIN__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16LSPI1_BASE (PERIPH_BASE_APB + 0x13000)../common/i2c_common_v2.c__USFRACT_MIN__ 0.0UHRTSC_BASE (PERIPH_BASE_AHB1 + 0x4000)RCC_CFGR_PLLMUL_MUL8 (0x06 << RCC_CFGR_PLLMUL_SHIFT)__ARM_NEONRCC_BDCR_RTCSEL_LSI (2 << RCC_BDCR_RTCSEL_SHIFT)__UINT8_MAX__ 0xffRCC_CR2_HSI14ON (1 << 0)RCC_CFGR_HPRE_DIV8 (0xa << RCC_CFGR_HPRE_SHIFT)__LDBL_MAX_EXP__ 1024RCC_CIR_PLLRDYC (1 << 20)LIBOPENCM3_MEMORYMAP_H RCC_CFGR_HPRE_MASK 0xfRCC_APB1ENR_USBEN (1 << 23)__DBL_HAS_DENORM__ 1DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)i2c_reset__ARM_FP16_FORMAT_ALTERNATIVE__DA_FBIT__ 31i2c_enable_analog_filterRCC_CFGR_PPRE_DIV16 (7 << RCC_CFGR_PPRE_SHIFT)__INT_LEAST16_MAX__ 0x7fff_T_WCHAR_ I2C_ICR(i2c_base) MMIO32((i2c_base) + 0x1C)__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LI2C_ICR_TIMOUTCF (1 << 12)INT_LEAST32_MAX __INT_LEAST32_MAX__RST_GPIOFRCC_BDCR_LSEDRV_HIGH (3 << RCC_BDCR_LSEDRV_SHIFT)INT_LEAST8_MAX __INT_LEAST8_MAX__RCC_CFGR_SWS_PLL (2 << RCC_CFGR_SWS_SHIFT)__UINT32_C(c) c ## ULI2C2_RXDR I2C_RXDR(I2C2)I2C1_ISR I2C_ISR(I2C1)___int_wchar_t_h __UACCUM_MIN__ 0.0UKRCC_CFGR3_USART3SW (3 << RCC_CFGR3_USART2SW_SHIFT)__FLT_EPSILON__ 1.1920928955078125e-7FRCC_CR2_HSI14CAL_SHIFT 8_WCHAR_T_DEFINED_ i2c_set_own_10bit_slave_addressRST_ADCRCC_APB2RSTR_USART6RST (1 << 5)__ARM_ARCH_ISA_THUMBRCC_CR_HSEON (1 << 16)RCC_CFGR_MCO_HSE 6__UACCUM_EPSILON__ 0x1P-16UK__ARM_FEATURE_MATMUL_INT8RCC_CFGR_PLLSRC_HSI_CLK_DIV2 0x0__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0I2C_TIMINGR_SCLL_SHIFT 0__ATOMIC_ACQ_REL 4I2C_OAR2_OA2MSK_OA2_7_OA2_6 (0x5 << 8)DBGMCU_BASE (PERIPH_BASE_APB + 0x15800)__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1__ELF__ 1SCS_BASE (PPBI_BASE + 0xE000)TIM16_BASE (PERIPH_BASE_APB + 0x14400)RCC_APB2RSTR_USART1RST (1 << 14)__FLT32_HAS_QUIET_NAN__ 1RCC_CFGR2_PREDIV_DIV11 0xaRCC_CFGR_MCOPRE_DIV2 (1 << RCC_CFGR_MCOPRE_SHIFT)_SIZET_ RCC_CFGR_MCOPRE_DIV4 (2 << RCC_CFGR_MCOPRE_SHIFT)__LDBL_HAS_INFINITY__ 1RCC_CFGR_MCOPRE_DIV1 (0 << RCC_CFGR_MCOPRE_SHIFT)__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308i2c_set_digital_filter__ARM_PCS 1i2c_peripheral_enableRCC_CFGR_MCOPRE_DIV8 (3 << RCC_CFGR_MCOPRE_SHIFT)bool _Bool__size_t I2C_ISR_OVR (1 << 10)I2C_CR2_RD_WRN (1 << 10)RCC_APB2ENR_TIM15EN (1 << 16)UINTMAX_MAX __UINTMAX_MAX__RCC_CFGR_PLLMUL_MUL12 (0x0A << RCC_CFGR_PLLMUL_SHIFT)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffRCC_APB1RSTR_SPI2RST (1 << 14)_BSD_WCHAR_T_ BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)RCC_CR_HSIRDY (1 << 1)INT16_MAX __INT16_MAX__i2c_disable_rxdmaRCC_APB2ENR_SYSCFGCOMPEN (1 << 0)__FLT32X_IS_IEC_60559__ 2speedi2c_disable_autoendI2C_CR2_START (1 << 13)SYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXRCC_CFGR_SW_HSE (1 << RCC_CFGR_SW_SHIFT)I2C_ICR_PECCF (1 << 11)PERIPH_BASE_AHB1 (PERIPH_BASE + 0x00020000)__INT_LEAST16_WIDTH__ 16I2C1_RXDR I2C_RXDR(I2C1)RCC_APB1RSTR_TIM14RST (1 << 8)__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLRCC_BDCR_LSERDY (1 << 1)_REG_BIT__USFRACT_EPSILON__ 0x1P-8UHRNULL ((void *)0)i2c_set_scl_high_period__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)__need_NULLI2C_ISR_DIR_WRITE (0x0 << 16)_BSD_PTRDIFF_T_ RCC_AHBRSTR_IOPDRST (1 << 20)/build/libopencm3/lib/stm32/f0__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX__RCC_CSR_WWDGRSTF (1 << 30)USART2_BASE (PERIPH_BASE_APB + 0x4400)__UINT32_MAX__ 0xffffffffUL__INT_LEAST8_MAX__ 0x7fRCC_CFGR3_CECSW (1 << 6)RST_BDCR__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXDAC_BASE (PERIPH_BASE_APB + 0x7400)CEC_BASE (PERIPH_BASE_APB + 0x7800)RCC_CFGR2_PREDIV_DIV5 0x4I2C_ISR_ARLO (1 << 9)RCC_CFGR3_ADCSW (1 << 8)RCC_CIR_LSERDYF (1 << 1)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024I2C2_CR2 I2C_CR2(I2C2)n_bytes__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1RCC_CR_HSICAL_SHIFT 8i2c_enable_interrupt__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fRST_I2C2BIT14 (1<<14)I2C1_CR2 I2C_CR2(I2C1)prescaler__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intRCC_APB1RSTR_TIM2RST (1 << 0)RCC_CR2_HSI14TRIM (31 << RCC_CR2_HSI14TRIM_SHIFT)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__RCC_CFGR2_PREDIV_DIV6 0x5INT_FAST32_MIN_T_SIZE_ __FLT_EVAL_METHOD_TS_18661_3__ 0ST_VREFINT_CAL MMIO16(0x1FFFF7BA)__SCHAR_WIDTH__ 8rcc_apb2_frequency rcc_apb1_frequencyBIT18 (1<<18)UINT_FAST16_MAX__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32RCC_BDCR_RTCSEL_LSE (1 << RCC_BDCR_RTCSEL_SHIFT)__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)RCC_CFGR_HPRE_NODIV (0x0 << RCC_CFGR_HPRE_SHIFT)__INT32_MAX__ 0x7fffffffLST_TSENSE_CAL2_110C MMIO16(0x1FFFF7C2)UINTMAX_MAXEXTI_BASE (PERIPH_BASE_APB + 0x10400)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLRCC_CIR_CSSC (1 << 23)__ARM_FEATURE_BF16_VECTOR_ARITHMETICRCC_BDCR_LSEDRV_LOW (0 << RCC_BDCR_LSEDRV_SHIFT)RCC_CIR_HSI14RDYIE (1 << 13)LIBOPENCM3_RCC_H DEBUG_BASE (SCS_BASE + 0x0DF0)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32offsetof(TYPE,MEMBER) __builtin_offsetof (TYPE, MEMBER)__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__I2C1_OAR2 I2C_OAR2(I2C1)RCC_CFGR_PLLMUL_MUL6 (0x04 << RCC_CFGR_PLLMUL_SHIFT)INT8_MAX __INT8_MAX__RCC_CSR_LSIRDY (1 << 1)BIT28 (1<<28)__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1RCC_CFGR3_USART3SW_SYSCLK (1 << RCC_CFGR3_USART2SW_SHIFT)I2C_CR1_PECEN (1 << 23)ADC_BASE (PERIPH_BASE_APB + 0x12400)RCC_CFGR_PPRE_DIV4 (5 << RCC_CFGR_PPRE_SHIFT)__DBL_MAX_EXP__ 1024i2c_set_data_setup_time__ATOMIC_RELEASE 3I2C_OAR1_OA1MODE_10BIT 1RCC_BDCR MMIO32(RCC_BASE + 0x20)__FLT32X_HAS_DENORM__ 1__FLT_MANT_DIG__ 24__LACCUM_FBIT__ 31I2C_ICR_ALERTCF (1 << 13)RCC_CR_HSERDY (1 << 17)__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64I2C_CR1_WUPEN (1 << 18)UINTPTR_MAX_T_PTRDIFF_ RCC_CR2_HSI14DIS (1 << 2)__LDBL_DENORM_MIN__ 4.9406564584124654e-324LRCC_APB1RSTR_WWDGRST (1 << 11)__INT64_MAX__ 0x7fffffffffffffffLLI2C_ICR_STOPCF (1 << 5)__ULLFRACT_IBIT__ 0_ANSI_STDDEF_H _PTRDIFF_T_ MMIO16(addr) (*(volatile uint16_t *)(addr))I2C_OAR2_OA2MSK_OA2_7_OA2_4 (0x3 << 8)RCC_APB2ENR_SPI1EN (1 << 12)RCC_CSR_LPWRRSTF (1 << 31)__GNUC__ 12RCC_CFGR_SW (3 << RCC_CFGR_SW_SHIFT)WCHAR_MAXRCC_CFGR3_USBSW (1 << 7)RCC_CFGR2_PREDIV_DIV15 0xe__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16RCC_CFGR3_USART2SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0RCC_CFGR_SWS_SHIFT 2CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULKRCC_AHBENR_GPIOBEN (1 << 18)__need_size_t__INT_MAX__ 0x7fffffff_SIZE_T_ __FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__ARM_FEATURE_CMSEINT16_MAXi2c_nackI2C_ISR_DIR_READ (0x1 << 16)RCC_CIR_HSI48RDYF (1 << 6)__wchar_t__ __LDBL_HAS_QUIET_NAN__ 1RCC_AHBENR_DMA2EN (1 << 1)I2C2_PECR I2C_PECR(I2C2)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)RCC_APB1ENR_I2C2EN (1 << 22)_PTRDIFF_T RCC_CFGR_MCOPRE_SHIFT 28I2C_ISR_STOPF (1 << 5)I2C_CR2_SADD_10BIT_MASK 0x3FF__UINT_FAST64_MAX__ 0xffffffffffffffffULLRCC_APB2RSTR MMIO32(RCC_BASE + 0x0c)__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32i2c_send_dataRCC_CIR_LSIRDYC (1 << 16)RCC_CFGR_MCO_LSI 2BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024I2C_ISR_NACKF (1 << 4)UINT16_MAXI2C2_TIMEOUTR I2C_TIMEOUTR(I2C2)RCC_APB1ENR_USART5EN (1 << 20)__FLT64_MIN__ 2.2250738585072014e-308F64RCC_APB1RSTR_USART4RST (1 << 19)i2c_get_datai2c_received_dataRCC_APB1RSTR_USART3RST (1 << 18)RCC_APB1ENR_CANEN (1 << 25)__ARM_ARCH_PROFILE__INT64_TYPE__ long long intI2C1_ICR I2C_ICR(I2C1)__LFRACT_FBIT__ 31__CHAR_BIT__ 8interrupt__SIZEOF_WCHAR_T__ 4RCC_CFGR_SWS_HSE (1 << RCC_CFGR_SWS_SHIFT)I2C1_TIMINGR I2C_TIMINGR(I2C1)RCC_CFGR2_PREDIV_DIV14 0xdRCC_CFGR_PPRE_SHIFT 8i2c_set_10bit_addressRCC_BDCR_RTCSEL_NOCLK (0 << RCC_BDCR_RTCSEL_SHIFT)RCC_CR_HSION (1 << 0)__UFRACT_MAX__ 0XFFFFP-16URRCC_APB1RSTR_TIM7RST (1 << 5)INT64_MAXi2c_speedsNULLINT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0RCC_CFGR3 MMIO32(RCC_BASE + 0x30)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__RST_TIM15RST_TIM16RST_TIM17waitSYS_TICK_BASE (SCS_BASE + 0x0010)RCC_CR2_HSI48RDY (1 << 17)I2C_CR2_SADD_10BIT_SHIFT 0__USER_LABEL_PREFIX__ __ARM_32BIT_STATE__UFRACT_FBIT__ 16addr__UDQ_FBIT__ 64INT16_MIN (-INT16_MAX - 1)RCC_CFGR_PPRE_DIV2 (4 << RCC_CFGR_PPRE_SHIFT)RCC_APB1ENR_PWREN (1 << 28)__LDBL_MAX_10_EXP__ 308i2c_set_own_7bit_slave_addressI2C_OAR2_OA2MSK_OA2_7_OA2_2 (0x1 << 8)__INT_FAST32_TYPE__ intCRS_BASE (PERIPH_BASE_APB + 0x6C00)__ATOMIC_SEQ_CST 5__GCC_ASM_FLAG_OUTPUTS____LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1RCC_APB1RSTR_DACRST (1 << 29)RCC_CIR_HSI14RDYF (1 << 5)_T_WCHAR __USACCUM_IBIT__ 8RCC_CFGR3_USART3SW_SHIFT 18__FLT64_HAS_DENORM__ 1__ULLACCUM_IBIT__ 32_STDBOOL_H _STDDEF_H_ _WCHAR_T_DECLARED RCC_CR_HSITRIM_SHIFT 3i2c_set_10bit_addr_mode__FLT_EVAL_METHOD__ 0i2c_disable_analog_filter__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__thumb2__RCC_CR_PLLON (1 << 24)RCC_BASE (PERIPH_BASE_AHB1 + 0x1000)__ARM_FEATURE_LDREXi2c_speed_fmp_1m_T_PTRDIFF __UQQ_FBIT__ 8RCC_CFGR_HPRE_SHIFT 4i2c_enable_autoend__ARM_FP16_ARGS__GCC_IEC_559 0RCC_CIR_HSERDYIE (1 << 11)INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4RCC_CFGR_MCOPRE_DIV64 (6 << RCC_CFGR_MCOPRE_SHIFT)__STDC__ 1RCC_APB2RSTR_SYSCFGRST (1 << 0)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__i2c_disable_interruptRTC_BASE (PERIPH_BASE_APB + 0x2800)__UINT8_TYPE__ unsigned charI2C_ISR_TIMEOUT (1 << 12)RCC_AHBRSTR_TSCRST (1 << 24)RCC_AHBENR_GPIOCEN (1 << 19)__SIG_ATOMIC_TYPE__ intRCC_AHBENR_FLTFEN (1 << 4)UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"RCC_CSR_OBLRSTF (1 << 25)INT8_MIN__ORDER_PDP_ENDIAN__ 3412RCC_CFGR_HPRE_DIV512 (0xf << RCC_CFGR_HPRE_SHIFT)I2C_CR2_AUTOEND (1 << 25)PERIPH_BASE (0x40000000U)true 1_PTRDIFF_T_DECLARED __USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)RCC_AHBRSTR_IOPARST (1 << 17)RCC_APB2ENR MMIO32(RCC_BASE + 0x18)I2C_TIMINGR_SDADEL_SHIFT 16__LDBL_MIN_10_EXP__ (-307)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__GCC_ATOMIC_CHAR_LOCK_FREE 1RCC_CFGR_PLLMUL (0x0F << RCC_CFGR_PLLMUL_SHIFT)I2C2 I2C2_BASE__LFRACT_EPSILON__ 0x1P-31LRI2C2_ICR I2C_ICR(I2C2)RCC_APB1ENR_I2C1EN (1 << 21)I2C_ISR_RXNE (1 << 2)__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX____FLT32X_NORM_MAX__ 1.7976931348623157e+308F32xi2c_transmit_int_status__arm__ 1RCC_CR MMIO32(RCC_BASE + 0x00)I2C_TXDR(i2c_base) MMIO32((i2c_base) + 0x28)RCC_CFGR_PLLMUL_MUL3 (0x01 << RCC_CFGR_PLLMUL_SHIFT)I2C_TIMEOUTR(i2c_base) MMIO32((i2c_base) + 0x14)__FLT32_MIN_10_EXP__ (-37)___int_size_t_h MMIO64(addr) (*(volatile uint64_t *)(addr))_WCHAR_T unsigned int__LDBL_NORM_MAX__ 1.7976931348623157e+308Li2c_is_startGNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsRCC_AHBENR_DMAEN RCC_AHBENR_DMA1ENDESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)_GCC_PTRDIFF_T RCC_CFGR_PLLMUL_MUL10 (0x08 << RCC_CFGR_PLLMUL_SHIFT)RCC_CFGR2_PREDIV 0xf__TA_IBIT__ 64RCC_CR2_HSI14RDY (1 << 1)RST_CANUSART3_BASE (PERIPH_BASE_APB + 0x4800)RCC_APB1RSTR_USART5RST (1 << 20)_SIZE_T __SACCUM_IBIT__ 8__ARM_FEATURE_QRDMXRCC_CFGR3_USART1SW_HSI (3 << RCC_CFGR3_USART1SW_SHIFT)__ARM_ARCH_ISA_THUMB 1DESIG_FLASH_SIZE_BASE (0x1FFFF7CCU)I2C_ICR_ADDRCF (1 << 3)__LONG_LONG_MAX__ 0x7fffffffffffffffLLRCC_AHBENR_DMA1EN (1 << 0)__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__RST_TSCi2c_set_read_transfer_dirBIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0RCC_CR2_HSI48CAL (0xFF << RCC_CR2_HSI48CAL_SHIFT)_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__SIZE_T __LDBL_HAS_DENORM__ 1i2c_clear_stopRCC_CIR_LSIRDYIE (1 << 8)INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1__FLT32_DIG__ 6INT_LEAST16_MAXTIM6_BASE (PERIPH_BASE_APB + 0x1000)BIT15 (1<<15)RCC_APB2RSTR_DBGMCURST (1 << 22)RCC_CFGR_MCO_LSE 3i2c_transfer_completeBIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)RCC_BDCR_BDRST (1 << 16)__ACCUM_MIN__ (-0X1P15K-0X1P15K)I2C2_OAR2 I2C_OAR2(I2C2)_GCC_WCHAR_T __ARM_FEATURE_CRYPTOI2C_CR1(i2c_base) MMIO32((i2c_base) + 0x00)I2C_OAR2_OA2EN (1 << 15)__INT_LEAST32_TYPE__ long intRCC_CFGR_PLLXTPRE_HSE_CLK_DIV2 0x1RCC_CFGR_PLLNODIV (1 << 31)RCC_CFGR_PLLSRC (1<<16)RST_DBGMCUBIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2I2C_CR1_DNF_SHIFT 8RCC_APB2ENR_DBGMCUEN (1 << 22)BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234I2C_ISR_ALERT (1 << 13)BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)__FLT_NORM_MAX__ 3.4028234663852886e+38FUSART1_BASE (PERIPH_BASE_APB + 0x13800)RCC_CFGR3_USART1SW_LSE (2 << RCC_CFGR3_USART1SW_SHIFT)long long unsigned intRCC_CFGR_SW_HSI48 (3 << RCC_CFGR_SW_SHIFT)__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)RCC_CFGR_MCOPRE_DIV32 (5 << RCC_CFGR_MCOPRE_SHIFT)__ULACCUM_IBIT__ 32I2C1 I2C1_BASE__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__ULLACCUM_EPSILON__ 0x1P-32ULLKRCC_CFGR_PPRE_NODIV (0 << RCC_CFGR_PPRE_SHIFT)__APCS_32__ 1__WINT_MAX__ 0xffffffffUINT_LEAST64_MAXuint16_t__DQ_FBIT__ 63I2C_CR1_GCEN (1 << 19)__PTRDIFF_T __UHQ_IBIT__ 0INT_LEAST8_MINRCC_CFGR_PLLMUL_MUL16 (0x0E << RCC_CFGR_PLLMUL_SHIFT)BIT29 (1<<29)RCC_CFGR_SWS (3 << RCC_CFGR_SWS_SHIFT)__INT_FAST16_TYPE__ intRCC_CFGR_ADCPRE (1<<14)USART7_BASE (PERIPH_BASE_APB + 0x11800)RCC_CFGR_PLLMUL_MUL4 (0x02 << RCC_CFGR_PLLMUL_SHIFT)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRRST_SPI2__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intI2C_ISR_TXE (1 << 0)I2C1_TIMEOUTR I2C_TIMEOUTR(I2C1)__FLT32X_DIG__ 15RCC_CFGR_HPRE_DIV128 (0xd << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_SWS_HSI (0 << RCC_CFGR_SWS_SHIFT)RCC_APB1RSTR_CRSRST (1 << 27)__UTQ_FBIT__ 128RCC_APB2ENR_TIM17EN (1 << 18)__LLACCUM_EPSILON__ 0x1P-31LLK__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffRCC_CFGR2_PREDIV_DIV4 0x3RCC_APB1ENR_TIM3EN (1 << 1)RCC_CIR_HSIRDYF (1 << 2)DMA2_BASE (PERIPH_BASE_AHB1 + 0x0400)PTRDIFF_MAX __PTRDIFF_MAX__RCC_CFGR2_PREDIV_DIV16 0xfRCC_CFGR_PLLMUL_MUL14 (0x0C << RCC_CFGR_PLLMUL_SHIFT)__ARM_ARCH 6I2C2_BASE (PERIPH_BASE_APB + 0x5800)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKRCC_CFGR_SWS_HSI48 (3 << RCC_CFGR_SWS_SHIFT)RCC_CFGR3_USART2SW (3 << RCC_CFGR3_USART2SW_SHIFT)I2C_ICR_ARLOCF (1 << 9)dnf_setting__ULFRACT_MIN__ 0.0ULRRCC_CFGR_PLLMUL_MUL5 (0x03 << RCC_CFGR_PLLMUL_SHIFT)I2C_OAR1_OA1_10BIT 1__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intRCC_APB2RSTR_USART7RST (1 << 6)I2C_ISR_BUSY (1 << 15)RCC_CFGR2_PREDIV_DIV12 0xb_BSD_SIZE_T_ WCHAR_MINDMA1_BASE DMA_BASEI2C_OAR1_OA1_7BIT 0_WCHAR_T_ RCC_CSR_PORRSTF (1 << 27)BEGIN_DECLS periodI2C_TIMINGR_SCLH_MASK (0xFF << I2C_TIMINGR_SCLH_SHIFT)RST_TIM2RCC_APB2RSTR_SPI1RST (1 << 12)USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)i2c_set_prescalerRCC_CSR MMIO32(RCC_BASE + 0x24)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__LLFRACT_EPSILON__ 0x1P-63LLR__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)RCC_CFGR3_USART1SW (3 << RCC_CFGR3_USART1SW_SHIFT)RCC_CR2 MMIO32(RCC_BASE + 0x34)__FLT32_MIN__ 1.1754943508222875e-38F32INT16_MININTPTR_MIN__FLT_IS_IEC_60559__ 2__THUMBEL__ 1RCC_CR_HSICAL (0xFF << RCC_CR_HSICAL_SHIFT)i2c_set_bytes_to_transferRCC_APB1RSTR_TIM6RST (1 << 4)USART6_BASE (PERIPH_BASE_APB + 0x11400)RST_CEC__QQ_IBIT__ 0RST_CAN1I2C_OAR1(i2c_base) MMIO32((i2c_base) + 0x08)DESIG_UNIQUE_ID_BASE (0x1FFFF7ACU)__LLACCUM_FBIT__ 31RCC_APB2ENR_USART6EN (1 << 5)__UINTMAX_TYPE__ long long unsigned int__FLT32X_MIN_10_EXP__ (-307)RCC_BDCR_RTCSEL (3 << RCC_BDCR_RTCSEL_SHIFT)__USQ_IBIT__ 0__UINT_LEAST32_TYPE__ long unsigned intRCC_CFGR_SW_PLL (2 << RCC_CFGR_SW_SHIFT)RCC_APB2ENR_USART7EN (1 << 6)__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long intRCC_CIR_PLLRDYF (1 << 4)__GCC_ATOMIC_INT_LOCK_FREE 1RCC_APB2RSTR_TIM17RST (1 << 18)STM32F0 1INTMAX_MAXRST_DACI2C_RXDR(i2c_base) MMIO32((i2c_base) + 0x24)RCC_CIR_CSSF (1 << 7)I2C_CR1_SMBDEN (1 << 21)__ARM_FEATURE_FP16_SCALAR_ARITHMETICUINT_FAST32_MAX __UINT_FAST32_MAX____USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1clock_megahz__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_Cs_timeRCC_APB1ENR_WWDGEN (1 << 11)INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intUINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRI2C2_ISR I2C_ISR(I2C2)RCC_CFGR_PPRE_DIV8 (6 << RCC_CFGR_PPRE_SHIFT)RCC_CR_HSITRIM (0x1F << RCC_CR_HSITRIM_SHIFT)__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned int__INT64_C(c) c ## LLRCC_CFGR3_USART1SW_SHIFT 0RCC_APB2ENR_TIM16EN (1 << 17)RCC_APB1RSTR_I2C1RST (1 << 21)RCC_APB1ENR_SPI2EN (1 << 14)MPU_BASE (SCS_BASE + 0x0D90)TIM15_BASE (PERIPH_BASE_APB + 0x14000)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16RCC_CFGR_PLLSRC_HSE_CLK 0x1I2C2_TIMINGR I2C_TIMINGR(I2C2)FLASH_BASE (0x08000000U)CORESIGHT_LAR_OFFSET 0xfb0I2C_CR2_RELOAD (1 << 24)RCC_CFGR3_I2C1SW (1 << 4)RCC_BDCR_LSEON (1 << 0)FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x2000)short int_STDDEF_H RCC_CR2_HSI14CAL (0xFF << RCC_CR2_HSI14CAL_SHIFT)__FLT32_IS_IEC_60559__ 2__UINT16_C(c) cRCC_CIR_LSERDYIE (1 << 9)__UDA_IBIT__ 32i2c_speed_fm_400kI2C_CR1_NOSTRETCH (1 << 17)RCC_CFGR3_USART1SW_PCLK (0 << RCC_CFGR3_USART1SW_SHIFT)UINT_LEAST32_MAXBIT2 (1<<2)RCC_CFGR_MCOPRE_DIV128 (7 << RCC_CFGR_MCOPRE_SHIFT)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCRCC_APB1ENR_DACEN (1 << 29)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53RCC_BDCR_LSEBYP (1 << 2)I2C_OAR2_OA2MSK_NO_CMP (0x7 << 8)BIT5 (1<<5)BIT1 (1<<1)USART4_BASE (PERIPH_BASE_APB + 0x4C00)INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1RCC_CFGR_HPRE (0xf << RCC_CFGR_HPRE_SHIFT)I2C2_CR1 I2C_CR1(I2C2)I2C_CR1_RXIE (1 << 2)__need_ptrdiff_t__DBL_DECIMAL_DIG__ 17BIT8 (1<<8)RST_TIM7__ULACCUM_FBIT__ 32INT16_C(c) __INT16_C(c)RCC_CFGR2_PREDIV_DIV2 0x1_WCHAR_T_DEFINED RCC_CFGR2 MMIO32(RCC_BASE + 0x2c)i2c_set_7bit_addr_mode__INT16_MAX__ 0x7fffRST_USBRCC_APB1RSTR_USBRST (1 << 23)I2C1_CR1 I2C_CR1(I2C1)__WCHAR_T__ __INT_WIDTH__ 32RCC_APB1RSTR_CANRST (1 << 25)RCC_CR_HSEBYP (1 << 18)__QQ_FBIT__ 7POWER_CONTROL_BASE (PERIPH_BASE_APB + 0x7000)__SIG_ATOMIC_WIDTH__ 32I2C_OAR2_OA2MSK_OA2_7_OA2_5 (0x4 << 8)__FLT64_EPSILON__ 2.2204460492503131e-16F64RCC_CFGR3_USART3SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)INT16_C__DEFINED_wchar_t I2C_ICR_NACKCF (1 << 4)__UTA_IBIT__ 64I2C_TIMINGR_PRESC_MASK (0xF << 28)RCC_CFGR MMIO32(RCC_BASE + 0x04)__ULLFRACT_EPSILON__ 0x1P-64ULLR__UINT_LEAST32_MAX__ 0xffffffffUL__SIZEOF_WINT_T__ 4__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17RCC_CFGR3_USART2SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)RCC_AHBENR_CRCEN (1 << 6)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1RCC_BDCR_LSEDRV (3 << RCC_BDCR_LSEDRV_SHIFT)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1i2c_disable_stretchingRCC_CFGR_PPRE (7 << RCC_CFGR_PPRE_SHIFT)RCC_CFGR_MCOPRE (7 << RCC_CFGR_MCOPRE_SHIFT)I2C_OAR1_OA1MODE_7BIT 0I2C_OAR2_OA2MSK_NO_MASK (0x0 << 8)__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODRCC_APB2RSTR_ADCRST (1 << 9)I2C_CR2_NACK (1 << 15)RST_I2C1_GCC_SIZE_T I2C_ISR_TC (1 << 6)__ULLFRACT_MIN__ 0.0ULLRUINT_FAST8_MAXI2C_CR1_ERRIE (1 << 7)__UDQ_IBIT__ 0I2C_OAR2_OA2MSK_OA2_7 (0x6 << 8)__GCC_CONSTRUCTIVE_SIZE 64_BSD_WCHAR_T___LLFRACT_IBIT__ 0RCC_BDCR_LSEDRV_MEDLO (1 << RCC_BDCR_LSEDRV_SHIFT)uint32_tBIT12 (1<<12)RCC_CFGR_PLLMUL_MUL2 (0x00 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB1ENR_USART4EN (1 << 19)I2C_CR2_SADD_7BIT_SHIFT 1__SACCUM_EPSILON__ 0x1P-7HKRCC_CIR_HSI14RDYC (1 << 21)RST_DAC1RCC_CFGR_SW_SHIFT 0RCC_CFGR2_PREDIV_DIV10 0x9I2C_OAR1_OA1MODE (1 << 10)__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8__INT_WCHAR_T_H RCC_APB1RSTR_I2C2RST (1 << 22)__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULKRCC_CIR_HSERDYF (1 << 3)__LDBL_DIG__ 15UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXLIBOPENCM3_CM3_MEMORYMAP_H BIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MINI2C1_TXDR I2C_TXDR(I2C1)__FLT64_DIG__ 15RCC_APB2ENR_TIM1EN (1 << 11)BIT22 (1<<22)__INT_LEAST8_WIDTH__ 8RCC_CFGR3_USART1SW_SYSCLK (1 << RCC_CFGR3_USART1SW_SHIFT)__INT_LEAST16_TYPE__ short intI2C_ISR_BERR (1 << 8)DMA_BASE (PERIPH_BASE_AHB1 + 0x0000)__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1RST_TIM1UINTMAX_CRST_TIM3RCC_CFGR_PLLXTPRE_HSE_CLK 0x0RST_TIM6INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1I2C_TIMINGR_SDADEL_MASK (0xF << I2C_TIMINGR_SDADEL_SHIFT)__HQ_FBIT__ 15__bool_true_false_are_defined 1I2C_CR2_ADD10 (1 << 11)RCC_APB1RSTR MMIO32(RCC_BASE + 0x10)BIT26 (1<<26)__SIZE_MAX__ 0xffffffffURCC_CFGR_MCO_HSI14 1__ARM_FEATURE_SATI2C_CR1_TXDMAEN (1 << 14)I2C_OAR1_OA1 (1 << 10)__ARM_ARCHRCC_AHBRSTR_IOPCRST (1 << 19)__LONG_MAX__ 0x7fffffffLRCC_APB2RSTR_TIM1RST (1 << 11)RCC_CIR_HSI48RDYIE (1 << 14)I2C_CR2_NBYTES_MASK (0xFF << I2C_CR2_NBYTES_SHIFT)I2C_CR1_SBC (1 << 16)__PTRDIFF_TYPE__ intINT_LEAST64_MINPTRDIFF_MAXRCC_CFGR_PLLMUL_SHIFT 18i2c_transfer7I2C_TIEMOUTR_TIMOUTEN (1 << 15)ST_TSENSE_CAL1_30C MMIO16(0x1FFFF7B8)__ARM_ARCH_6M__ 1RCC_CFGR_HPRE_DIV2 (0x8 << RCC_CFGR_HPRE_SHIFT)__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53RCC_CFGR_MCO_PLL 7__ARM_ASM_SYNTAX_UNIFIED__i2c_enable_txdmaWINT_MAX__INT16_C(c) cRCC_APB1ENR_USART2EN (1 << 17)INT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32RST_TIM14RCC_AHBENR MMIO32(RCC_BASE + 0x14)RCC_CFGR3_USART3SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)RST_USART1RST_USART2RST_USART3RST_USART4I2C1_OAR1 I2C_OAR1(I2C1)RCC_CFGR_PLLSRC0 (1<<15)__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)I2C_CR1_SMBHEN (1 << 20)dataprescRCC_CR_CSSON (1 << 19)RST_PWRRCC_CFGR_MCO_NOCLK 0i2c_speed_unknown__FLT32_NORM_MAX__ 3.4028234663852886e+38F32RCC_CR2_HSI14TRIM_SHIFT 3RST_WWDGI2C1_BASE (PERIPH_BASE_APB + 0x5400)UINT64_C(c) __UINT64_C(c)RCC_CFGR3_USART2SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)RCC_APB2RSTR_TIM16RST (1 << 17)RCC_CFGR_HPRE_DIV256 (0xe << RCC_CFGR_HPRE_SHIFT)__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0I2C_ISR(i2c_base) MMIO32((i2c_base) + 0x18)RCC_APB1RSTR_PWRRST (1 << 28)INT_FAST16_MAXRCC_AHBRSTR_IOPFRST (1 << 22)__INT_FAST64_WIDTH__ 64I2C_ISR_PECERR (1 << 11)__ARM_EABI__ 1__INT_LEAST64_TYPE__ long long inti2c_set_scl_low_periodIWDG_BASE (PERIPH_BASE_APB + 0x3000)__ARM_FEATURE_CDE_COPROCRST_ADC1UINT32_CRCC_AHBENR_GPIOAEN (1 << 17)GCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| ,B„Ž ¬A €‚„…†‡Ž^A„ŽA+aeabi!6S-MM ñÿ !!!""###$$%%&&'''(()))**++,,,--..//00112233445556677788::<>?ACE[]GIKMOQSUWY_>o Ò7kœ Ô ^a ,# 9 P_m |› »ÉÖï 2Jay !¦"½#Ô$ì%&'2(L)f*s+†,š-£.¬/Ä0Ú1ì234(5:6K7]¬8k^:i2c_common_v2.c$t$dwm4.0.88d8b58fcc7cb03c549c2662f5adb422wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.memorymap.h.21.991cbfb03a4e91ff777157049f1f9499wm4.memorymap.h.30.896853dc49eef163ea0904dd4a9a50c4wm4.stddef.h.39.14c6052d10f67a5d7cb73ea4beacde53wm4.i2c_common_v2.h.44.64a864871e764c2b0f86f186db18f70ewm4.rcc.h.38.ff8d227a6b85563d2eb792ddaec07026i2c_resetrcc_periph_reset_pulsei2c_peripheral_enablei2c_peripheral_disablei2c_send_starti2c_send_stopi2c_clear_stopi2c_set_own_7bit_slave_addressi2c_set_own_10bit_slave_addressi2c_send_datai2c_get_datai2c_enable_analog_filteri2c_disable_analog_filteri2c_set_digital_filteri2c_set_prescaleri2c_set_data_setup_timei2c_set_data_hold_timei2c_set_scl_high_periodi2c_set_scl_low_periodi2c_enable_stretchingi2c_disable_stretchingi2c_set_7bit_addr_modei2c_set_10bit_addr_modei2c_set_7bit_addressi2c_set_10bit_addressi2c_set_write_transfer_diri2c_set_read_transfer_diri2c_set_bytes_to_transferi2c_is_starti2c_enable_autoendi2c_disable_autoendi2c_nacki2c_busyi2c_transmit_int_statusi2c_transfer_completei2c_received_datai2c_enable_interrupti2c_disable_interrupti2c_enable_rxdmai2c_disable_rxdmai2c_enable_txdmai2c_disable_txdmai2c_transfer7i2c_set_speed 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E´ ! !RCC_APB2ENR_SYSCFGCOMPEN (1 << 0)FLASH_CR_OPTWRE (1 << 9)CM3_LIKELY(expr) (__builtin_expect(!!(expr), 1))SCB_BASE (SCS_BASE + 0x0D00)__UHA_FBIT__ 8I2C_CR2_STOP (1 << 14)RCC_APB1ENR_CECEN (1 << 30)RCC_CIR_LSERDYIE (1 << 9)RCC_CFGR2_PREDIV_DIV15 0xeDMA_BASE (PERIPH_BASE_AHB1 + 0x0000)FLASH_OBR_DATA0 (0xFF << FLASH_OBR_DATA0_SHIFT)CORESIGHT_LSR_SLK (1<<1)RCC_CIR_LSIRDYF (1 << 0)__CHAR_UNSIGNED__ 1RCC_CSR_LSION (1 << 0)RCC_BDCR_LSEDRV_MEDHI (2 << RCC_BDCR_LSEDRV_SHIFT)I2C_CR1_ALERTEN (1 << 22)__FLT64_HAS_INFINITY__ 1RCC_CFGR_PLLMUL_MUL4 (0x02 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB1ENR MMIO32(RCC_BASE + 0x1c)__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffff__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)TIM1_BASE (PERIPH_BASE_APB + 0x12C00)FLASH_KEYR2 MMIO32(FLASH_MEM_INTERFACE_BASE + 0x44)__INTMAX_MAX__ 0x7fffffffffffffffLLRCC_APB1ENR_TIM6EN (1 << 4)__TQ_IBIT__ 0LIBOPENCM3_I2C_COMMON_V2_H __FLT64_DECIMAL_DIG__ 17RCC_CSR_RMVF (1 << 24)__LDBL_MIN__ 2.2250738585072014e-308LINT_FAST64_MAXFLASH_ACR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x00)__ATOMIC_CONSUME 1__LFRACT_MIN__ (-0.5LR-0.5LR)__WCHAR_MAX__ 0xffffffffU__ARM_FEATURE_QBITRCC_CFGR2_PREDIV_DIV14 0xdI2C_ISR_BUSY (1 << 15)RCC_CR2_HSI48CAL_SHIFT 24INT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8__DBL_MAX_10_EXP__ 308__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLKI2C_OAR1_OA1_10BIT 1__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64I2C_TIEMOUTR_TEXTEN (1 << 31)__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned intRCC_APB1RSTR_USART2RST (1 << 17)RCC_CIR_PLLRDYIE (1 << 12)__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__FLT32_MIN__ 1.1754943508222875e-38F32__USACCUM_MIN__ 0.0UHKRCC_CFGR_PLLSRC_HSI_CLK_DIV2 0x0__FLT32_DECIMAL_DIG__ 9__DECIMAL_DIG__ 17__LDBL_MIN_EXP__ (-1021)UINTPTR_MAX __UINTPTR_MAX____LDBL_MANT_DIG__ 53RCC_CFGR_HPRE_DIV16 (0xb << RCC_CFGR_HPRE_SHIFT)INT64_MIN (-INT64_MAX - 1)WWDG_BASE (PERIPH_BASE_APB + 0x2c00)I2C2 I2C2_BASE__UINT8_C(c) c__INT16_TYPE__ short int__FLT64_MAX__ 1.7976931348623157e+308F64RCC_CFGR3_USART2SW_SYSCLK (1 << RCC_CFGR3_USART2SW_SHIFT)UINT_FAST32_MAXRCC_CSR_RESET_FLAGS (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF | RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF | RCC_CSR_PINRSTF | RCC_CSR_OBLRSTF)LIBOPENCM3_I2C_H I2C_CR2_HEAD10R (1 << 12)FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08)INT_FAST64_MAX __INT_FAST64_MAX__I2C1_TIMEOUTR I2C_TIMEOUTR(I2C1)RCC_CR2_HSI14TRIM_SHIFT 3RCC_BDCR_LSEDRV_MEDLO (1 << RCC_BDCR_LSEDRV_SHIFT)__STDC_HOSTED__ 1rcc_osc_offRCC_CFGR_PLLMUL_MUL13 (0x0B << RCC_CFGR_PLLMUL_SHIFT)FLASH_SR_WRPRTERR (1 << 4)RCC_CSR_SFTRSTF (1 << 28)USART5_BASE (PERIPH_BASE_APB + 0x5000)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intGPIO_PORT_C_BASE (PERIPH_BASE_AHB2 + 0x0800)__SIZE_T__ INT32_MIN (-INT32_MAX - 1)RCC_AHBENR_SRAMEN (1 << 2)__FLT32_MAX_10_EXP__ 38RCC_CIR MMIO32(RCC_BASE + 0x08)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZRCC_APB1RSTR_TIM3RST (1 << 1)__UINTPTR_MAX__ 0xffffffffUFLASH_OBR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x1C)RCC_CFGR2_PREDIV_DIV9 0x8__need_wchar_t__FLT32_MIN_EXP__ (-125)RCC_CIR_HSIRDYC (1 << 18)RCC_CFGR2_PREDIV_DIV7 0x6I2C_OAR2_OA2MSK_OA2_7_OA2_3 (0x2 << 8)__PTRDIFF_T UINT32_MAX __UINT32_MAX__TIM3_BASE (PERIPH_BASE_APB + 0x0400)I2C_PECR(i2c_base) MMIO32((i2c_base) + 0x20)__WCHAR_T USART8_BASE (PERIPH_BASE_APB + 0x11C00)__ULFRACT_FBIT__ 32flash_prefetch_enableRCC_APB2ENR_USART1EN (1 << 14)__FLT64_MIN_10_EXP__ (-307)RCC_APB1ENR_TIM14EN (1 << 8)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__RCC_CFGR_HPRE_DIV4 (0x9 << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_MCOPRE_DIV32 (5 << RCC_CFGR_MCOPRE_SHIFT)__SFRACT_EPSILON__ 0x1P-7HR_T_SIZE __INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAXFLASH_ACR_LATENCY_024_048MHZ 1__SQ_FBIT__ 31FLASH_WRPR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x20)UINT32_CINT_LEAST32_MIN (-INT_LEAST32_MAX - 1)I2C_CR1_DNF_SHIFT 8FLASH_RDP_L1 ((uint8_t)0xf0)__DEFINED_ptrdiff_t I2C_CR1_DNF_MASK 0xFFLASH_CR_PER (1 << 1)__UHQ_FBIT__ 16FLASH_OBR_NRST_STDBY (1 << 10)__FLT64_MIN_EXP__ (-1021)I2C_ISR_ARLO (1 << 9)__PTRDIFF_WIDTH__ 32RCC_CR2_HSI14DIS (1 << 2)RCC_CSR_V18PWRRSTF (1 << 23)__UINT_FAST8_MAX__ 0xffffffffUI2C_OAR1_OA1EN_ENABLE (0x1 << 15)UINT16_C(c) __UINT16_C(c)RCC_APB2ENR_ADCEN (1 << 9)rcc_set_i2c_clock_hsiRCC_CFGR_PLLMUL_MUL7 (0x05 << RCC_CFGR_PLLMUL_SHIFT)RCC_BDCR_LSEDRV_SHIFT 3__INT_FAST16_WIDTH__ 32I2C_OAR1_OA1EN_DISABLE (0x0 << 15)INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1__LLFRACT_MIN__ (-0.5LLR-0.5LLR)INT_FAST8_MAXRCC_CIR_HSERDYC (1 << 19)rcc_get_usart_clksel_freq__UINT_FAST16_MAX__ 0xffffffffUFLASH_OBR_RDPRT_SHIFT 1__INTPTR_MAX__ 0x7fffffffINT64_C(c) __INT64_C(c)RCC_CFGR2_PREDIV_DIV12 0xbRCC_CFGR3_USART2SW_SHIFT 16rcc_osc_ready_int_clear__GCC_IEC_559_COMPLEX 0I2C_CR1_NACKIE (1 << 4)__UFRACT_MIN__ 0.0URI2C1_TIMINGR I2C_TIMINGR(I2C1)__THUMB_INTERWORK__ 1rcc_set_pll_multiplication_factorWCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX___SYS_SIZE_T_H rcc_set_pllxtpreFLASH_ACR_PRFTBS (1 << 5)__UINT_LEAST8_TYPE__ unsigned charRCC_AHBENR_GPIOFEN (1 << 22)FLASH_CR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10)__ACCUM_FBIT__ 15__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17FLASH_OPTKEYR_KEY2 FLASH_KEYR_KEY2__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1I2C_TIEMOUTR_TIDLE_SCL_SDA_HIGH (0x1 << 12)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xNVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32__size_t__ I2C1_RXDR I2C_RXDR(I2C1)__UINTMAX_C(c) c ## ULLrcc_enable_rtc_clock__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed charI2C2_TXDR I2C_TXDR(I2C2)__GCC_ATOMIC_BOOL_LOCK_FREE 1BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON__RCC_CFGR_PPRE_MASK 0x7__FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____UINTMAX_TYPE__ long long unsigned int__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRI2C_CR2_SADD_7BIT_SHIFT 1shiftshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)_T_WCHAR BIT7 (1<<7)USART6_BASE (PERIPH_BASE_APB + 0x11400)__FLT32X_MIN_10_EXP__ (-307)_SIZE_T_DECLARED UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64USART2_BASE (PERIPH_BASE_APB + 0x4400)__UINT_FAST32_MAX__ 0xffffffffUI2C_OAR2(i2c_base) MMIO32((i2c_base) + 0x0c)__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4WINT_MIN __WINT_MIN__RCC_APB2RSTR_TIM15RST (1 << 16)RCC_APB2RSTR_USART8RST (1 << 7)RCC_CFGR2_PREDIV_DIV13 0xcRCC_BDCR_RTCEN (1 << 15)__SIZEOF_DOUBLE__ 8__ARM_NEONRCC_AHBRSTR_IOPERST (1 << 21)FLASH_OPTKEYR_KEY1 FLASH_KEYR_KEY1RCC_CFGR_MCO_SHIFT 24INFO_BASE (0x1ffff000U)TIM17_BASE (PERIPH_BASE_APB + 0x14800)BIT27 (1<<27)I2C_CR2_ADD10 (1 << 11)TIM7_BASE (PERIPH_BASE_APB + 0x1400)RCC_CFGR_MCO_LSE 3FLASH_OPTION_BYTE_0 FLASH_OPTION_BYTE(0)__UTA_FBIT__ 64usartRCC_CIR_LSERDYC (1 << 17)__FLT_DECIMAL_DIG__ 9__thumb__ 1RCC_LSILIBOPENCM3_MEMORYMAP_COMMON_H signed charuint8_tINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1I2C_TIMINGR_SCLH_SHIFT 8__INT64_C(c) c ## LL__FRACT_FBIT__ 15FLASH_CR2 MMIO32(FLASH_MEM_INTERFACE_BASE + 0x50)__LLACCUM_EPSILON__ 0x1P-31LLKRCC_CFGR2_PREDIV_DIV8 0x7__GNUC_PATCHLEVEL__ 1PTRDIFF_MINFLASH_OPTION_BYTE_4 FLASH_OPTION_BYTE(4)__UINT_LEAST16_MAX__ 0xffffRCC_AHBENR_DMA1EN (1 << 0)rcc_ahb_frequencyPPBI_BASE (0xE0000000U)__ARM_ARCH_PROFILE 77I2C_CR1_TXIE (1 << 1)RCC_AHBRSTR_IOPBRST (1 << 18)rcc_set_i2c_clock_sysclkGPIO_PORT_E_BASE (PERIPH_BASE_AHB2 + 0x1000)__FLT64_MAX_10_EXP__ 308GPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINI2C_CR1_RXDMAEN (1 << 15)RCC_APB1RSTR_CECRST (1 << 30)_BSD_SIZE_T_DEFINED_ I2C_CR1_ANFOFF (1 << 12)__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38_BSD_WCHAR_T___FRACT_MAX__ 0X7FFFP-15RPERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)RCC_CFGR_MCO_SYSCLK 4I2C_TIMINGR_PRESC_SHIFT 28__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5LIBOPENCM3_FLASH_H RCC_APB2ENR_USART8EN (1 << 7)__ARM_ARCH_EXT_IDIV__FLASH_OPTION_BYTE_3 FLASH_OPTION_BYTE(3)I2C_ICR_BERRCF (1 << 8)PERIPH_BASE_APB (PERIPH_BASE + 0x00000000)RCC_CFGR2_PREDIV_DIV3 0x2RCC_AHBENR_GPIODEN (1 << 20)RCC_CIR_PLLRDYF (1 << 4)RCC_CFGR2_PREDIV_DIV6 0x5__UINT16_MAX__ 0xffff__TQ_FBIT__ 127FLASH_KEYR_KEY1 ((uint32_t)0x45670123)RCC_CFGR_MCO_HSI 5TIM14_BASE (PERIPH_BASE_APB + 0x2000)__USQ_FBIT__ 32I2C_OAR1_OA1MODE_7BIT 0INT_FAST16_MINRCC_CSR_IWDGRSTF (1 << 29)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32RCC_APB1ENR_TIM2EN (1 << 0)_BoolRCC_APB1ENR_TIM7EN (1 << 5)SPI1_BASE (PERIPH_BASE_APB + 0x13000)INT_FAST32_MIN (-INT_FAST32_MAX - 1)RCC_CFGR_MCO_MASK 0xfCEC_BASE (PERIPH_BASE_APB + 0x7800)_SIZE_T_DEFINED_ rcc_get_usart_clk_freqFLASH_OBR_RAM_PARITY_CHECK (1 << 14)UINT_LEAST8_MAXRCC_CFGR_SW_HSI48 (3 << RCC_CFGR_SW_SHIFT)RCC_APB1ENR_PWREN (1 << 28)UINT8_C(c) __UINT8_C(c)RCC_CIR_HSIRDYIE (1 << 10)__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__I2C_CR2_NBYTES_SHIFT 16__USA_IBIT__ 16RCC_CSR MMIO32(RCC_BASE + 0x24)I2C_ICR_OVRCF (1 << 10)PTRDIFF_MIN (-PTRDIFF_MAX - 1)RCC_CFGR_MCOPRE_DIV16 (4 << RCC_CFGR_MCOPRE_SHIFT)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__DBL_IS_IEC_60559__ 2__UINT_FAST64_TYPE__ long long unsigned intTIM2_BASE (PERIPH_BASE_APB + 0x0000)RCC_CFGR_PLLMUL_MUL9 (0x07 << RCC_CFGR_PLLMUL_SHIFT)RCC_CFGR_PLLXTPRE (1<<17)RCC_CIR_HSI48RDYC (1 << 22)__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7I2C_ISR_STOPF (1 << 5)__FDPIC__RCC_CIR_HSI14RDYIE (1 << 13)RCC_BDCR_LSERDY (1 << 1)__UINT32_C(c) c ## UL__FLT32_IS_IEC_60559__ 2RCC_CFGR_HPRE_DIV64 (0xc << RCC_CFGR_HPRE_SHIFT)I2C_CR1_STOPIE (1 << 5)RCC_CSR_PINRSTF (1 << 26)INT_FAST64_MINFLASH_OBR_OPTERR (1 << 0)rcc_osc_ready_int_enablercc_set_prediv__LDBL_EPSILON__ 2.2204460492503131e-16L__USFRACT_MIN__ 0.0UHRTSC_BASE (PERIPH_BASE_AHB1 + 0x4000)RCC_CFGR_PLLMUL_MUL8 (0x06 << RCC_CFGR_PLLMUL_SHIFT)RCC_BDCR_RTCSEL_LSI (2 << RCC_BDCR_RTCSEL_SHIFT)I2C_OAR1(i2c_base) MMIO32((i2c_base) + 0x08)__UINT8_MAX__ 0xffRCC_CR2_HSI14ON (1 << 0)RCC_CFGR_HPRE_DIV8 (0xa << RCC_CFGR_HPRE_SHIFT)timer__LDBL_MAX_EXP__ 1024RCC_CIR_PLLRDYC (1 << 20)LIBOPENCM3_MEMORYMAP_H RCC_CFGR_HPRE_MASK 0xfRCC_APB1ENR_USBEN (1 << 23)__DBL_HAS_DENORM__ 1DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)I2C_OAR1_OA1_7BIT 0RCC_APB1RSTR_USBRST (1 << 23)__DA_FBIT__ 31BIT17 (1<<17)__GXX_ABI_VERSION 1017RCC_CFGR_PPRE_DIV16 (7 << RCC_CFGR_PPRE_SHIFT)__INT_LEAST16_MAX__ 0x7fff_T_WCHAR_ FLASH_CR_PG (1 << 0)__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LRCC_CFGR3_USART1SW_PCLK (0 << RCC_CFGR3_USART1SW_SHIFT)INT_LEAST32_MAX __INT_LEAST32_MAX__RCC_BDCR_LSEDRV_HIGH (3 << RCC_BDCR_LSEDRV_SHIFT)__INT_LEAST32_WIDTH__ 32INT_LEAST8_MAX __INT_LEAST8_MAX__rcc_osc_onUSART3_BASE (PERIPH_BASE_APB + 0x4800)RCC_CFGR_PLLXTPRE_HSE_CLK_DIV2 0x1___int_wchar_t_h __UACCUM_MIN__ 0.0UKRCC_CFGR3_USART3SW (3 << RCC_CFGR3_USART2SW_SHIFT)__FLT_EPSILON__ 1.1920928955078125e-7FI2C_TIMINGR_SCLL_MASK (0xFF << I2C_TIMINGR_SCLL_SHIFT)__GCC_ATOMIC_SHORT_LOCK_FREE 1FLASH_OPTION_BYTE_5 FLASH_OPTION_BYTE(5)FLASH_OPTION_BYTE_2 FLASH_OPTION_BYTE(2)__PTRDIFF_TYPE__ int__ARM_ARCH_ISA_THUMBRCC_CR_HSEON (1 << 16)RCC_CFGR_MCO_HSE 6I2C_CR1_TCIE (1 << 6)FLASH_OBR_RDPRT (3 << FLASH_OBR_RDPRT_SHIFT)__UACCUM_EPSILON__ 0x1P-16UK__ARM_FEATURE_MATMUL_INT8LIBOPENCM3_CM3_MEMORYMAP_H false 0RCC_APB1RSTR_USART5RST (1 << 20)rcc_set_pll_sourceI2C_OAR2_OA2MSK_OA2_7_OA2_6 (0x5 << 8)DBGMCU_BASE (PERIPH_BASE_APB + 0x15800)__USACCUM_FBIT__ 8__need_size_t__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1cm3_assert(expr) do { if (CM3_LIKELY(expr)) { (void)0; } else { cm3_assert_failed(); } } while (0)__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)rcc_get_i2c_clk_freqFLASH_ACR_LATENCY_1WS 1RCC_APB2RSTR_USART1RST (1 << 14)__FLT32_HAS_QUIET_NAN__ 1RCC_CFGR2_PREDIV_DIV11 0xaI2C_CR2_SADD_7BIT_MASK (0x7F << I2C_CR2_SADD_7BIT_SHIFT)RCC_CSR_OBLRSTF (1 << 25)RCC_CFGR_MCOPRE_DIV4 (2 << RCC_CFGR_MCOPRE_SHIFT)__LDBL_HAS_INFINITY__ 1RCC_CFGR_MCOPRE_DIV1 (0 << RCC_CFGR_MCOPRE_SHIFT)__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))I2C_CR1_WUPEN (1 << 18)__FLT32X_MAX_10_EXP__ 308FLASH_ACR_LATENCY_MASK 7I2C_ISR_DIR_WRITE (0x0 << 16)__ARM_PCS 1FLASH_OPTION_BYTE(i) MMIO16(INFO_BASE+0x0800 + (i)*2)RCC_CFGR_MCOPRE_DIV8 (3 << RCC_CFGR_MCOPRE_SHIFT)bool _Bool__size_t I2C_ISR_OVR (1 << 10)I2C_CR2_RD_WRN (1 << 10)RCC_APB2ENR_TIM15EN (1 << 16)UINTMAX_MAX __UINTMAX_MAX__RCC_CFGR_PLLMUL_MUL12 (0x0A << RCC_CFGR_PLLMUL_SHIFT)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffRCC_CFGR_PLLMUL_MUL15 (0x0D << RCC_CFGR_PLLMUL_SHIFT)rcc_set_rtc_clock_sourceBBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)RCC_CR_HSIRDY (1 << 1)INT16_MAX __INT16_MAX__I2C1_ISR I2C_ISR(I2C1)__FLT32X_IS_IEC_60559__ 2I2C_CR2_START (1 << 13)SYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXRCC_CFGR_SW_HSE (1 << RCC_CFGR_SW_SHIFT)rcc_css_int_flagPERIPH_BASE_AHB1 (PERIPH_BASE + 0x00020000)__INT_LEAST16_WIDTH__ 16RCC_CR_HSITRIM (0x1F << RCC_CR_HSITRIM_SHIFT)RCC_APB1RSTR_TIM14RST (1 << 8)__DEC_EVAL_METHOD__ 2FLASH_OBR_DATA1_SHIFT 24__ARM_FEATURE_FP16_FMLI2C1_PECR I2C_PECR(I2C1)INT16_MIN (-INT16_MAX - 1)_REG_BIT__USFRACT_EPSILON__ 0x1P-8UHRNULL ((void *)0)__SIZE_T __USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)RCC_CR2_HSI48RDY (1 << 17)rcc_clock_setup_in_hsi_out_48mhz_BSD_PTRDIFF_T_ RCC_AHBRSTR_IOPDRST (1 << 20)/build/libopencm3/lib/stm32/f0__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX__FLASH_AR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)__UINT32_MAX__ 0xffffffffUL__INT_LEAST8_MAX__ 0x7frcc_osc_ready_int_flag__ARM_FEATURE_IDIVRCC_HSE__ARM_FEATURE_COMPLEXDAC_BASE (PERIPH_BASE_APB + 0x7400)RCC_HSINULLRCC_CFGR2_PREDIV_DIV5 0x4FLASH_ACR_LATENCY_0WS 0TIM16_BASE (PERIPH_BASE_APB + 0x14400)RCC_CIR_LSERDYF (1 << 1)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024_SIZE_T_DEFINED __UINT_LEAST32_MAX__ 0xffffffffULFLASH_OBR_NBOOT0 (1 << 11)_STDDEF_H_ __DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__INT_LEAST64_WIDTH__ 64INT_FAST64_MIN (-INT_FAST64_MAX - 1)I2C1_CR1 I2C_CR1(I2C1)__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fINT_LEAST64_MAXBIT14 (1<<14)I2C1_CR2 I2C_CR2(I2C1)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intRCC_AHBRSTR_IOPARST (1 << 17)RCC_CR2_HSI14TRIM (31 << RCC_CR2_HSI14TRIM_SHIFT)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__rcc_css_int_clear_T_SIZE_ __FLT_EVAL_METHOD_TS_18661_3__ 0ST_VREFINT_CAL MMIO16(0x1FFFF7BA)__SCHAR_WIDTH__ 8rcc_apb2_frequency rcc_apb1_frequencyBIT18 (1<<18)UINT_FAST16_MAXFLASH_OBR_DATA1 (0xFF << FLASH_OBR_DATA1_SHIFT)FLASH_CR_STRT (1 << 6)__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32RCC_BDCR_RTCSEL_LSE (1 << RCC_BDCR_RTCSEL_SHIFT)__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)RCC_CFGR_HPRE_NODIV (0x0 << RCC_CFGR_HPRE_SHIFT)__INT32_MAX__ 0x7fffffffLST_TSENSE_CAL2_110C MMIO16(0x1FFFF7C2)UINTMAX_MAXRCC_CR2_HSI48ON (1 << 16)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLRCC_CIR_CSSC (1 << 23)rcc_clock_setup_in_hse_8mhz_out_48mhzRCC_BDCR_LSEDRV_LOW (0 << RCC_BDCR_LSEDRV_SHIFT)I2C_ICR_ARLOCF (1 << 9)FLASH_RDP_L2 ((uint8_t)0xcc)LIBOPENCM3_RCC_H RCC_APB1ENR_CRSEN (1 << 27)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32offsetof(TYPE,MEMBER) __builtin_offsetof (TYPE, MEMBER)__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C)RCC_CFGR_PLLMUL_MUL6 (0x04 << RCC_CFGR_PLLMUL_SHIFT)INT8_MAX __INT8_MAX__RCC_CSR_LSIRDY (1 << 1)BIT28 (1<<28)__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1RCC_CFGR3_USART3SW_SYSCLK (1 << RCC_CFGR3_USART2SW_SHIFT)I2C_CR1_PECEN (1 << 23)ADC_BASE (PERIPH_BASE_APB + 0x12400)RCC_CFGR_PPRE_DIV4 (5 << RCC_CFGR_PPRE_SHIFT)__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3I2C_OAR1_OA1MODE_10BIT 1UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0I2C_ICR_ALERTCF (1 << 13)RCC_CR_HSERDY (1 << 17)__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64I2C_RXDR(i2c_base) MMIO32((i2c_base) + 0x24)FLASH_CR_EOPIE (1 << 12)RCC_BDCR MMIO32(RCC_BASE + 0x20)UINTPTR_MAX_T_PTRDIFF_ _SIZET_ __LDBL_DENORM_MIN__ 4.9406564584124654e-324LRCC_APB1RSTR_WWDGRST (1 << 11)__INT64_MAX__ 0x7fffffffffffffffLLI2C_ICR_STOPCF (1 << 5)__ULLFRACT_IBIT__ 0RCC_CFGR_PLLMUL_SHIFT 18FLASH_OBR_RDPRT_L2 (3 << FLASH_OBR_RDPRT_SHIFT)rcc_wait_for_osc_readyRCC_CFGR_MCOPRE_DIV2 (1 << RCC_CFGR_MCOPRE_SHIFT)FLASH_OBR_WDG_SW (1 << 8)MMIO16(addr) (*(volatile uint16_t *)(addr))I2C_OAR2_OA2MSK_OA2_7_OA2_4 (0x3 << 8)RCC_APB2ENR_SPI1EN (1 << 12)RCC_CSR_LPWRRSTF (1 << 31)__GNUC__ 12RCC_CFGR_SW (3 << RCC_CFGR_SW_SHIFT)I2C_TIMINGR(i2c_base) MMIO32((i2c_base) + 0x10)WCHAR_MAXRCC_CFGR3_USBSW (1 << 7)__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16RCC_CFGR3_USART2SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0RCC_CFGR_SWS_SHIFT 2CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1rcc_is_osc_readyRCC_CIR_HSIRDYF (1 << 2)__ARM_ARCH 6RCC_LSE_SIZE_T_ __FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55rcc_css_enable__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXI2C_ISR_DIR_READ (0x1 << 16)rcc_apb1_frequency__wchar_t__ __LDBL_HAS_QUIET_NAN__ 1__need_NULLI2C2_PECR I2C_PECR(I2C2)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)RCC_APB1ENR_I2C2EN (1 << 22)_PTRDIFF_T RCC_CFGR_MCOPRE_SHIFT 28I2C_CR2_SADD_10BIT_MASK 0x3FF__UINT_FAST64_MAX__ 0xffffffffffffffffULLRCC_APB2RSTR MMIO32(RCC_BASE + 0x0c)__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1RCC_CIR_LSIRDYC (1 << 16)RCC_CFGR_MCO_LSI 2BIT9 (1<<9)FLASH_ACR_PRFTEN FLASH_ACR_PRFTBE__FLT32X_MIN__ 2.2250738585072014e-308F32xclkselINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024RCC_CFGR2_PREDIV_NODIV 0x0UINT16_MAXI2C2_TIMEOUTR I2C_TIMEOUTR(I2C2)RCC_APB1ENR_USART5EN (1 << 20)__FLT64_MIN__ 2.2250738585072014e-308F64RCC_APB1RSTR_USART4RST (1 << 19)__INTMAX_C(c) c ## LLRCC_CFGR3_USART2SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)RCC_APB1ENR_CANEN (1 << 25)RCC_CFGR_MCO_HSI48 8__ARM_ARCH_PROFILE__INT64_TYPE__ long long intI2C1_ICR I2C_ICR(I2C1)__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4RCC_CFGR_SWS_HSE (1 << RCC_CFGR_SWS_SHIFT)RCC_CFGR_PPRE_SHIFT 8I2C1 I2C1_BASERCC_CFGR3_USART3SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)RCC_BDCR_RTCSEL_NOCLK (0 << RCC_BDCR_RTCSEL_SHIFT)RCC_CR_HSION (1 << 0)__UFRACT_MAX__ 0XFFFFP-16URFLASH_OBR_RDPRT_L0 (0 << FLASH_OBR_RDPRT_SHIFT)RCC_APB1RSTR_TIM7RST (1 << 5)INT64_MAXI2C_CR2_NACK (1 << 15)__SFRACT_IBIT__ 0RCC_CFGR3 MMIO32(RCC_BASE + 0x30)I2C_ICR_TIMOUTCF (1 << 12)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__I2C_ISR_ADDR (1 << 3)RCC_CFGR3_USARTxSW_MASK 3SYS_TICK_BASE (SCS_BASE + 0x0010)_ANSI_STDDEF_H rcc_oscI2C_CR2_SADD_10BIT_SHIFT 0__USER_LABEL_PREFIX__ __ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)RCC_CFGR_PPRE_DIV2 (4 << RCC_CFGR_PPRE_SHIFT)SPI2_BASE (PERIPH_BASE_APB + 0x3800)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)I2C_OAR2_OA2MSK_OA2_7_OA2_2 (0x1 << 8)__INT_FAST32_TYPE__ intCRS_BASE (PERIPH_BASE_APB + 0x6C00)unsigned int__GCC_ASM_FLAG_OUTPUTS__LIBOPENCM3_FLASH_COMMON_F01_H __LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1RCC_APB1RSTR_DACRST (1 << 29)RCC_CIR_HSI14RDYF (1 << 5)FLASH_SR_EOP (1 << 5)RCC_CFGR_MCOPRE_DIV64 (6 << RCC_CFGR_MCOPRE_SHIFT)__USACCUM_IBIT__ 8RCC_CFGR3_USART3SW_SHIFT 18__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6_STDBOOL_H RCC_BDCR_RTCSEL_SHIFT 8_WCHAR_T_DECLARED rcc_system_clock_source__ARM_ASM_SYNTAX_UNIFIED____FLT_EVAL_METHOD__ 0__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__thumb2__LIBOPENCM3_RCC_COMMON_ALL_H RCC_BASE (PERIPH_BASE_AHB1 + 0x1000)__ARM_FEATURE_LDREX_T_PTRDIFF __UQQ_FBIT__ 8RCC_CFGR_HPRE_SHIFT 4INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4FLASH_OBR_RDPRT_L1 (1 << FLASH_OBR_RDPRT_SHIFT)__STDC__ 1I2C_ISR_NACKF (1 << 4)RCC_APB2RSTR_SYSCFGRST (1 << 0)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__RTC_BASE (PERIPH_BASE_APB + 0x2800)__UINT8_TYPE__ unsigned charI2C_ISR_TIMEOUT (1 << 12)RCC_AHBRSTR_TSCRST (1 << 24)RCC_AHBENR_GPIOCEN (1 << 19)rcc_css_disable__SIG_ATOMIC_TYPE__ intRCC_AHBENR_FLTFEN (1 << 4)UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINRCC_CFGR_HPRE_DIV512 (0xf << RCC_CFGR_HPRE_SHIFT)I2C_ICR_PECCF (1 << 11)I2C_CR2_AUTOEND (1 << 25)PERIPH_BASE (0x40000000U)true 1_PTRDIFF_T_DECLARED __USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)RCC_APB2ENR MMIO32(RCC_BASE + 0x18)__ULLFRACT_MIN__ 0.0ULLR__FLT32X_MIN_EXP__ (-1021)I2C_TIMINGR_SDADEL_SHIFT 16INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1RCC_CFGR_PLLMUL (0x0F << RCC_CFGR_PLLMUL_SHIFT)cm3_assert_not_reached() cm3_assert_failed()__LFRACT_EPSILON__ 0x1P-31LRrcc_disable_rtc_clockRCC_APB1ENR_I2C1EN (1 << 21)RCC_CR2_HSI14CAL (0xFF << RCC_CR2_HSI14CAL_SHIFT)rcc_usb_clock_source__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX____FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x_SIZE_T __arm__ 1RCC_CR MMIO32(RCC_BASE + 0x00)I2C_TXDR(i2c_base) MMIO32((i2c_base) + 0x28)RCC_CFGR_PLLMUL_MUL3 (0x01 << RCC_CFGR_PLLMUL_SHIFT)I2C_TIMEOUTR(i2c_base) MMIO32((i2c_base) + 0x14)__FLT32_MIN_10_EXP__ (-37)___int_size_t_h FLASH_CR_OPTPG (1 << 4)MMIO64(addr) (*(volatile uint64_t *)(addr))_WCHAR_T __ARM_FEATURE_BF16_VECTOR_ARITHMETIC__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LRCC_APB1RSTR_CANRST (1 << 25)INTPTR_MINRCC_AHBENR_DMAEN RCC_AHBENR_DMA1ENDESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)RCC_APB1RSTR_TIM2RST (1 << 0)RCC_CFGR_PLLMUL_MUL10 (0x08 << RCC_CFGR_PLLMUL_SHIFT)rcc_get_i2c_clocksFLASH_OBR_BOOT_SEL (1 << 15)RCC_CR2_HSI14RDY (1 << 1)RCC_CFGR2_PREDIV_DIV4 0x3FLASH_CR_OPTER (1 << 5)_WCHAR_T_H __WCHAR_T__ __ARM_FEATURE_QRDMXI2C_ISR_TXIS (1 << 1)__ARM_ARCH_ISA_THUMB 1DESIG_FLASH_SIZE_BASE (0x1FFFF7CCU)I2C_ICR_ADDRCF (1 << 3)__LONG_LONG_MAX__ 0x7fffffffffffffffLLpllxtpre__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__RCC_HSI14RCC_CFGR2_PREDIV 0xfBIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____ULACCUM_MIN__ 0.0ULK__SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)FLASH_OBR_VDDA_MONITOR (1 << 13)__LDBL_HAS_DENORM__ 1FLASH_ACR_LATENCY_000_024MHZ 0RCC_CIR_LSIRDYIE (1 << 8)INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1FLASH_KEYR_KEY2 ((uint32_t)0xcdef89ab)__FLT32_DIG__ 6INT_LEAST16_MAXTIM6_BASE (PERIPH_BASE_APB + 0x1000)BIT15 (1<<15)RCC_APB2RSTR_DBGMCURST (1 << 22)RCC_CIR_CSSF (1 << 7)_WCHAR_T_DEFINED_ BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7INT32_MAXrcc_set_sysclk_sourceRCC_BDCR_BDRST (1 << 16)__ACCUM_MIN__ (-0X1P15K-0X1P15K)I2C2_CR2 I2C_CR2(I2C2)I2C2_OAR2 I2C_OAR2(I2C2)RCC_CFGR3_USART1SW_HSI (3 << RCC_CFGR3_USART1SW_SHIFT)__ARM_FEATURE_CRYPTOI2C_CR1(i2c_base) MMIO32((i2c_base) + 0x00)I2C_OAR2_OA2EN (1 << 15)__INT_LEAST32_TYPE__ long intI2C_TIMINGR_SCLDEL_SHIFT 20RCC_CFGR_PLLNODIV (1 << 31)RCC_CFGR_PLLSRC (1<<16)RCC_AHBENR_DMA2EN (1 << 1)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0__ATOMIC_ACQUIRE 2RCC_CIR_HSI48RDYF (1 << 6)UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2FLASH_ACR_LATENCY_SHIFT 0BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234RCC_CFGR3_USART1SW_LSE (2 << RCC_CFGR3_USART1SW_SHIFT)BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)__FLT_NORM_MAX__ 3.4028234663852886e+38FUSART1_BASE (PERIPH_BASE_APB + 0x13800)long long unsigned intRCC_BDCR_RTCSEL_HSE (3 << RCC_BDCR_RTCSEL_SHIFT)__FLT_MIN_10_EXP__ (-37)GPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)RCC_AHBENR_GPIOAEN (1 << 17)__ULACCUM_IBIT__ 32RCC_AHBENR_GPIOEEN (1 << 21)__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__ULLACCUM_EPSILON__ 0x1P-32ULLKRCC_CFGR_PPRE_NODIV (0 << RCC_CFGR_PPRE_SHIFT)__APCS_32__ 1__DQ_FBIT__ 63FLASH_SR_PGERR (1 << 2)EXTI_BASE (PERIPH_BASE_APB + 0x10400)__SACCUM_IBIT__ 8I2C_CR1_GCEN (1 << 19)RCC_CR_HSITRIM_SHIFT 3__UHQ_IBIT__ 0INT_LEAST8_MINRCC_CR2_HSI14CAL_SHIFT 8BIT29 (1<<29)RCC_CFGR_SWS (3 << RCC_CFGR_SWS_SHIFT)__INT_FAST16_TYPE__ intRCC_CFGR_ADCPRE (1<<14)USART7_BASE (PERIPH_BASE_APB + 0x11800)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRRCC_AHBRSTR_IOPCRST (1 << 19)__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intI2C_ISR_TXE (1 << 0)RCC_CIR_HSERDYIE (1 << 11)__FLT32X_DIG__ 15RCC_CFGR_HPRE_DIV128 (0xd << RCC_CFGR_HPRE_SHIFT)RCC_APB1RSTR_CRSRST (1 << 27)__UTQ_FBIT__ 128RCC_APB2ENR_TIM17EN (1 << 18)FLASH_SR_BSY (1 << 0)__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffRCC_APB1ENR_TIM3EN (1 << 1)DMA2_BASE (PERIPH_BASE_AHB1 + 0x0400)PTRDIFF_MAX __PTRDIFF_MAX__RCC_CFGR2_PREDIV_DIV16 0xfRCC_CFGR_PLLMUL_MUL14 (0x0C << RCC_CFGR_PLLMUL_SHIFT)RCC_CR_PLLRDY (1 << 25)FLASH_OBR_NRST_STOP (1 << 9)I2C_OAR1_OA1MODE (1 << 10)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKFLASH_RDP_L0 ((uint8_t)0xaa)_STDDEF_H RCC_CFGR3_USART2SW (3 << RCC_CFGR3_USART2SW_SHIFT)I2C_ICR(i2c_base) MMIO32((i2c_base) + 0x1C)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULR__DEFINED_size_t RCC_CFGR_PLLMUL_MUL5 (0x03 << RCC_CFGR_PLLMUL_SHIFT)RCC_AHBRSTR MMIO32(RCC_BASE + 0x28)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intRCC_APB2RSTR_USART7RST (1 << 6)I2C_ISR_BERR (1 << 8)RCC_CFGR_SW_HSI (0 << RCC_CFGR_SW_SHIFT)rcc_clock_setup_in_hsi48_out_48mhzRCC_CFGR3_I2C1SW (1 << 4)WCHAR_MIN_BSD_SIZE_T_ DMA1_BASE DMA_BASEFLASH_AR2 MMIO32(FLASH_MEM_INTERFACE_BASE + 0x54)pllsrcRCC_CFGR3_ADCSW (1 << 8)BEGIN_DECLS rcc.cI2C_TIMINGR_SCLH_MASK (0xFF << I2C_TIMINGR_SCLH_SHIFT)_REG_BIT(base,bit) (((base) << 5) + (bit))RCC_APB2RSTR_TIM1RST (1 << 11)RCC_APB2RSTR_SPI1RST (1 << 12)USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)___int_ptrdiff_t_h RCC_HSI48I2C2_OAR1 I2C_OAR1(I2C2)__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__INT_WCHAR_T_H __FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)RCC_CFGR3_USART1SW (3 << RCC_CFGR3_USART1SW_SHIFT)RCC_CR2 MMIO32(RCC_BASE + 0x34)__ARM_EABI__ 1INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1_GCC_WCHAR_T RCC_CR_HSICAL (0xFF << RCC_CR_HSICAL_SHIFT)RCC_CIR_HSERDYF (1 << 3)RCC_APB1RSTR_TIM6RST (1 << 4)_BSD_WCHAR_T_ RCC_CFGR_SWS_HSI48 (3 << RCC_CFGR_SWS_SHIFT)__QQ_IBIT__ 0_WCHAR_T_ RCC_CR_PLLON (1 << 24)DESIG_UNIQUE_ID_BASE (0x1FFFF7ACU)__LLACCUM_FBIT__ 31RCC_APB2ENR_USART6EN (1 << 5)RCC_BDCR_RTCSEL (3 << RCC_BDCR_RTCSEL_SHIFT)__USQ_IBIT__ 0__UINT_LEAST32_TYPE__ long unsigned intRCC_CFGR_SW_PLL (2 << RCC_CFGR_SW_SHIFT)RCC_APB2ENR_USART7EN (1 << 6)__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 1RCC_APB2RSTR_TIM17RST (1 << 18)STM32F0 1INTMAX_MAXDEBUG_BASE (SCS_BASE + 0x0DF0)RCC_APB1ENR_SPI2EN (1 << 14)RCC_PLLI2C_CR1_SMBDEN (1 << 21)__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1I2C_CR2(i2c_base) MMIO32((i2c_base) + 0x04)INT_FAST32_MINI2C_TIEMOUTR_TIDLE_SCL_LOW (0x0 << 12)__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_C_PTRDIFF_T_ RCC_APB1ENR_WWDGEN (1 << 11)INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intUINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRI2C2_ISR I2C_ISR(I2C2)I2C_TIMINGR_SCLDEL_MASK (0xF << I2C_TIMINGR_SCLDEL_SHIFT)I2C_CR2_PECBYTE (1 << 26)__ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned intuint16_tI2C2_BASE (PERIPH_BASE_APB + 0x5800)__LACCUM_IBIT__ 32GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sections__LDBL_MIN_10_EXP__ (-307)RCC_CFGR3_USART1SW_SHIFT 0RCC_APB2ENR_TIM16EN (1 << 17)RCC_APB1RSTR_I2C1RST (1 << 21)FLASH_KEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x04)__LONG_MAX__ 0x7fffffffLTIM15_BASE (PERIPH_BASE_APB + 0x14000)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16RCC_CFGR_PLLSRC_HSE_CLK 0x1I2C2_TIMINGR I2C_TIMINGR(I2C2)FLASH_BASE (0x08000000U)CORESIGHT_LAR_OFFSET 0xfb0I2C_CR2_RELOAD (1 << 24)RCC_BDCR_LSEON (1 << 0)FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x2000)short intRCC_AHBENR_GPIOBEN (1 << 18)rcc_get_spi_clk_freq__UINT16_C(c) cBIT31 (1<<31)__UDA_IBIT__ 32I2C_CR1_NOSTRETCH (1 << 17)__FLT_HAS_INFINITY__ 1UINT_LEAST32_MAXBIT2 (1<<2)RCC_CFGR_MCOPRE_DIV128 (7 << RCC_CFGR_MCOPRE_SHIFT)__ATOMIC_RELAXED 0_GCC_PTRDIFF_T __ARM_FEATURE_COPROCRCC_APB1ENR_DACEN (1 << 29)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53RCC_BDCR_LSEBYP (1 << 2)RCC_APB1RSTR_SPI2RST (1 << 14)BIT5 (1<<5)cm3_assert_failedBIT1 (1<<1)USART4_BASE (PERIPH_BASE_APB + 0x4C00)INT8_CINT_LEAST32_MAXflash_set_ws__USES_INITFINI__ 1RCC_CFGR_HPRE (0xf << RCC_CFGR_HPRE_SHIFT)I2C2_CR1 I2C_CR1(I2C2)I2C_CR1_RXIE (1 << 2)__need_ptrdiff_tI2C2_RXDR I2C_RXDR(I2C2)__DBL_DECIMAL_DIG__ 17FLASH_OBR_DATA0_SHIFT 16BIT8 (1<<8)RCC_CFGR3_USART3SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)__ULACCUM_FBIT__ 32INT16_C(c) __INT16_C(c)_WCHAR_T_DEFINED FLASH_CR_MER (1 << 2)RCC_CFGR2 MMIO32(RCC_BASE + 0x2c)__INT16_MAX__ 0x7fffRCC_APB1RSTR_USART3RST (1 << 18)RCC_APB2ENR_DBGMCUEN (1 << 22)__INT_WIDTH__ 32RCC_CR_HSEBYP (1 << 18)__QQ_FBIT__ 7POWER_CONTROL_BASE (PERIPH_BASE_APB + 0x7000)__SIG_ATOMIC_WIDTH__ 32I2C_OAR2_OA2MSK_OA2_7_OA2_5 (0x4 << 8)__FLT64_EPSILON__ 2.2204460492503131e-16F64RCC_CFGR3_USART3SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)RCC_CFGR2_PREDIV_DIV2 0x1__DEFINED_wchar_t I2C_ICR_NACKCF (1 << 4)__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32I2C_TIMINGR_PRESC_MASK (0xF << 28)RCC_CFGR MMIO32(RCC_BASE + 0x04)__ULLFRACT_EPSILON__ 0x1P-64ULLRRCC_CR2_HSI48CAL (0xFF << RCC_CR2_HSI48CAL_SHIFT)__SIZEOF_WINT_T__ 4__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17RCC_AHBENR_CRCEN (1 << 6)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1RCC_BDCR_LSEDRV (3 << RCC_BDCR_LSEDRV_SHIFT)__FLT32X_HAS_DENORM__ 1FLASH_OPTION_BYTE_1 FLASH_OPTION_BYTE(1)__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32rcc_set_hpre__TA_IBIT__ 64FLASH_SR2 MMIO32(FLASH_MEM_INTERFACE_BASE + 0x4C)rcc_get_timer_clk_freqRCC_CFGR_PPRE (7 << RCC_CFGR_PPRE_SHIFT)RCC_CFGR_MCOPRE (7 << RCC_CFGR_MCOPRE_SHIFT)RCC_CFGR_PLLMUL_MUL11 (0x09 << RCC_CFGR_PLLMUL_SHIFT)FLASH_CR_OBL_LAUNCH (1 << 13)I2C_OAR2_OA2MSK_NO_MASK (0x0 << 8)FLASH_CR_LOCK (1 << 7)__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODRCC_APB2RSTR_ADCRST (1 << 9)I2C_CR1_ADDRIE (1 << 3)_GCC_SIZE_T I2C_ISR_TC (1 << 6)LIBOPENCM3_CM3_ASSERT_H RCC_CFGR_SWS_PLL (2 << RCC_CFGR_SWS_SHIFT)I2C_CR1_ERRIE (1 << 7)rcc_osc_ready_int_disableRCC_CFGR_PLLMUL_MUL16 (0x0E << RCC_CFGR_PLLMUL_SHIFT)I2C_OAR2_OA2MSK_OA2_7 (0x6 << 8)__GCC_CONSTRUCTIVE_SIZE 64RCC_CSR_PORRSTF (1 << 27)__LLFRACT_IBIT__ 0uint32_tBIT12 (1<<12)FLASH_OBR_NBOOT1 (1 << 12)RCC_CFGR_PLLMUL_MUL2 (0x00 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB1ENR_USART4EN (1 << 19)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HKRCC_CIR_HSI14RDYC (1 << 21)I2C_ISR_ALERT (1 << 13)RCC_CFGR_SW_SHIFT 0RCC_CFGR2_PREDIV_DIV10 0x9I2C_CR1_PE (1 << 0)__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8RCC_CSR_WWDGRSTF (1 << 30)RCC_APB1RSTR_I2C2RST (1 << 22)__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXI2C_ISR_RXNE (1 << 2)BIT16 (1<<16)rcc_set_ppre__WINT_MIN__ 0UINT_LEAST16_MINI2C1_TXDR I2C_TXDR(I2C1)__FLT64_DIG__ 15FLASH_CR_ERRIE (1 << 10)RCC_APB2ENR_TIM1EN (1 << 11)__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8I2C_OAR2_OA2MSK_NO_CMP (0x7 << 8)RCC_CFGR3_USART1SW_SYSCLK (1 << RCC_CFGR3_USART1SW_SHIFT)__INT_LEAST16_TYPE__ short intRCC_AHBENR_TSCEN (1 << 24)__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_C__LDBL_MAX_10_EXP__ 308RCC_CFGR_PLLXTPRE_HSE_CLK 0x0RCC_CFGR_PPRE_DIV8 (6 << RCC_CFGR_PPRE_SHIFT)INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1GPIO_PORT_D_BASE (PERIPH_BASE_AHB2 + 0x0C00)RCC_CFGR_HPRE_DIV2 (0x8 << RCC_CFGR_HPRE_SHIFT)__HQ_FBIT__ 15__bool_true_false_are_defined 1RCC_APB1ENR_USART3EN (1 << 18)RCC_APB1RSTR MMIO32(RCC_BASE + 0x10)BIT26 (1<<26)__SIZE_MAX__ 0xffffffffURCC_CFGR_MCO_HSI14 1__ARM_FEATURE_SATI2C_CR1_TXDMAEN (1 << 14)I2C_OAR1_OA1 (1 << 10)__ARM_ARCHINTMAX_C(c) __INTMAX_C(c)rcc_get_div_from_hpre__STRICT_ANSI__ 1RCC_CIR_HSI48RDYIE (1 << 14)I2C_CR2_NBYTES_MASK (0xFF << I2C_CR2_NBYTES_SHIFT)I2C_TIMINGR_SCLL_SHIFT 0I2C_CR1_SBC (1 << 16)RCC_CFGR_SWS_HSI (0 << RCC_CFGR_SWS_SHIFT)INT_LEAST64_MINPTRDIFF_MAXhpreFLASH_ACR_PRFTBE (1 << 4)I2C_TIEMOUTR_TIMOUTEN (1 << 15)ST_TSENSE_CAL1_30C MMIO16(0x1FFFF7B8)__LLFRACT_EPSILON__ 0x1P-63LLRRCC_APB2RSTR_USART6RST (1 << 5)__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53RCC_CFGR_MCO_PLL 7__WCHAR_WIDTH__ 32predivI2C1_OAR2 I2C_OAR2(I2C1)WINT_MAX__INT16_C(c) cRCC_APB1ENR_USART2EN (1 << 17)INT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32rcc_set_usbclk_source__USFRACT_IBIT__ 0RCC_AHBENR MMIO32(RCC_BASE + 0x14)I2C2_ICR I2C_ICR(I2C2)RCC_CR_HSICAL_SHIFT 8__ATOMIC_ACQ_REL 4I2C1_OAR1 I2C_OAR1(I2C1)RCC_CFGR_PLLSRC0 (1<<15)__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)I2C_CR1_SMBHEN (1 << 20)RCC_CFGR3_CECSW (1 << 6)__ULLFRACT_FBIT__ 64I2C_ISR_TCR (1 << 7)RCC_CR_CSSON (1 << 19)RCC_CFGR_MCO_NOCLK 0__FLT32_NORM_MAX__ 3.4028234663852886e+38F32I2C1_BASE (PERIPH_BASE_APB + 0x5400)UINT64_C(c) __UINT64_C(c)RCC_CFGR3_USART2SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)RCC_APB2RSTR_TIM16RST (1 << 17)RCC_CFGR_HPRE_DIV256 (0xe << RCC_CFGR_HPRE_SHIFT)__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0I2C_ISR(i2c_base) MMIO32((i2c_base) + 0x18)RCC_APB1RSTR_PWRRST (1 << 28)INT_FAST16_MAXRCC_AHBRSTR_IOPFRST (1 << 22)I2C_ISR_PECERR (1 << 11)__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long intI2C_TIMINGR_SDADEL_MASK (0xF << I2C_TIMINGR_SDADEL_SHIFT)IWDG_BASE (PERIPH_BASE_APB + 0x3000)__ARM_FEATURE_CDE_COPROCppreGCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| PD„Ž<AŽ<AŽXAŽ<A„ŽTBŽA„ŽTAŽLAŽHBŽ$D4C„ŽtA„…†ŽdA„ŽDA„Ž<B„ŽHB„ŽA+aeabi!6S-MM ñÿ P$<$$8$$8$$8$$8$$$$D!!$ !$D!##$ #$8#%%$%&&$&''$''$D'))$ )**$*++$+,,$<,--$-..$.//$/00$011$122$233$0355$566$677$788$899$d9;;$X;==$8=??$,?AA$ACC$0CEE$EG$GH$HIKLNPRnp$$$$$$!!$##TVXZ\^`bdfhjlr'N°âDx¬ Ú Ev qt ®ÄÖGéHû<)<BX\<s…–T§¾T!ÉL#Õ%ä&ôH' $) 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0x6000)RCC_HSI48__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)RCC_CFGR3_USART1SW (3 << RCC_CFGR3_USART1SW_SHIFT)RCC_CR2 MMIO32(RCC_BASE + 0x34)__FLT32_MIN__ 1.1754943508222875e-38F32RCC_APB2RSTR_SPI1RST (1 << 12)INT16_MININTPTR_MIN__FLT_IS_IEC_60559__ 2__THUMBEL__ 1RCC_CR_HSICAL (0xFF << RCC_CR_HSICAL_SHIFT)RCC_CIR_HSERDYF (1 << 3)rcc_osc_bypass_disableUSART6_BASE (PERIPH_BASE_APB + 0x11400)RST_CEC__QQ_IBIT__ 0_RCC_BITRST_CAN1RCC_CR_PLLON (1 << 24)DESIG_UNIQUE_ID_BASE (0x1FFFF7ACU)__LLACCUM_FBIT__ 31RCC_APB2ENR_USART6EN (1 << 5)__UINTMAX_TYPE__ long long unsigned int__FLT_MAX_10_EXP__ 38RCC_BDCR_RTCSEL (3 << RCC_BDCR_RTCSEL_SHIFT)__GNUC_MINOR__ 2__UINT_LEAST32_TYPE__ long unsigned intRCC_CFGR_SW_PLL (2 << RCC_CFGR_SW_SHIFT)RCC_APB2ENR_USART7EN (1 << 6)__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 1_RCC_BIT(i) (1 << ((i) & 0x1f))RCC_APB2RSTR_TIM17RST (1 << 18)STM32F0 1INT_LEAST8_MININTMAX_MAXRST_DACrcc_peripheral_resetRCC_APB1ENR_SPI2EN (1 << 14)RCC_PLLRCC_WWDG__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__LFRACT_MIN__ (-0.5LR-0.5LR)__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_C_REG_BIT(base,bit) (((base) << 5) + (bit))RCC_APB1ENR_WWDGEN (1 << 11)INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intUINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRRCC_CFGR_PPRE_DIV8 (6 << RCC_CFGR_PPRE_SHIFT)__ARM_ARCH_6M__ 1RCC_CAN__UINT64_TYPE__ long long unsigned intGNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sections__LDBL_MIN_10_EXP__ (-307)RCC_CFGR3_USART1SW_SHIFT 0RCC_APB2ENR_TIM16EN (1 << 17)RCC_APB1RSTR_I2C1RST (1 << 21)__LDBL_MIN__ 2.2250738585072014e-308LTIM15_BASE (PERIPH_BASE_APB + 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7POWER_CONTROL_BASE (PERIPH_BASE_APB + 0x7000)__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64RCC_CFGR3_USART3SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)RCC_CFGR2_PREDIV_DIV2 0x1__UTA_IBIT__ 64RCC_CFGR MMIO32(RCC_BASE + 0x04)__ULLFRACT_EPSILON__ 0x1P-64ULLR__UINT_LEAST32_MAX__ 0xffffffffUL__SIZEOF_WINT_T__ 4__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17RCC_CFGR3_USART2SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)RCC_AHBENR_CRCEN (1 << 6)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1RCC_USART1__FLT32X_HAS_DENORM__ 1__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1__SIZEOF_SIZE_T__ 4RCC_I2C1RCC_I2C2RCC_USART8RCC_CFGR_MCOPRE (7 << RCC_CFGR_MCOPRE_SHIFT)RCC_CFGR_PLLMUL_MUL11 (0x09 << RCC_CFGR_PLLMUL_SHIFT)__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODRCC_APB2RSTR_ADCRST (1 << 9)RST_I2C1__ULLFRACT_MIN__ 0.0ULLRRCC_CFGR_SWS_PLL (2 << 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((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1RST_TIM1UINTMAX_CRST_TIM3RCC_CFGR_PLLXTPRE_HSE_CLK 0x0RST_TIM6INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1RCC_CFGR_HPRE_DIV2 (0x8 << RCC_CFGR_HPRE_SHIFT)__HQ_FBIT__ 15__bool_true_false_are_defined 1RCC_APB1ENR_USART3EN (1 << 18)RCC_APB1RSTR MMIO32(RCC_BASE + 0x10)BIT26 (1<<26)__SIZE_MAX__ 0xffffffffURCC_CFGR_MCO_HSI14 1__ARM_FEATURE_SAT__ARM_ARCHRCC_AHBRSTR_IOPCRST (1 << 19)__LONG_MAX__ 0x7fffffffLrcc_get_div_from_hpreRCC_APB2RSTR_TIM1RST (1 << 11)RCC_CIR_HSI48RDYIE (1 << 14)__PTRDIFF_TYPE__ intINT_LEAST64_MINPTRDIFF_MAXRCC_CFGR_PLLMUL_SHIFT 18ST_TSENSE_CAL1_30C MMIO16(0x1FFFF7B8)__LLFRACT_EPSILON__ 0x1P-63LLRRCC_APB2RSTR_USART6RST (1 << 5)__SFRACT_MAX__ 0X7FP-7HR__FLT32X_MANT_DIG__ 53RCC_CFGR_MCO_PLL 7__ARM_ASM_SYNTAX_UNIFIED__WINT_MAX__INT16_C(c) cRCC_APB1ENR_USART2EN (1 << 17)INT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32RCC_USART2RCC_USART3RCC_USART4RCC_USART5RCC_USART6RCC_USART7RST_USART1RST_USART2RST_USART3RST_USART4RCC_CFGR_PLLSRC0 (1<<15)__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)RCC_CR_CSSON (1 << 19)RST_PWRRCC_CFGR_MCO_NOCLK 0__FLT32_NORM_MAX__ 3.4028234663852886e+38F32RST_WWDGI2C1_BASE (PERIPH_BASE_APB + 0x5400)UINT64_C(c) __UINT64_C(c)RCC_DBGMCURCC_APB2RSTR_TIM16RST (1 << 17)RCC_CFGR_HPRE_DIV256 (0xe << RCC_CFGR_HPRE_SHIFT)__UINTMAX_MAX__ 0xffffffffffffffffULL__INT_MAX__ 0x7fffffff__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0RCC_APB1RSTR_PWRRST (1 << 28)INT_FAST16_MAXRCC_AHBRSTR_IOPFRST (1 << 22)__ARM_EABI__ 1__INT_LEAST64_TYPE__ long long intIWDG_BASE (PERIPH_BASE_APB + 0x3000)RCC_DAC__ARM_FEATURE_CDE_COPROCRST_ADC1UINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| A„ŽA„Ž(,A+aeabi!6S-MM ñÿ "$68&(*,.024:?p¡Ó8l9<š¶ Óè4 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ÜÌ;Ýhá'{âñƒã«äþ2å?~æSç=PíÀUñÔDòæróôkõ®Iöb÷‚øšùG!úQyûÉühýcþ•ÿ×€–)„¾K…ª*†³€‡<ˆ™F‰¯r‹¨Œç`º‚Ž"é@dt’æb“ä7”Â3•¯b—1l˜†d™²(šÔ{›˜Zœ¸XžE¢Ì£°s¤É2¥9¦©\§tQ¨æ©7ª>«±T¬ó_¸18¾Ti©Z2 œû ../common/usr/lib/gcc/arm-none-eabi/12.2.1/include../../../include/libopencm3/stm32/common../../../include/libopencm3/stm32/f0../../../include/libopencm3/stm32../../../include/libopencm3/cm3spi_common_all.cstdint.hrcc_common_all.hrcc.hspi.hcommon.hstdbool.hmemorymap.hmemorymap.hmemorymap.hspi.hspi_common_v2.hspi_common_all.hrcc.hÅ [ %/f õ! /ƒ"!!!—" " <0 # 1 > 0²!Â 1!Ô 1 !èH8H 8 1 !ü! =‹ !/š" = =ª" = =¸! =Ã !/Ò !/á! =ì !/ø! =… !/“# 0" /¦! =´ !/¿! /Ê! /Ù2 !!!!ì! /÷! /ƒ! /! /›! /§! /²! /½! /È! /Ó! /Þ! /é! /÷! /†! /•! / ! /¯! /º! /Î!2 !! !RCC_APB2ENR_SYSCFGCOMPEN (1 << 0)RCC_AHBENR_GPIODEN (1 << 20)SCB_BASE (SCS_BASE + 0x0D00)__FLT64_EPSILON__ 2.2204460492503131e-16F64SPI_I2SCFGR_DATLEN_LSB 1RCC_APB1ENR_CECEN (1 << 30)RCC_CIR_LSERDYIE (1 << 9)RCC_CFGR2_PREDIV_DIV15 0xe__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64CORESIGHT_LSR_SLK (1<<1)RCC_CIR_LSIRDYF (1 << 0)__CHAR_UNSIGNED__ 1RCC_CSR_LSION (1 << 0)RCC_CR_HSIRDY (1 << 1)__SFRACT_FBIT__ 7RCC_BDCR_LSEDRV_MEDHI (2 << RCC_BDCR_LSEDRV_SHIFT)SPI_CR2_DS_14BIT (0xD << 8)__FLT64_HAS_INFINITY__ 1rcc_periph_reset_pulseRCC_APB1ENR MMIO32(RCC_BASE + 0x1c)__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffffSPI2_RXCRCR SPI_RXCRCR(SPI2_BASE)__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)TIM1_BASE (PERIPH_BASE_APB + 0x12C00)__INTMAX_MAX__ 0x7fffffffffffffffLLRCC_APB1ENR_TIM6EN (1 << 4)__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17RCC_CSR_RMVF (1 << 24)WINT_MIN __WINT_MIN__INT_FAST64_MAXSPI1_I2SCFGR SPI_I2SCFGR(SPI1_BASE)__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffUSPI2_DR SPI_DR(SPI2_BASE)__ACCUM_MIN__ (-0X1P15K-0X1P15K)__ARM_FEATURE_QBITRCC_CFGR2_PREDIV_DIV14 0xdSPI_CR2_DS_12BIT (0xB << 8)RCC_CR2_HSI48CAL_SHIFT 24INT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8spi_enable_rx_dma__DBL_MAX_10_EXP__ 308__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__USACCUM_MAX__ 0XFFFFP-8UHKspi_xfer__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0rcc_periph_rst__SIZE_TYPE__ unsigned intSPI_CR1_BR_FPCLK_DIV_8 0x2RCC_CIR_PLLRDYIE (1 << 12)spi_set_bidirectional_mode__INT8_TYPE__ signed char__ARM_ARCH_PROFILE 77__USACCUM_MIN__ 0.0UHKGPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)__FLT32_DECIMAL_DIG__ 9__DECIMAL_DIG__ 17__LDBL_MIN_EXP__ (-1021)UINTPTR_MAX __UINTPTR_MAX____LDBL_MANT_DIG__ 53SPI_SR_CRCERR (1 << 4)INT64_MIN (-INT64_MAX - 1)WWDG_BASE (PERIPH_BASE_APB + 0x2c00)__UINT8_C(c) c__INT16_TYPE__ short int__FLT64_MAX__ 1.7976931348623157e+308F64SPI_CR1_RXONLY (1 << 10)RCC_CFGR3_USART2SW_SYSCLK (1 << RCC_CFGR3_USART2SW_SHIFT)UINT_FAST32_MAXSPI_I2SCFGR_I2SCFG_MASTER_RECEIVE 0x3RCC_AHBENR_TSCEN (1 << 24)SPI_I2SPR_ODD (1 << 8)INT_FAST64_MAX __INT_FAST64_MAX__RCC_CR2_HSI14TRIM_SHIFT 3RCC_BDCR_LSEDRV_SHIFT 3RCC_CIR_HSI14RDYIE (1 << 13)__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64RCC_CFGR_PLLMUL_MUL13 (0x0B << RCC_CFGR_PLLMUL_SHIFT)RCC_CSR_SFTRSTF (1 << 28)USART5_BASE (PERIPH_BASE_APB + 0x5000)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intGPIO_PORT_C_BASE (PERIPH_BASE_AHB2 + 0x0800)INT32_MIN (-INT32_MAX - 1)spi_set_clock_phase_1__FLT32_MAX_10_EXP__ 38RCC_CSR_V18PWRRSTF (1 << 23)RCC_CIR MMIO32(RCC_BASE + 0x08)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZSPI_CR1_BAUDRATE_FPCLK_DIV_8 (0x02 << 3)__UINTPTR_MAX__ 0xffffffffU__FLT32_MIN_EXP__ (-125)SPI_CR2_LDMA_TX (1 << 14)RCC_CIR_HSIRDYC (1 << 18)RCC_CFGR2_PREDIV_DIV7 0x6SPI_I2SCFGR_I2SCFG_LSB 8SPI_CR1_BR_FPCLK_DIV_128 0x6UINT32_MAX __UINT32_MAX__TIM3_BASE (PERIPH_BASE_APB + 0x0400)RCC_AHBENR_DMA2EN (1 << 1)RCC_CFGR2 MMIO32(RCC_BASE + 0x2c)__WCHAR_WIDTH__ 32spi_disable_rx_buffer_not_empty_interruptRCC_APB2ENR_USART1EN (1 << 14)__FLT64_MIN_10_EXP__ (-307)RCC_APB1ENR_TIM14EN (1 << 8)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__RCC_CFGR_HPRE_DIV16 (0xb << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_HPRE_DIV4 (0x9 << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_MCOPRE_DIV32 (5 << RCC_CFGR_MCOPRE_SHIFT)SPI_CR2_DS_15BIT (0xE << 8)__SFRACT_EPSILON__ 0x1P-7HRSPI_CR2_DS_4BIT (0x3 << 8)__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAX__SQ_FBIT__ 31RST_SYSCFGINT_LEAST32_MIN (-INT_LEAST32_MAX - 1)SPI_I2SPR_MCKOE (1 << 9)SPI3_CR1 SPI_CR1(SPI3_BASE)__UHQ_FBIT__ 16__FLT64_MIN_EXP__ (-1021)spi_writeINT_FAST8_MAXLIBOPENCM3_RCC_H __UINT_FAST8_MAX__ 0xffffffffURCC_APB2ENR_TIM15EN (1 << 16)UINT16_C(c) __UINT16_C(c)RCC_APB2ENR_ADCEN (1 << 9)__LACCUM_IBIT__ 32RCC_CFGR_PLLMUL_MUL7 (0x05 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB1ENR_USART5EN (1 << 20)__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"LIBOPENCM3_RCC_COMMON_ALL_H __VFP_FP__ 1SPI_CR1_BAUDRATE_FPCLK_DIV_128 (0x06 << 3)__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__INTPTR_MAX__ 0x7fffffffRCC_CIR_HSERDYC (1 << 19)__UINT_FAST16_MAX__ 0xffffffffUINT64_C(c) __INT64_C(c)RCC_CFGR2_PREDIV_DIV12 0xbSPI_I2SCFGR_I2SSTD_LSB_JUSTIFIED 0x2RCC_CFGR3_USART2SW_SHIFT 16SPI_I2SCFGR_I2SSTD_I2S_PHILIPS 0x0__GCC_IEC_559_COMPLEX 0__UFRACT_MIN__ 0.0URSPI4 SPI4_BASEspi_disableWCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__GPIO_PORT_D_BASE (PERIPH_BASE_AHB2 + 0x0C00)__UINT_LEAST8_TYPE__ unsigned charRCC_AHBENR_GPIOFEN (1 << 22)SPI_DR(spi_base) MMIO32((spi_base) + 0x0c)spi_set_bidirectional_transmit_only_mode__ACCUM_FBIT__ 15RCC_APB1ENR_CRSEN (1 << 27)__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1__FLT32X_EPSILON__ 2.2204460492503131e-16F32xSPI_I2SCFGR_PCMSYNC (1 << 7)NVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 1RCC_CFGR3_USARTxSW_MASK 3BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON__RCC_CFGR_PPRE_MASK 0x7__FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)GPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)USART2_BASE (PERIPH_BASE_APB + 0x4400)__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4RCC_APB2RSTR_TIM15RST (1 << 16)SPI_CR1_MSBFIRST (0 << 7)RCC_APB2RSTR_USART8RST (1 << 7)RCC_CFGR2_PREDIV_DIV13 0xc__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32RCC_AHBRSTR_IOPERST (1 << 21)RCC_CFGR2_PREDIV_DIV11 0xaSPI_I2SCFGR_DATLEN_32BIT 0x2spi_disable_software_slave_managementINFO_BASE (0x1ffff000U)TIM17_BASE (PERIPH_BASE_APB + 0x14800)SPI_CR2_RXNEIE (1 << 6)BIT27 (1<<27)TIM7_BASE (PERIPH_BASE_APB + 0x1400)RST_CRSDBGMCU_BASE (PERIPH_BASE_APB + 0x15800)SPI_DR8(spi_base) MMIO8((spi_base) + 0x0c)SPI_CR2_DS_8BIT (0x7 << 8)__UTA_FBIT__ 64INTMAX_C(c) __INTMAX_C(c)RCC_CIR_LSERDYC (1 << 17)__FLT_DECIMAL_DIG__ 9LIBOPENCM3_MEMORYMAP_COMMON_H spi_disable_rx_dmasigned charSPI_SR_BSY (1 << 7)uint8_tINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)SPI3_I2SCFGR SPI_I2SCFGR(SPI3_BASE)__GNUC_STDC_INLINE__ 1__INT64_C(c) c ## LL__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLKRCC_CFGR2_PREDIV_DIV8 0x7__GNUC_PATCHLEVEL__ 1PTRDIFF_MIN__UINT_LEAST16_MAX__ 0xffffRCC_CFGR_MCO_SHIFT 24PPBI_BASE (0xE0000000U)RCC_BDCR_RTCEN (1 << 15)RCC_CR2_HSI48ON (1 << 16)RCC_AHBRSTR_IOPBRST (1 << 18)GPIO_PORT_E_BASE (PERIPH_BASE_AHB2 + 0x1000)__FLT64_MAX_10_EXP__ 308GPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINSPI_CR1_LSBFIRST (1 << 7)__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38spi_set_full_duplex_modeSPI_CR2_DS_13BIT (0xC << 8)__FRACT_MAX__ 0X7FFFP-15RPERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)UINTMAX_CSPI1_DR SPI_DR(SPI1_BASE)__INT_FAST32_MAX__ 0x7fffffffLIBOPENCM3_SPI_H RCC_APB2ENR_USART8EN (1 << 7)__ARM_ARCH_EXT_IDIV__SPI_SR_TXE (1 << 1)PERIPH_BASE_APB (PERIPH_BASE + 0x00000000)RCC_CFGR2_PREDIV_DIV3 0x2SPI_I2SCFGR_DATLEN_24BIT 0x1__UACCUM_MIN__ 0.0UKRCC_CFGR2_PREDIV_DIV6 0x5__UINT16_MAX__ 0xffff__UINT32_C(c) c ## UL__TQ_FBIT__ 127RCC_CFGR_MCO_HSI 5__SHRT_MAX__ 0x7fffTIM14_BASE (PERIPH_BASE_APB + 0x2000)__USQ_FBIT__ 32spi_peripheralINT_FAST16_MINSPI_SR_UDR (1 << 3)RCC_CSR_IWDGRSTF (1 << 29)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32RCC_APB1ENR_TIM2EN (1 << 0)RCC_APB1ENR_TIM7EN (1 << 5)SPI1_BASE (PERIPH_BASE_APB + 0x13000)INT_FAST32_MIN (-INT_FAST32_MAX - 1)RCC_CFGR_MCO_MASK 0xfCEC_BASE (PERIPH_BASE_APB + 0x7800)RCC_CFGR2_PREDIV_DIV9 0x8USART8_BASE (PERIPH_BASE_APB + 0x11C00)UINT_LEAST8_MAXRCC_CFGR_SW_HSI48 (3 << RCC_CFGR_SW_SHIFT)RCC_APB1ENR_PWREN (1 << 28)UINT8_C(c) __UINT8_C(c)RCC_CIR_HSIRDYIE (1 << 10)__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE (0 << 1)__USA_IBIT__ 16RCC_CFGR_MCO_HSI48 8PTRDIFF_MIN (-PTRDIFF_MAX - 1)RCC_CFGR_MCOPRE_DIV16 (4 << RCC_CFGR_MCOPRE_SHIFT)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__DBL_IS_IEC_60559__ 2__UINT_FAST64_TYPE__ long long unsigned intTIM2_BASE (PERIPH_BASE_APB + 0x0000)SPI_CR1_BIDIOE (1 << 14)RCC_CFGR_PLLXTPRE (1<<17)RCC_CIR_HSI48RDYC (1 << 22)__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC__RST_GPIOARST_GPIOBRST_GPIOCRST_GPIODRST_GPIOERST_GPIOFRCC_CFGR_HPRE_DIV64 (0xc << RCC_CFGR_HPRE_SHIFT)SPI_I2SCFGR(spi_base) MMIO32((spi_base) + 0x1c)SPI_I2SCFGR_I2SE (1 << 10)INT_FAST64_MIN__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16L__USFRACT_MIN__ 0.0UHRTSC_BASE (PERIPH_BASE_AHB1 + 0x4000)RCC_CFGR_PLLMUL_MUL8 (0x06 << RCC_CFGR_PLLMUL_SHIFT)__ARM_NEONSPI_CR1_CRCL (1 << 11)__UINT8_MAX__ 0xffSPI_I2SCFGR_DATLEN_16BIT 0x0RCC_CFGR_HPRE_DIV8 (0xa << RCC_CFGR_HPRE_SHIFT)__LDBL_MAX_EXP__ 1024RCC_CIR_PLLRDYC (1 << 20)LIBOPENCM3_MEMORYMAP_H SPI_CR2_DS_MASK (0xF << 8)LIBOPENCM3_SPI_COMMON_ALL_H RCC_APB1ENR_USBEN (1 << 23)SPI_CR2_FRF_TI_MODE (1 << 4)__DBL_HAS_DENORM__ 1DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)SPI_CR2_FRF_MOTOROLA_MODE (0 << 4)RCC_APB1RSTR_USBRST (1 << 23)SPI_CR2_SSOE (1 << 2)__DA_FBIT__ 31__GXX_ABI_VERSION 1017RCC_CFGR_PPRE_DIV16 (7 << RCC_CFGR_PPRE_SHIFT)__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LRCC_CFGR3_USART1SW_PCLK (0 << RCC_CFGR3_USART1SW_SHIFT)INT_LEAST32_MAX __INT_LEAST32_MAX__SPI_CR2_DS_10BIT (0x9 << 8)RCC_BDCR_LSEDRV_HIGH (3 << RCC_BDCR_LSEDRV_SHIFT)__LDBL_MAX_10_EXP__ 308INT_LEAST8_MAX __INT_LEAST8_MAX__RCC_CFGR2_PREDIV_DIV16 0xfUSART3_BASE (PERIPH_BASE_APB + 0x4800)RCC_CFGR_PLLXTPRE_HSE_CLK_DIV2 0x1RCC_CSR_RESET_FLAGS (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF | RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF | RCC_CSR_PINRSTF | RCC_CSR_OBLRSTF)spi_set_receive_only_modeRCC_CFGR3_USART3SW (3 << RCC_CFGR3_USART2SW_SHIFT)spi_set_next_tx_from_crc__FLT_EPSILON__ 1.1920928955078125e-7FRST_ADCRCC_APB2RSTR_USART6RST (1 << 5)__ARM_ARCH_ISA_THUMBRCC_CR_HSEON (1 << 16)RCC_CFGR_MCO_HSE 6SPI_CR1_BIDIMODE (1 << 15)__UACCUM_EPSILON__ 0x1P-16UK__ARM_FEATURE_MATMUL_INT8RCC_CFGR_PLLSRC_HSI_CLK_DIV2 0x0__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0RCC_APB1RSTR_USART5RST (1 << 20)__ATOMIC_ACQ_REL 4spi_enable_software_slave_management__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1__ELF__ 1SCS_BASE (PPBI_BASE + 0xE000)TIM16_BASE (PERIPH_BASE_APB + 0x14400)RCC_APB2RSTR_USART1RST (1 << 14)SPI_CR1_BR_FPCLK_DIV_256 0x7__FLT32_HAS_QUIET_NAN__ 1RCC_BDCR_RTCSEL_LSI (2 << RCC_BDCR_RTCSEL_SHIFT)SPI3_TXCRCR SPI_TXCRCR(SPI3_BASE)RCC_CSR_OBLRSTF (1 << 25)SPI_SR_FRLVL_HALF_FIFO (0x2 << 9)__LDBL_HAS_INFINITY__ 1RCC_CFGR_MCOPRE_DIV1 (0 << RCC_CFGR_MCOPRE_SHIFT)__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308spi_set_nss_high__ARM_PCS 1RCC_CFGR_MCOPRE_DIV8 (3 << RCC_CFGR_MCOPRE_SHIFT)bool _BoolSPI_CR1_BAUDRATE_FPCLK_DIV_32 (0x04 << 3)UINTMAX_MAX __UINTMAX_MAX__RCC_CFGR_PLLMUL_MUL12 (0x0A << RCC_CFGR_PLLMUL_SHIFT)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)spi_set_baudrate_prescaler__UINT_LEAST8_MAX__ 0xffRCC_CFGR_PLLMUL_MUL15 (0x0D << RCC_CFGR_PLLMUL_SHIFT)BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)SPI3_RXCRCR SPI_RXCRCR(SPI3_BASE)INT16_MAX __INT16_MAX__RCC_CFGR_MCO_SYSCLK 4spi_disable_error_interruptSPI2_CR2 SPI_CR2(SPI2_BASE)__FLT32X_IS_IEC_60559__ 2SYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXRCC_CFGR_SW_HSE (1 << RCC_CFGR_SW_SHIFT)spi_clean_disable__INT_LEAST16_WIDTH__ 16__ULFRACT_FBIT__ 32RCC_APB1RSTR_TIM14RST (1 << 8)__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLRCC_BDCR_LSERDY (1 << 1)INT16_MIN (-INT16_MAX - 1)_REG_BIT__USFRACT_EPSILON__ 0x1P-8UHRspi_set_unidirectional_mode__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)RCC_CR2_HSI48RDY (1 << 17)SPI_CR2_LDMA_RX (1 << 13)RCC_AHBRSTR_IOPDRST (1 << 20)/build/libopencm3/lib/stm32/f0__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffUL__INT_LEAST8_MAX__ 0x7fRCC_CFGR3_CECSW (1 << 6)__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXDAC_BASE (PERIPH_BASE_APB + 0x7400)SPI_CR2_DS_6BIT (0x5 << 8)RST_TIM14RCC_CIR_LSERDYF (1 << 1)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024spi_set_standard_mode__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1RCC_CR_HSICAL_SHIFT 8SPI_CR1_CPHA_CLK_TRANSITION_1 (0 << 0)__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fRST_I2C2BIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intRCC_APB1RSTR_TIM2RST (1 << 0)RCC_CR2_HSI14TRIM (31 << RCC_CR2_HSI14TRIM_SHIFT)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__SPI_CR2_FRF (1 << 4)INT_FAST32_MINSPI2_TXCRCR SPI_TXCRCR(SPI2_BASE)__FLT_EVAL_METHOD_TS_18661_3__ 0RCC_CFGR3_USBSW (1 << 7)ST_VREFINT_CAL MMIO16(0x1FFFF7BA)__SCHAR_WIDTH__ 8rcc_apb2_frequency rcc_apb1_frequencyBIT18 (1<<18)UINT_FAST16_MAXspi_disable_tx_buffer_empty_interrupt__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32RCC_BDCR_RTCSEL_LSE (1 << RCC_BDCR_RTCSEL_SHIFT)__FRACT_EPSILON__ 0x1P-15RSPI_I2SCFGR_I2SCFG_SLAVE_RECEIVE 0x1BIT24 (1<<24)RCC_CFGR_HPRE_NODIV (0x0 << RCC_CFGR_HPRE_SHIFT)__INT32_MAX__ 0x7fffffffLST_TSENSE_CAL2_110C MMIO16(0x1FFFF7C2)SPI_I2SCFGR_I2SSTD_MSB_JUSTIFIED 0x1UINTMAX_MAXEXTI_BASE (PERIPH_BASE_APB + 0x10400)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLRCC_CIR_CSSC (1 << 23)__ARM_FEATURE_BF16_VECTOR_ARITHMETICRCC_AHBENR MMIO32(RCC_BASE + 0x14)SPI_CR1_BR_FPCLK_DIV_4 0x1DEBUG_BASE (SCS_BASE + 0x0DF0)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__RCC_CFGR_PLLMUL_MUL6 (0x04 << RCC_CFGR_PLLMUL_SHIFT)INT8_MAX __INT8_MAX__RCC_CSR_LSIRDY (1 << 1)BIT28 (1<<28)__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1RCC_CFGR3_USART3SW_SYSCLK (1 << RCC_CFGR3_USART2SW_SHIFT)ADC_BASE (PERIPH_BASE_APB + 0x12400)RCC_CFGR_PPRE_DIV4 (5 << RCC_CFGR_PPRE_SHIFT)__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24__LACCUM_FBIT__ 31SPI2_I2SCFGR SPI_I2SCFGR(SPI2_BASE)RCC_CR_HSERDY (1 << 17)__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64RCC_BDCR MMIO32(RCC_BASE + 0x20)UINTPTR_MAXSPI_I2SCFGR_I2SCFG_MASTER_TRANSMIT 0x2RCC_CR2_HSI14DIS (1 << 2)__LDBL_DENORM_MIN__ 4.9406564584124654e-324LRCC_APB1RSTR_WWDGRST (1 << 11)__INT64_MAX__ 0x7fffffffffffffffLLRCC_APB1ENR_USART2EN (1 << 17)SPI3_DR SPI_DR(SPI3_BASE)SPI_CR2_DS_11BIT (0xA << 8)__ULLFRACT_IBIT__ 0RCC_CFGR_HPRE (0xf << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_MCOPRE_DIV2 (1 << RCC_CFGR_MCOPRE_SHIFT)MMIO16(addr) (*(volatile uint16_t *)(addr))RCC_CFGR_PLLMUL_MUL4 (0x02 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB2ENR_SPI1EN (1 << 12)SPI_SR_FTLVL_HALF_FIFO (0x2 << 11)RCC_CSR_LPWRRSTF (1 << 31)__GNUC__ 12RCC_CFGR_SW (3 << RCC_CFGR_SW_SHIFT)SPI1_DR8 SPI_DR8(SPI1_BASE)WCHAR_MAXSPI_SR_FTLVL_QUARTER_FIFO (0x1 << 11)__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16RCC_CFGR3_USART2SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0RCC_CFGR_SWS_SHIFT 2CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1spi_enable_tx_dma__ULACCUM_MIN__ 0.0ULKRCC_CIR_HSIRDYF (1 << 2)__ARM_ARCH 6RCC_APB1RSTR_CECRST (1 << 30)SPI_CRCPR(spi_base) MMIO32((spi_base) + 0x10)__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXRCC_CFGR_PLLMUL_MUL16 (0x0E << RCC_CFGR_PLLMUL_SHIFT)RCC_CIR_HSI48RDYF (1 << 6)__LDBL_HAS_QUIET_NAN__ 1SPI2_DR8 SPI_DR8(SPI2_BASE)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)RCC_APB1ENR_I2C2EN (1 << 22)RCC_CFGR_MCOPRE_SHIFT 28__UINT_FAST64_MAX__ 0xffffffffffffffffULLRCC_APB2RSTR MMIO32(RCC_BASE + 0x0c)__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1RCC_CIR_LSIRDYC (1 << 16)RCC_CFGR_MCO_LSI 2BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024RCC_CFGR2_PREDIV_NODIV 0x0UINT16_MAXSPI_I2SPR(spi_base) MMIO32((spi_base) + 0x20)__FLT64_MIN__ 2.2250738585072014e-308F64RCC_APB1RSTR_USART4RST (1 << 19)__INTMAX_C(c) c ## LLRST_BDCRRCC_APB1ENR_CANEN (1 << 25)__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4RCC_CFGR_SWS_HSE (1 << RCC_CFGR_SWS_SHIFT)SPI_CR1_SPE (1 << 6)SPI_CR1_SSM (1 << 9)RCC_CFGR_PPRE_SHIFT 8RCC_CSR_PINRSTF (1 << 26)RCC_CFGR3_USART3SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)RCC_BDCR_RTCSEL_NOCLK (0 << RCC_BDCR_RTCSEL_SHIFT)RCC_CR_HSION (1 << 0)__UFRACT_MAX__ 0XFFFFP-16URRCC_APB1RSTR_TIM7RST (1 << 5)INT64_MAX__UHA_FBIT__ 8spi_enable_ss_output__SFRACT_IBIT__ 0RCC_CFGR3 MMIO32(RCC_BASE + 0x30)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__RST_TIM15RST_TIM16RST_TIM17SYS_TICK_BASE (SCS_BASE + 0x0010)SPI_CR1_CRCL_16BIT (1 << 11)__USER_LABEL_PREFIX__ __ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)RCC_CFGR_PPRE_DIV2 (4 << RCC_CFGR_PPRE_SHIFT)SPI2_BASE (PERIPH_BASE_APB + 0x3800)spi_set_bidirectional_receive_only_modeRCC_CFGR2_PREDIV_DIV5 0x4__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)SPI_CR1_BAUDRATE_FPCLK_DIV_64 (0x05 << 3)__INT_FAST32_TYPE__ intspi_set_next_tx_from_bufferCRS_BASE (PERIPH_BASE_APB + 0x6C00)__ATOMIC_SEQ_CST 5SPI1_TXCRCR SPI_TXCRCR(SPI1_BASE)__GCC_ASM_FLAG_OUTPUTS__SPI_CR1_MSTR (1 << 2)__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1RCC_APB1RSTR_DACRST (1 << 29)RCC_CIR_HSI14RDYF (1 << 5)RCC_CFGR_MCOPRE_DIV64 (6 << RCC_CFGR_MCOPRE_SHIFT)__USACCUM_IBIT__ 8RCC_CFGR3_USART3SW_SHIFT 18__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6_STDBOOL_H RCC_BDCR_RTCSEL_SHIFT 8SPI2_CR1 SPI_CR1(SPI2_BASE)__FLT_EVAL_METHOD__ 0unsigned int__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__thumb2__RCC_CR_PLLON (1 << 24)RCC_BASE (PERIPH_BASE_AHB1 + 0x1000)__ARM_FEATURE_LDREX__UQQ_FBIT__ 8RCC_CFGR_HPRE_SHIFT 4INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX__RCC_CFGR_PLLMUL (0x0F << RCC_CFGR_PLLMUL_SHIFT)__LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4spi_enable_crc__STDC__ 1RCC_APB2RSTR_SYSCFGRST (1 << 0)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__RTC_BASE (PERIPH_BASE_APB + 0x2800)__UINT8_TYPE__ unsigned charSPI_I2SCFGR_I2SCFG_SLAVE_TRANSMIT 0x0SPI_CR1_CRCEN (1 << 13)RCC_AHBENR_GPIOCEN (1 << 19)__SIG_ATOMIC_TYPE__ intRCC_AHBENR_FLTFEN (1 << 4)UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MIN__ORDER_PDP_ENDIAN__ 3412RCC_CFGR_HPRE_DIV512 (0xf << RCC_CFGR_HPRE_SHIFT)SPI2_I2SPR SPI_I2SPR(SPI2_BASE)PERIPH_BASE (0x40000000U)true 1spi_send__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)RCC_AHBRSTR_IOPARST (1 << 17)RCC_APB2ENR MMIO32(RCC_BASE + 0x18)__FLT32X_MIN_EXP__ (-1021)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1SPI_CR1(spi_base) MMIO32((spi_base) + 0x00)RCC_CR_CSSON (1 << 19)__LFRACT_EPSILON__ 0x1P-31LRRCC_APB1ENR_I2C1EN (1 << 21)RCC_CR2_HSI14CAL (0xFF << RCC_CR2_HSI14CAL_SHIFT)SPI_SR_OVR (1 << 6)__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX__SPI_SR_FRLVL_FIFO_FULL (0x3 << 9)__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1RCC_CR MMIO32(RCC_BASE + 0x00)RCC_CFGR_PLLMUL_MUL3 (0x01 << RCC_CFGR_PLLMUL_SHIFT)__FLT32_MIN_10_EXP__ (-37)SPI2 SPI2_BASEMMIO64(addr) (*(volatile uint64_t *)(addr))__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LRCC_APB1RSTR_CANRST (1 << 25)INTPTR_MINSPI_I2SCFGR_I2SSTD_LSB 4DESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)RCC_CFGR_SWS_HSI (0 << RCC_CFGR_SWS_SHIFT)RCC_CFGR_PLLMUL_MUL10 (0x08 << RCC_CFGR_PLLMUL_SHIFT)__TA_IBIT__ 64SPI_CR2_TXDMAEN (1 << 1)RST_CANSPI_CR2_DS_16BIT (0xF << 8)SPI_CR2_DS_7BIT (0x6 << 8)RCC_CR2_HSI14RDY (1 << 1)__SACCUM_IBIT__ 8__ARM_FEATURE_QRDMX__ARM_ARCH_ISA_THUMB 1DESIG_FLASH_SIZE_BASE (0x1FFFF7CCU)__LDBL_HAS_DENORM__ 1__LONG_LONG_MAX__ 0x7fffffffffffffffLLRCC_AHBENR_DMA1EN (1 << 0)__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__RST_TSCRCC_CFGR2_PREDIV 0xfBIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)spi_disable_crcRCC_CIR_LSIRDYIE (1 << 8)INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1SPI2_CRCPR SPI_CRCPR(SPI2_BASE)__FLT32_DIG__ 6SPI_CR1_CPHA (1 << 0)INT_LEAST16_MAXSPI1_SR SPI_SR(SPI1_BASE)TIM6_BASE (PERIPH_BASE_APB + 0x1000)BIT15 (1<<15)RCC_APB2RSTR_DBGMCURST (1 << 22)RCC_CFGR_MCO_LSE 3SPI_SR_FTLVL_FIFO_FULL (0x3 << 11)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7INT32_MAXRCC_BDCR_BDRST (1 << 16)__UINT64_C(c) c ## ULLRCC_CFGR_HPRE_MASK 0xfRCC_CFGR3_USART1SW_HSI (3 << RCC_CFGR3_USART1SW_SHIFT)__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intRCC_CFGR_PLLNODIV (1 << 31)RCC_CFGR_PLLSRC (1<<16)RST_DBGMCUBIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2RCC_APB2ENR_DBGMCUEN (1 << 22)BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)__FLT_NORM_MAX__ 3.4028234663852886e+38FUSART1_BASE (PERIPH_BASE_APB + 0x13800)RCC_CFGR3_USART1SW_LSE (2 << RCC_CFGR3_USART1SW_SHIFT)long long unsigned intRCC_BDCR_RTCSEL_HSE (3 << RCC_BDCR_RTCSEL_SHIFT)__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)RCC_AHBENR_GPIOAEN (1 << 17)__ULACCUM_IBIT__ 32RCC_AHBENR_GPIOEEN (1 << 21)../common/spi_common_all.c__LDBL_IS_IEC_60559__ 2__ULLACCUM_EPSILON__ 0x1P-32ULLKRCC_CFGR_PPRE_NODIV (0 << RCC_CFGR_PPRE_SHIFT)__APCS_32__ 1__DQ_FBIT__ 63SPI_CR1_BAUDRATE_FPCLK_DIV_2 (0x00 << 3)INT_LEAST64_MAXuint16_treg32RCC_CR_HSITRIM_SHIFT 3__UHQ_IBIT__ 0INT_LEAST8_MINRCC_CR2_HSI14CAL_SHIFT 8RCC_CFGR_MCOPRE_DIV4 (2 << RCC_CFGR_MCOPRE_SHIFT)BIT29 (1<<29)RCC_CFGR_SWS (3 << RCC_CFGR_SWS_SHIFT)__INT_FAST16_TYPE__ intRCC_CFGR_ADCPRE (1<<14)USART7_BASE (PERIPH_BASE_APB + 0x11800)SPI1 SPI1_BASEINT64_CRST_SPI1RST_SPI2__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intRCC_CIR_HSERDYIE (1 << 11)__FLT32X_DIG__ 15RCC_CFGR_HPRE_DIV128 (0xd << RCC_CFGR_HPRE_SHIFT)SPI_I2SCFGR_CHLEN (1 << 0)SPI3_DR8 SPI_DR8(SPI3_BASE)SPI3_CRCPR SPI_CRCPR(SPI3_BASE)__UTQ_FBIT__ 128RCC_APB2ENR_TIM17EN (1 << 18)spi_send_lsb_firstSPI_CR1_BAUDRATE_FPCLK_DIV_4 (0x01 << 3)__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffSPI6 SPI6_BASERCC_APB1ENR_TIM3EN (1 << 1)DMA2_BASE (PERIPH_BASE_AHB1 + 0x0400)PTRDIFF_MAX __PTRDIFF_MAX__RCC_CR2_HSI14ON (1 << 0)SPI_CR1_BR_FPCLK_DIV_2 0x0RCC_CFGR_PLLMUL_MUL14 (0x0C << RCC_CFGR_PLLMUL_SHIFT)SPI_CR2_DS_5BIT (0x4 << 8)RCC_CR_PLLRDY (1 << 25)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKRCC_CFGR_SWS_HSI48 (3 << RCC_CFGR_SWS_SHIFT)RCC_CFGR3_USART2SW (3 << RCC_CFGR3_USART2SW_SHIFT)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRPERIPH_BASE_AHB1 (PERIPH_BASE + 0x00020000)RCC_CFGR_PLLMUL_MUL5 (0x03 << RCC_CFGR_PLLMUL_SHIFT)RCC_AHBRSTR MMIO32(RCC_BASE + 0x28)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intRCC_APB2RSTR_USART7RST (1 << 6)SPI_CR2_FRXTH (1 << 12)RCC_AHBENR_SRAMEN (1 << 2)RCC_CFGR_SW_HSI (0 << RCC_CFGR_SW_SHIFT)SPI_SR_MODF (1 << 5)RCC_CFGR3_I2C1SW (1 << 4)WCHAR_MINDMA1_BASE DMA_BASERCC_CFGR3_ADCSW (1 << 8)BEGIN_DECLS RST_TIM2RCC_APB2RSTR_TIM1RST (1 << 11)RCC_APB2RSTR_SPI1RST (1 << 12)USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)SPI1_CR2 SPI_CR2(SPI1_BASE)SPI1_RXCRCR SPI_RXCRCR(SPI1_BASE)RCC_CSR MMIO32(RCC_BASE + 0x24)spi_set_slave_mode__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__LLFRACT_EPSILON__ 0x1P-63LLR__FLT32X_MAX__ 1.7976931348623157e+308F32xspi_set_nss_lowRCC_CFGR3_USART1SW (3 << RCC_CFGR3_USART1SW_SHIFT)RCC_CR2 MMIO32(RCC_BASE + 0x34)SPI_CR1_CPOL_CLK_TO_1_WHEN_IDLE (1 << 1)__FLT32_MIN__ 1.1754943508222875e-38F32INT16_MINspi_disable_tx_dma__FLT_IS_IEC_60559__ 2__THUMBEL__ 1RCC_CR_HSICAL (0xFF << RCC_CR_HSICAL_SHIFT)RCC_CIR_HSERDYF (1 << 3)RCC_APB1RSTR_TIM6RST (1 << 4)USART6_BASE (PERIPH_BASE_APB + 0x11400)RST_CEC__QQ_IBIT__ 0RST_CAN1SPI_CR1_BAUDRATE_FPCLK_DIV_16 (0x03 << 3)DESIG_UNIQUE_ID_BASE (0x1FFFF7ACU)__LLACCUM_FBIT__ 31RCC_APB2ENR_USART6EN (1 << 5)__UINTMAX_TYPE__ long long unsigned intRCC_BDCR_RTCSEL (3 << RCC_BDCR_RTCSEL_SHIFT)__USQ_IBIT__ 0SPI_SR_FRLVL_QUARTER_FIFO (0x1 << 9)__UINT_LEAST32_TYPE__ long unsigned intRCC_CFGR_SW_PLL (2 << RCC_CFGR_SW_SHIFT)RCC_APB2ENR_USART7EN (1 << 6)__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long intRCC_CIR_PLLRDYF (1 << 4)__GCC_ATOMIC_INT_LOCK_FREE 1RCC_APB1RSTR_CRSRST (1 << 27)RCC_APB2RSTR_TIM17RST (1 << 18)STM32F0 1RCC_APB1RSTR_USART2RST (1 << 17)INTMAX_MAXRST_DACSPI_CR1_CRCNEXT (1 << 12)RCC_CIR_CSSF (1 << 7)__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHKspi_enable_error_interrupt__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CSPI2_SR SPI_SR(SPI2_BASE)_REG_BIT(base,bit) (((base) << 5) + (bit))RCC_APB1ENR_WWDGEN (1 << 11)INT64_MINSPI_CR2_ERRIE (1 << 5)__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intINT_FAST64_MIN (-INT_FAST64_MAX - 1)UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRRCC_CFGR_PPRE_DIV8 (6 << RCC_CFGR_PPRE_SHIFT)RCC_CR_HSITRIM (0x1F << RCC_CR_HSITRIM_SHIFT)__SIZEOF_SIZE_T__ 4RCC_CFGR2_PREDIV_DIV4 0x3__UINT64_TYPE__ long long unsigned intI2C2_BASE (PERIPH_BASE_APB + 0x5800)GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sections__LDBL_MIN_10_EXP__ (-307)RCC_CFGR3_USART1SW_SHIFT 0RCC_APB2ENR_TIM16EN (1 << 17)RCC_APB1RSTR_I2C1RST (1 << 21)RCC_APB1ENR_SPI2EN (1 << 14)__LDBL_MIN__ 2.2250738585072014e-308LTIM15_BASE (PERIPH_BASE_APB + 0x14000)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16RCC_CFGR_PLLSRC_HSE_CLK 0x1FLASH_BASE (0x08000000U)CORESIGHT_LAR_OFFSET 0xfb0RCC_BDCR_LSEON (1 << 0)SPI_CR1_BR_FPCLK_DIV_16 0x3FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x2000)short intRCC_AHBENR_GPIOBEN (1 << 18)__FLT32_IS_IEC_60559__ 2__UINT16_C(c) cSPI_SR_RXNE (1 << 0)__UDA_IBIT__ 32modeRCC_APB1RSTR_I2C2RST (1 << 22)UINT_LEAST32_MAXBIT2 (1<<2)RCC_CFGR_MCOPRE_DIV128 (7 << RCC_CFGR_MCOPRE_SHIFT)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCRCC_APB1ENR_DACEN (1 << 29)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53RCC_BDCR_LSEBYP (1 << 2)RCC_APB1RSTR_SPI2RST (1 << 14)BIT5 (1<<5)BIT1 (1<<1)USART4_BASE (PERIPH_BASE_APB + 0x4C00)INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1SPI_RXCRCR(spi_base) MMIO32((spi_base) + 0x14)SPI_CR1_BIDIMODE_1LINE_BIDIR (1 << 15)__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__DBL_DECIMAL_DIG__ 17RCC_BDCR_LSEDRV_LOW (0 << RCC_BDCR_LSEDRV_SHIFT)BIT8 (1<<8)RST_TIM7SPI_CR1_BAUDRATE_FPCLK_DIV_256 (0x07 << 3)INT16_C(c) __INT16_C(c)spi_set_clock_polarity_0spi_set_clock_polarity_1RCC_BDCR_LSEDRV (3 << RCC_BDCR_LSEDRV_SHIFT)__INT16_MAX__ 0x7fffRST_USBRCC_APB1RSTR_USART3RST (1 << 18)SPI_CR1_BR_FPCLK_DIV_64 0x5SPI3_I2SPR SPI_I2SPR(SPI3_BASE)__INT_WIDTH__ 32spi_resetRCC_CR_HSEBYP (1 << 18)__QQ_FBIT__ 7POWER_CONTROL_BASE (PERIPH_BASE_APB + 0x7000)__SIG_ATOMIC_WIDTH__ 32RCC_CFGR3_USART3SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)RCC_CFGR2_PREDIV_DIV2 0x1baudrate__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32SPI_SR_FRE (1 << 8)RCC_CFGR MMIO32(RCC_BASE + 0x04)__ULLFRACT_EPSILON__ 0x1P-64ULLRSPI_CR2(spi_base) MMIO32((spi_base) + 0x04)RCC_CR2_HSI48CAL (0xFF << RCC_CR2_HSI48CAL_SHIFT)__SIZEOF_WINT_T__ 4SPI_CR1_SSI (1 << 8)__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17RCC_CFGR3_USART2SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)RCC_AHBENR_CRCEN (1 << 6)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1SPI_CR2_RXDMAEN (1 << 0)__FLT32X_HAS_DENORM__ 1__ULLACCUM_MIN__ 0.0ULLKSPI5 SPI5_BASE__INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1SPI_SR_FTLVL_FIFO_EMPTY (0x0 << 11)RCC_CFGR_PPRE (7 << RCC_CFGR_PPRE_SHIFT)RCC_CFGR_MCOPRE (7 << RCC_CFGR_MCOPRE_SHIFT)RCC_CFGR_PLLMUL_MUL11 (0x09 << RCC_CFGR_PLLMUL_SHIFT)SPI_I2SCFGR_I2SSTD_PCM 0x3SPI_I2SCFGR_I2SMOD (1 << 11)RCC_CFGR_PLLSRC0 (1<<15)__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODRCC_APB2RSTR_ADCRST (1 << 9)RCC_APB1RSTR_TIM3RST (1 << 1)__DBL_HAS_QUIET_NAN__ 1RST_I2C1spi_enable_tx_buffer_empty_interruptSPI_CR1_CPOL (1 << 1)__ULLFRACT_MIN__ 0.0ULLRRCC_CFGR_SWS_PLL (2 << RCC_CFGR_SWS_SHIFT)__UDQ_IBIT__ 0__GCC_CONSTRUCTIVE_SIZE 64RCC_CSR_PORRSTF (1 << 27)__LLFRACT_IBIT__ 0RCC_BDCR_LSEDRV_MEDLO (1 << RCC_BDCR_LSEDRV_SHIFT)uint32_tBIT12 (1<<12)SPI_CR1_BIDIMODE_2LINE_UNIDIR (0 << 15)RCC_CFGR_PLLMUL_MUL2 (0x00 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB1ENR_USART4EN (1 << 19)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HKRCC_CIR_HSI14RDYC (1 << 21)RST_DAC1spi_readRCC_CFGR2_PREDIV_DIV10 0x9SPI1_CR1 SPI_CR1(SPI1_BASE)SPI3_SR SPI_SR(SPI3_BASE)__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8RCC_CSR_WWDGRSTF (1 << 30)SPI_TXCRCR(spi_base) MMIO32((spi_base) + 0x18)__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXLIBOPENCM3_CM3_MEMORYMAP_H BIT16 (1<<16)SPI1_I2SPR SPI_I2SPR(SPI1_BASE)__WINT_MIN__ 0UINT_LEAST16_MINSPI_I2SCFGR_CKPOL (1 << 3)__FLT64_DIG__ 15RCC_AHBRSTR_TSCRST (1 << 24)RCC_APB2ENR_TIM1EN (1 << 11)__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8RCC_CFGR_PLLMUL_MUL9 (0x07 << RCC_CFGR_PLLMUL_SHIFT)RCC_CFGR3_USART1SW_SYSCLK (1 << RCC_CFGR3_USART1SW_SHIFT)__INT_LEAST16_TYPE__ short int__FLT_HAS_DENORM__ 1SPI1_CRCPR SPI_CRCPR(SPI1_BASE)DMA_BASE (PERIPH_BASE_AHB1 + 0x0000)__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1RST_TIM1__thumb__ 1RST_TIM3RCC_CFGR_PLLXTPRE_HSE_CLK 0x0RST_TIM6INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1spi_send_msb_first__HQ_FBIT__ 15__bool_true_false_are_defined 1RCC_APB1ENR_USART3EN (1 << 18)RCC_APB1RSTR MMIO32(RCC_BASE + 0x10)BIT26 (1<<26)__SIZE_MAX__ 0xffffffffURCC_CFGR_MCO_HSI14 1__ARM_FEATURE_SAT__ARM_ARCHRCC_AHBRSTR_IOPCRST (1 << 19)__LONG_MAX__ 0x7fffffffL__STRICT_ANSI__ 1SPI_SR_FRLVL_FIFO_EMPTY (0x0 << 9)spi_set_master_modeRCC_CIR_HSI48RDYIE (1 << 14)__PTRDIFF_TYPE__ intINT_LEAST64_MINPTRDIFF_MAXRCC_CFGR_PLLMUL_SHIFT 18ST_TSENSE_CAL1_30C MMIO16(0x1FFFF7B8)__ARM_ARCH_6M__ 1SPI3 SPI3_BASERCC_CFGR_HPRE_DIV2 (0x8 << RCC_CFGR_HPRE_SHIFT)__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53RCC_CFGR_MCO_PLL 7__ARM_ASM_SYNTAX_UNIFIED__WINT_MAX__INT16_C(c) cspi_enableRCC_AHBENR_DMAEN RCC_AHBENR_DMA1ENINT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32__PTRDIFF_WIDTH__ 32spi_disable_ss_outputSPI_SR_CHSIDE (1 << 2)RCC_CFGR3_USART3SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)RST_USART1RST_USART2RST_USART3RST_USART4SPI_CR2_TXEIE (1 << 7)spi_enable_rx_buffer_not_empty_interrupt__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)SPI_CR2_DS_9BIT (0x8 << 8)dataSPI_CR1_CPHA_CLK_TRANSITION_2 (1 << 0)RCC_CFGR_SW_SHIFT 0SPI3_CR2 SPI_CR2(SPI3_BASE)RST_PWRRCC_CFGR_MCO_NOCLK 0spi_set_clock_phase_0__FLT32_NORM_MAX__ 3.4028234663852886e+38F32RST_WWDGI2C1_BASE (PERIPH_BASE_APB + 0x5400)SPI_CR1_CRCL_8BIT (0 << 11)UINT64_C(c) __UINT64_C(c)RCC_CFGR3_USART2SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)RCC_APB2RSTR_TIM16RST (1 << 17)RCC_CFGR_HPRE_DIV256 (0xe << RCC_CFGR_HPRE_SHIFT)__UINTMAX_MAX__ 0xffffffffffffffffULL__INT_MAX__ 0x7fffffff__DBL_MANT_DIG__ 53SPI_CR1_BR_FPCLK_DIV_32 0x4__ULFRACT_IBIT__ 0RCC_APB1RSTR_PWRRST (1 << 28)INT_FAST16_MAXRCC_AHBRSTR_IOPFRST (1 << 22)SPI_SR(spi_base) MMIO32((spi_base) + 0x08)__ARM_EABI__ 1__INT_LEAST64_TYPE__ long long intIWDG_BASE (PERIPH_BASE_APB + 0x3000)__ARM_FEATURE_CDE_COPROCRST_ADC1SPI_CR2_NSSP (1 << 3)UINT32_CGCC: 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1spi_init_masterRCC_APB1ENR MMIO32(RCC_BASE + 0x1c)__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffff__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)TIM1_BASE (PERIPH_BASE_APB + 0x12C00)__INTMAX_MAX__ 0x7fffffffffffffffLLRCC_APB1ENR_TIM6EN (1 << 4)__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17RCC_CSR_RMVF (1 << 24)__LDBL_MIN__ 2.2250738585072014e-308LINT_FAST64_MAX__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffUSPI2_DR SPI_DR(SPI2_BASE)__ARM_FEATURE_QBITRCC_CFGR2_PREDIV_DIV14 0xdSPI_CR2_DS_12BIT (0xB << 8)RCC_CR2_HSI48CAL_SHIFT 24INT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8SPI_CR1_MSTR (1 << 2)__DBL_MAX_10_EXP__ 308__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned intSPI_CR1_BR_FPCLK_DIV_8 0x2RCC_CIR_PLLRDYIE (1 << 12)__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__FLT32_MIN__ 1.1754943508222875e-38F32__USACCUM_MIN__ 0.0UHKRCC_CFGR_PLLSRC_HSI_CLK_DIV2 0x0__FLT32_DECIMAL_DIG__ 9__DECIMAL_DIG__ 17__LDBL_MIN_EXP__ (-1021)INT_FAST16_MIN__LDBL_MANT_DIG__ 53SPI_SR_CRCERR (1 << 4)INT64_MIN (-INT64_MAX - 1)WWDG_BASE (PERIPH_BASE_APB + 0x2c00)__UINT8_C(c) c__INT16_TYPE__ short int__FLT64_MAX__ 1.7976931348623157e+308F64SPI_CR1_RXONLY (1 << 10)RCC_CFGR3_USART2SW_SYSCLK (1 << RCC_CFGR3_USART2SW_SHIFT)UINT_FAST32_MAXSPI_I2SCFGR_I2SCFG_MASTER_RECEIVE 0x3RCC_AHBENR_TSCEN (1 << 24)SPI_I2SPR_ODD (1 << 8)INT_FAST64_MAX __INT_FAST64_MAX__RCC_CR2_HSI14TRIM_SHIFT 3RCC_BDCR_LSEDRV_SHIFT 3__UINT_LEAST16_MAX__ 0xffffSPI1_DR SPI_DR(SPI1_BASE)__ULLFRACT_FBIT__ 64RCC_CFGR_PLLMUL_MUL13 (0x0B << RCC_CFGR_PLLMUL_SHIFT)__SIG_ATOMIC_TYPE__ intRCC_CSR_SFTRSTF (1 << 28)USART5_BASE (PERIPH_BASE_APB + 0x5000)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intGPIO_PORT_C_BASE (PERIPH_BASE_AHB2 + 0x0800)INT32_MIN (-INT32_MAX - 1)RCC_AHBENR_SRAMEN (1 << 2)__FLT32_MAX_10_EXP__ 38GPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZSPI_CR1_BAUDRATE_FPCLK_DIV_8 (0x02 << 3)__UINTPTR_MAX__ 0xffffffffU__FLT32_MIN_EXP__ (-125)RCC_CIR_HSIRDYC (1 << 18)RCC_CFGR2_PREDIV_DIV7 0x6SPI_I2SCFGR_I2SCFG_LSB 8SPI_CR1_BR_FPCLK_DIV_128 0x6UINT32_MAX __UINT32_MAX__TIM3_BASE (PERIPH_BASE_APB + 0x0400)USART8_BASE (PERIPH_BASE_APB + 0x11C00)__ULFRACT_FBIT__ 32RCC_APB2ENR_USART1EN (1 << 14)__FLT64_MIN_10_EXP__ (-307)RCC_APB1ENR_TIM14EN (1 << 8)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__RCC_CFGR_HPRE_DIV16 (0xb << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_HPRE_DIV4 (0x9 << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_MCOPRE_DIV32 (5 << RCC_CFGR_MCOPRE_SHIFT)SPI_CR2_DS_15BIT (0xE << 8)cpha__SFRACT_EPSILON__ 0x1P-7HRSPI_CR2_DS_4BIT (0x3 << 8)__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAX__SQ_FBIT__ 31INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)SPI_I2SPR_MCKOE (1 << 9)SPI3_CR1 SPI_CR1(SPI3_BASE)spi_fifo_reception_threshold_16bit__FLT64_MIN_EXP__ (-1021)__PTRDIFF_WIDTH__ 32INT_FAST8_MAX__UINT_FAST8_MAX__ 0xffffffffURCC_APB2ENR_TIM15EN (1 << 16)UINT16_C(c) __UINT16_C(c)RCC_APB2ENR_ADCEN (1 << 9)__LACCUM_IBIT__ 32RCC_CFGR_PLLMUL_MUL7 (0x05 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB1ENR_USART5EN (1 << 20)__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"LIBOPENCM3_RCC_COMMON_ALL_H __VFP_FP__ 1SPI_CR1_BAUDRATE_FPCLK_DIV_128 (0x06 << 3)__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__INTPTR_MAX__ 0x7fffffffRCC_CIR_HSERDYC (1 << 19)__UINT_FAST16_MAX__ 0xffffffffURCC_CFGR2_PREDIV_DIV13 0xcINT64_C(c) __INT64_C(c)RCC_CFGR2_PREDIV_DIV12 0xbSPI_I2SCFGR_I2SSTD_LSB_JUSTIFIED 0x2RCC_CFGR3_USART2SW_SHIFT 16SPI_I2SCFGR_I2SSTD_I2S_PHILIPS 0x0__GCC_IEC_559_COMPLEX 0__UFRACT_MIN__ 0.0URSPI4 SPI4_BASERCC_CFGR_MCO_SHIFT 24WCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__GPIO_PORT_D_BASE (PERIPH_BASE_AHB2 + 0x0C00)__UINT_LEAST8_TYPE__ unsigned charRCC_AHBENR_GPIOFEN (1 << 22)SPI_DR(spi_base) MMIO32((spi_base) + 0x0c)__ACCUM_FBIT__ 15__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1__FLT32X_EPSILON__ 2.2204460492503131e-16F32xSPI_I2SCFGR_PCMSYNC (1 << 7)NVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed charspi_read8BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON__RCC_CFGR_PPRE_MASK 0x7__FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)SPI2_RXCRCR SPI_RXCRCR(SPI2_BASE)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64USART2_BASE (PERIPH_BASE_APB + 0x4400)__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4WINT_MIN __WINT_MIN__RCC_APB2RSTR_TIM15RST (1 << 16)SPI_CR1_MSBFIRST (0 << 7)RCC_APB2RSTR_USART8RST (1 << 7)RCC_BDCR_RTCEN (1 << 15)__SIZEOF_DOUBLE__ 8__ARM_FEATURE_CMSERCC_AHBRSTR_IOPERST (1 << 21)__FLT32X_MIN_EXP__ (-1021)RCC_CFGR2_PREDIV_DIV11 0xaSPI_I2SCFGR_DATLEN_32BIT 0x2INFO_BASE (0x1ffff000U)TIM17_BASE (PERIPH_BASE_APB + 0x14800)SPI_CR2_RXNEIE (1 << 6)BIT27 (1<<27)TIM7_BASE (PERIPH_BASE_APB + 0x1400)RCC_CFGR_MCO_LSE 3SPI_DR8(spi_base) MMIO8((spi_base) + 0x0c)SPI_CR2_DS_8BIT (0x7 << 8)__UTA_FBIT__ 64RCC_CIR_LSERDYC (1 << 17)SPI_CRCPR(spi_base) MMIO32((spi_base) + 0x10)__thumb__ 1LIBOPENCM3_MEMORYMAP_COMMON_H signed charSPI_SR_BSY (1 << 7)uint8_tINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)SPI3_I2SCFGR SPI_I2SCFGR(SPI3_BASE)__GNUC_STDC_INLINE__ 1__INT64_C(c) c ## LL__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLKRCC_CFGR2_PREDIV_DIV8 0x7__GNUC_PATCHLEVEL__ 1PTRDIFF_MINGNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsRCC_AHBENR_DMA1EN (1 << 0)UINTPTR_MAX __UINTPTR_MAX____ARM_ARCH_PROFILE 77RCC_CR2_HSI48ON (1 << 16)RCC_AHBRSTR_IOPBRST (1 << 18)GPIO_PORT_E_BASE (PERIPH_BASE_AHB2 + 0x1000)__FLT64_MAX_10_EXP__ 308__WCHAR_WIDTH__ 32MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINSPI_CR1_LSBFIRST (1 << 7)__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38SPI_CR2_DS_13BIT (0xC << 8)__FRACT_MAX__ 0X7FFFP-15RPERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)SPI_CR1_BIDIMODE_2LINE_UNIDIR (0 << 15)RCC_CFGR_MCO_SYSCLK 4__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5RCC_APB2ENR_USART8EN (1 << 7)__ARM_ARCH_EXT_IDIV__SPI_SR_TXE (1 << 1)PERIPH_BASE_APB (PERIPH_BASE + 0x00000000)RCC_CFGR2_PREDIV_DIV3 0x2SPI_I2SCFGR_DATLEN_24BIT 0x1RCC_CIR_PLLRDYF (1 << 4)RCC_CFGR_HPRE_MASK 0xfRCC_CFGR2_PREDIV_DIV6 0x5__UINT16_MAX__ 0xffff__TQ_FBIT__ 127RCC_CFGR_MCO_HSI 5TIM14_BASE (PERIPH_BASE_APB + 0x2000)__USQ_FBIT__ 32uint16_tSPI_SR_UDR (1 << 3)RCC_CSR_IWDGRSTF (1 << 29)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32RCC_APB1ENR_TIM2EN (1 << 0)RCC_APB1ENR_TIM7EN (1 << 5)SPI1_BASE (PERIPH_BASE_APB + 0x13000)INT_FAST32_MIN (-INT_FAST32_MAX - 1)RCC_CFGR_MCO_MASK 0xfCEC_BASE (PERIPH_BASE_APB + 0x7800)RCC_CFGR2_PREDIV_DIV9 0x8UINT_LEAST8_MAXRCC_CFGR_SW_HSI48 (3 << RCC_CFGR_SW_SHIFT)RCC_APB1ENR_PWREN (1 << 28)UINT8_C(c) __UINT8_C(c)RCC_CIR_HSIRDYIE (1 << 10)__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE (0 << 1)__USA_IBIT__ 16RCC_CFGR_MCO_HSI48 8PTRDIFF_MIN (-PTRDIFF_MAX - 1)RCC_CSR_V18PWRRSTF (1 << 23)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__DBL_IS_IEC_60559__ 2__UINT_FAST64_TYPE__ long long unsigned intTIM2_BASE (PERIPH_BASE_APB + 0x0000)SPI_CR1_BIDIOE (1 << 14)RCC_CFGR_PLLXTPRE (1<<17)RCC_CIR_HSI48RDYC (1 << 22)__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC__LIBOPENCM3_RCC_H SPI_CR2_LDMA_TX (1 << 14)RCC_BDCR_LSERDY (1 << 1)__UINT32_C(c) c ## UL__FLT32_IS_IEC_60559__ 2RCC_CFGR_HPRE_DIV64 (0xc << RCC_CFGR_HPRE_SHIFT)SPI_I2SCFGR(spi_base) MMIO32((spi_base) + 0x1c)SPI_I2SCFGR_I2SE (1 << 10)INT_FAST64_MIN__USFRACT_IBIT__ 0../common/spi_common_v2.c__LDBL_EPSILON__ 2.2204460492503131e-16L__USFRACT_MIN__ 0.0UHRTSC_BASE (PERIPH_BASE_AHB1 + 0x4000)RCC_CFGR_PLLMUL_MUL8 (0x06 << RCC_CFGR_PLLMUL_SHIFT)__ARM_NEONSPI_CR1_CRCL (1 << 11)__UINT8_MAX__ 0xffSPI_I2SCFGR_DATLEN_16BIT 0x0RCC_CFGR_HPRE_DIV8 (0xa << RCC_CFGR_HPRE_SHIFT)__LDBL_MAX_EXP__ 1024RCC_CIR MMIO32(RCC_BASE + 0x08)LIBOPENCM3_MEMORYMAP_H SPI_CR2_DS_MASK (0xF << 8)RCC_APB1ENR_USBEN (1 << 23)SPI_CR2_FRF_TI_MODE (1 << 4)__DBL_HAS_DENORM__ 1SPI2_DR8 SPI_DR8(SPI2_BASE)SPI_CR2_FRF_MOTOROLA_MODE (0 << 4)RCC_APB1RSTR_USBRST (1 << 23)SPI_CR2_SSOE (1 << 2)__DA_FBIT__ 31__GXX_ABI_VERSION 1017RCC_CFGR_PPRE_DIV16 (7 << RCC_CFGR_PPRE_SHIFT)__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LRCC_CFGR3_USART1SW_PCLK (0 << RCC_CFGR3_USART1SW_SHIFT)INT_LEAST32_MAX __INT_LEAST32_MAX____ULLACCUM_EPSILON__ 0x1P-32ULLKRCC_BDCR_LSEDRV_HIGH (3 << RCC_BDCR_LSEDRV_SHIFT)__INT_LEAST32_WIDTH__ 32INT_LEAST8_MAX __INT_LEAST8_MAX__RCC_CFGR_SWS_PLL (2 << RCC_CFGR_SWS_SHIFT)USART3_BASE (PERIPH_BASE_APB + 0x4800)RCC_CFGR_PLLXTPRE_HSE_CLK_DIV2 0x1RCC_CSR_RESET_FLAGS (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF | RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF | RCC_CSR_PINRSTF | RCC_CSR_OBLRSTF)__UACCUM_MIN__ 0.0UKRCC_CFGR3_USART3SW (3 << RCC_CFGR3_USART2SW_SHIFT)__FLT_EPSILON__ 1.1920928955078125e-7Fspi_set_data_sizeSPI3_TXCRCR SPI_TXCRCR(SPI3_BASE)__ARM_ARCH_ISA_THUMBRCC_CR_HSEON (1 << 16)RCC_CFGR_MCO_HSE 6SPI_CR1_BIDIMODE (1 << 15)__ARM_FEATURE_MATMUL_INT8__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0RCC_APB1RSTR_USART5RST (1 << 20)DBGMCU_BASE (PERIPH_BASE_APB + 0x15800)__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1cpol__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)TIM16_BASE (PERIPH_BASE_APB + 0x14400)RCC_APB2RSTR_USART1RST (1 << 14)SPI_CR1_BR_FPCLK_DIV_256 0x7__FLT32_HAS_QUIET_NAN__ 1RCC_BDCR_RTCSEL_LSI (2 << RCC_BDCR_RTCSEL_SHIFT)RCC_CSR_OBLRSTF (1 << 25)SPI_SR_FRLVL_HALF_FIFO (0x2 << 9)__LDBL_HAS_INFINITY__ 1RCC_CFGR_MCOPRE_DIV1 (0 << RCC_CFGR_MCOPRE_SHIFT)__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308__ARM_PCS 1RCC_CFGR_MCOPRE_DIV8 (3 << RCC_CFGR_MCOPRE_SHIFT)bool _BoolSPI_CR1_BAUDRATE_FPCLK_DIV_32 (0x04 << 3)UINTMAX_MAX __UINTMAX_MAX__RCC_CFGR_PLLMUL_MUL12 (0x0A << RCC_CFGR_PLLMUL_SHIFT)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffRCC_CFGR_PLLMUL_MUL15 (0x0D << RCC_CFGR_PLLMUL_SHIFT)BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)SPI3_RXCRCR SPI_RXCRCR(SPI3_BASE)INT16_MAX __INT16_MAX__SPI2_CR2 SPI_CR2(SPI2_BASE)__FLT32X_IS_IEC_60559__ 2SYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXRCC_CFGR_SW_HSE (1 << RCC_CFGR_SW_SHIFT)PERIPH_BASE_AHB1 (PERIPH_BASE + 0x00020000)__INT_LEAST16_WIDTH__ 16RCC_CR_HSITRIM (0x1F << RCC_CR_HSITRIM_SHIFT)RCC_APB1RSTR_TIM14RST (1 << 8)__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLINT16_MIN (-INT16_MAX - 1)_REG_BIT__USFRACT_EPSILON__ 0x1P-8UHR__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)RCC_CR2_HSI48RDY (1 << 17)SPI_CR2_LDMA_RX (1 << 13)RCC_AHBRSTR_IOPDRST (1 << 20)/build/libopencm3/lib/stm32/f0__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffUL__INT_LEAST8_MAX__ 0x7fRCC_CFGR3_CECSW (1 << 6)__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXDAC_BASE (PERIPH_BASE_APB + 0x7400)__FLT_DECIMAL_DIG__ 9RCC_CFGR2_PREDIV_DIV5 0x4RCC_CIR_LSERDYF (1 << 1)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1RCC_CR_HSICAL_SHIFT 8SPI_CR1_CPHA_CLK_TRANSITION_1 (0 << 0)__ACCUM_MAX__ 0X7FFFFFFFP-15KRCC_CFGR MMIO32(RCC_BASE + 0x04)__INT8_MAX__ 0x7fBIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intRCC_AHBRSTR_IOPARST (1 << 17)RCC_CR2_HSI14TRIM (31 << RCC_CR2_HSI14TRIM_SHIFT)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__SPI_CR2_FRF (1 << 4)INT_FAST32_MINSPI2_TXCRCR SPI_TXCRCR(SPI2_BASE)__FLT_EVAL_METHOD_TS_18661_3__ 0RCC_CFGR3_USBSW (1 << 7)ST_VREFINT_CAL MMIO16(0x1FFFF7BA)__SCHAR_WIDTH__ 8rcc_apb2_frequency rcc_apb1_frequencyBIT18 (1<<18)UINT_FAST16_MAX__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32RCC_BDCR_RTCSEL_LSE (1 << RCC_BDCR_RTCSEL_SHIFT)__FRACT_EPSILON__ 0x1P-15RSPI_I2SCFGR_I2SCFG_SLAVE_RECEIVE 0x1BIT24 (1<<24)RCC_CFGR_HPRE_NODIV (0x0 << RCC_CFGR_HPRE_SHIFT)__INT32_MAX__ 0x7fffffffLST_TSENSE_CAL2_110C MMIO16(0x1FFFF7C2)SPI_I2SCFGR_I2SSTD_MSB_JUSTIFIED 0x1UINTMAX_MAXEXTI_BASE (PERIPH_BASE_APB + 0x10400)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLRCC_CIR_CSSC (1 << 23)__ARM_FEATURE_BF16_VECTOR_ARITHMETICRCC_BDCR_LSEDRV_LOW (0 << RCC_BDCR_LSEDRV_SHIFT)RCC_CIR_HSI14RDYIE (1 << 13)SPI_CR1_BR_FPCLK_DIV_4 0x1PPBI_BASE (0xE0000000U)RCC_APB1ENR_CRSEN (1 << 27)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__RCC_CFGR_PLLMUL_MUL6 (0x04 << RCC_CFGR_PLLMUL_SHIFT)INT8_MAX __INT8_MAX__RCC_CSR_LSIRDY (1 << 1)__INT_LEAST16_TYPE__ short int__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1RCC_CFGR3_USART3SW_SYSCLK (1 << RCC_CFGR3_USART2SW_SHIFT)ADC_BASE (PERIPH_BASE_APB + 0x12400)RCC_CFGR_PPRE_DIV4 (5 << RCC_CFGR_PPRE_SHIFT)__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0RCC_CR_HSERDY (1 << 17)__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64RCC_BDCR MMIO32(RCC_BASE + 0x20)UINTPTR_MAXSPI_I2SCFGR_I2SCFG_MASTER_TRANSMIT 0x2RCC_CR2_HSI14DIS (1 << 2)__LDBL_DENORM_MIN__ 4.9406564584124654e-324LRCC_APB1RSTR_WWDGRST (1 << 11)__INT64_MAX__ 0x7fffffffffffffffLLRCC_APB1ENR_USART2EN (1 << 17)SPI3_DR SPI_DR(SPI3_BASE)SPI_CR2_DS_11BIT (0xA << 8)__ULLFRACT_IBIT__ 0RCC_CFGR_HPRE (0xf << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_MCOPRE_DIV2 (1 << RCC_CFGR_MCOPRE_SHIFT)MMIO16(addr) (*(volatile uint16_t *)(addr))RCC_CFGR_PLLMUL_MUL4 (0x02 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB2ENR_SPI1EN (1 << 12)SPI_SR_FTLVL_HALF_FIFO (0x2 << 11)RCC_CSR_LPWRRSTF (1 << 31)__GNUC__ 12RCC_CFGR_SW (3 << RCC_CFGR_SW_SHIFT)SPI1_DR8 SPI_DR8(SPI1_BASE)WCHAR_MAXSPI_SR_FTLVL_QUARTER_FIFO (0x1 << 11)__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16RCC_CFGR3_USART2SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0RCC_CFGR_SWS_SHIFT 2CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULKRCC_CIR_HSIRDYF (1 << 2)__ARM_ARCH 6RCC_APB1RSTR_CECRST (1 << 30)__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55RCC_CFGR2_PREDIV_DIV16 0xfSPI1_I2SCFGR SPI_I2SCFGR(SPI1_BASE)INT16_MAXINTPTR_MAXRCC_CIR_HSI48RDYF (1 << 6)__LDBL_HAS_QUIET_NAN__ 1__LONG_LONG_WIDTH__ 64BIT6 (1<<6)RCC_APB1ENR_I2C2EN (1 << 22)RCC_CFGR_MCOPRE_SHIFT 28__UINT_FAST64_MAX__ 0xffffffffffffffffULLRCC_APB2RSTR MMIO32(RCC_BASE + 0x0c)__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1RCC_CIR_LSIRDYC (1 << 16)RCC_CFGR_MCO_LSI 2BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024RCC_CFGR2_PREDIV_NODIV 0x0UINT16_MAXSPI_I2SPR(spi_base) MMIO32((spi_base) + 0x20)__FLT64_MIN__ 2.2250738585072014e-308F64RCC_APB1RSTR_USART4RST (1 << 19)__INTMAX_C(c) c ## LLRCC_CFGR3_USART2SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)RCC_CIR_PLLRDYC (1 << 20)__ARM_ARCH_PROFILE__INT64_TYPE__ long long intLIBOPENCM3_SPI_COMMON_ALL_H __CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4RCC_CFGR_SWS_HSE (1 << RCC_CFGR_SWS_SHIFT)SPI_CR1_SPE (1 << 6)SPI_CR1_SSM (1 << 9)RCC_CFGR_PPRE_SHIFT 8RCC_CSR_PINRSTF (1 << 26)RCC_CFGR3_USART3SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)RCC_BDCR_RTCSEL_NOCLK (0 << RCC_BDCR_RTCSEL_SHIFT)RCC_CR_HSION (1 << 0)__UFRACT_MAX__ 0XFFFFP-16URRCC_APB1RSTR_TIM7RST (1 << 5)INT64_MAXINT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0__ULACCUM_IBIT__ 32__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32SPI3 SPI3_BASEINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__RCC_CFGR3_USARTxSW_MASK 3SYS_TICK_BASE (SCS_BASE + 0x0010)SPI_CR1_CRCL_16BIT (1 << 11)__USER_LABEL_PREFIX__ __ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)RCC_CFGR_PPRE_DIV2 (4 << RCC_CFGR_PPRE_SHIFT)SPI2_BASE (PERIPH_BASE_APB + 0x3800)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)SPI_CR1_BAUDRATE_FPCLK_DIV_64 (0x05 << 3)__INT_FAST32_TYPE__ intCRS_BASE (PERIPH_BASE_APB + 0x6C00)data_sSPI1_TXCRCR SPI_TXCRCR(SPI1_BASE)__GCC_ASM_FLAG_OUTPUTS____LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1RCC_APB1RSTR_DACRST (1 << 29)RCC_CIR_HSI14RDYF (1 << 5)RCC_CFGR_MCOPRE_DIV64 (6 << RCC_CFGR_MCOPRE_SHIFT)__USACCUM_IBIT__ 8RCC_CFGR3_USART3SW_SHIFT 18__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UKRCC_BDCR_RTCSEL_SHIFT 8SPI2_CR1 SPI_CR1(SPI2_BASE)__FLT_EVAL_METHOD__ 0unsigned int__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__thumb2__RCC_CR_PLLON (1 << 24)RCC_BASE (PERIPH_BASE_AHB1 + 0x1000)__ARM_FEATURE_LDREX__UQQ_FBIT__ 8RCC_CFGR_HPRE_SHIFT 4INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX__RCC_CFGR_PLLMUL (0x0F << RCC_CFGR_PLLMUL_SHIFT)__LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1RCC_APB2RSTR_SYSCFGRST (1 << 0)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__RTC_BASE (PERIPH_BASE_APB + 0x2800)__UINT8_TYPE__ unsigned charSPI_I2SCFGR_I2SCFG_SLAVE_TRANSMIT 0x0SPI_CR1_CRCEN (1 << 13)RCC_AHBENR_GPIOCEN (1 << 19)SPI_TXCRCR(spi_base) MMIO32((spi_base) + 0x18)RCC_AHBENR_FLTFEN (1 << 4)UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINRCC_CFGR_HPRE_DIV512 (0xf << RCC_CFGR_HPRE_SHIFT)PERIPH_BASE (0x40000000U)true 1__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)RCC_APB2ENR MMIO32(RCC_BASE + 0x18)__LDBL_MIN_10_EXP__ (-307)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1SPI_CR1(spi_base) MMIO32((spi_base) + 0x00)RCC_CR_CSSON (1 << 19)BIT28 (1<<28)__LFRACT_EPSILON__ 0x1P-31LRRCC_APB1ENR_I2C1EN (1 << 21)spi_set_crcl_16bitRCC_CR2_HSI14CAL (0xFF << RCC_CR2_HSI14CAL_SHIFT)SPI_SR_OVR (1 << 6)__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX__SPI_SR_FRLVL_FIFO_FULL (0x3 << 9)__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1RCC_CR MMIO32(RCC_BASE + 0x00)RCC_CFGR_PLLMUL_MUL3 (0x01 << RCC_CFGR_PLLMUL_SHIFT)__FLT32_MIN_10_EXP__ (-37)SPI2 SPI2_BASEMMIO64(addr) (*(volatile uint64_t *)(addr))__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LRCC_APB1RSTR_CANRST (1 << 25)INTPTR_MINspi_send8DESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)RCC_APB1RSTR_TIM2RST (1 << 0)RCC_CFGR_PLLMUL_MUL10 (0x08 << RCC_CFGR_PLLMUL_SHIFT)__TA_IBIT__ 64SPI_CR2_TXDMAEN (1 << 1)RCC_CFGR2_PREDIV_DIV4 0x3SPI_CR2_DS_16BIT (0xF << 8)SPI_CR2_DS_7BIT (0x6 << 8)RCC_CR2_HSI14RDY (1 << 1)__ARM_FEATURE_QRDMX__STRICT_ANSI__ 1__ARM_ARCH_ISA_THUMB 1DESIG_FLASH_SIZE_BASE (0x1FFFF7CCU)__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__RCC_CFGR_MCOPRE_DIV16 (4 << RCC_CFGR_MCOPRE_SHIFT)RCC_CFGR2_PREDIV 0xfBIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1RCC_CIR_LSIRDYIE (1 << 8)INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1SPI2_CRCPR SPI_CRCPR(SPI2_BASE)__FLT32_DIG__ 6SPI_CR1_CPHA (1 << 0)INT_LEAST16_MAXSPI1_SR SPI_SR(SPI1_BASE)TIM6_BASE (PERIPH_BASE_APB + 0x1000)BIT15 (1<<15)RCC_APB2RSTR_DBGMCURST (1 << 22)SPI_SR_FTLVL_FIFO_FULL (0x3 << 11)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7INT32_MAXRCC_BDCR_BDRST (1 << 16)__ACCUM_MIN__ (-0X1P15K-0X1P15K)lsbfirstRCC_CFGR3_USART1SW_HSI (3 << RCC_CFGR3_USART1SW_SHIFT)__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intRCC_CFGR_PLLNODIV (1 << 31)RCC_CFGR_PLLSRC (1<<16)RCC_AHBENR_DMA2EN (1 << 1)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2RCC_APB2ENR_DBGMCUEN (1 << 22)BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234SPI_CR2_DS_10BIT (0x9 << 8)BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)__FLT_NORM_MAX__ 3.4028234663852886e+38FUSART1_BASE (PERIPH_BASE_APB + 0x13800)RCC_CFGR3_USART1SW_LSE (2 << RCC_CFGR3_USART1SW_SHIFT)long long unsigned intRCC_BDCR_RTCSEL_HSE (3 << RCC_BDCR_RTCSEL_SHIFT)__FLT_MIN_10_EXP__ (-37)GPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)RCC_AHBENR_GPIOAEN (1 << 17)SPI2_I2SCFGR SPI_I2SCFGR(SPI2_BASE)RCC_AHBENR_GPIOEEN (1 << 21)__SHRT_MAX__ 0x7fffspi_set_crcl_8bit__PTRDIFF_TYPE__ intRCC_CFGR_PPRE_NODIV (0 << RCC_CFGR_PPRE_SHIFT)__APCS_32__ 1__DQ_FBIT__ 63SPI_CR1_BAUDRATE_FPCLK_DIV_2 (0x00 << 3)INT_LEAST64_MAX__SACCUM_IBIT__ 8reg32RCC_CR_HSITRIM_SHIFT 3__UHQ_IBIT__ 0INT_LEAST8_MINRCC_CR2_HSI14CAL_SHIFT 8RCC_CFGR_MCOPRE_DIV4 (2 << RCC_CFGR_MCOPRE_SHIFT)BIT29 (1<<29)RCC_CFGR_SWS (3 << RCC_CFGR_SWS_SHIFT)__INT_FAST16_TYPE__ intRCC_CFGR_ADCPRE (1<<14)USART7_BASE (PERIPH_BASE_APB + 0x11800)SPI1 SPI1_BASEINT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRRCC_AHBRSTR_IOPCRST (1 << 19)__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intRCC_CIR_HSERDYIE (1 << 11)__FLT32X_DIG__ 15RCC_CFGR_HPRE_DIV128 (0xd << RCC_CFGR_HPRE_SHIFT)SPI_I2SCFGR_CHLEN (1 << 0)SPI3_DR8 SPI_DR8(SPI3_BASE)SPI3_CRCPR SPI_CRCPR(SPI3_BASE)__UTQ_FBIT__ 128RCC_APB2ENR_TIM17EN (1 << 18)SPI_CR1_BAUDRATE_FPCLK_DIV_4 (0x01 << 3)__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffRCC_APB1ENR_TIM3EN (1 << 1)DMA2_BASE (PERIPH_BASE_AHB1 + 0x0400)PTRDIFF_MAX __PTRDIFF_MAX__RCC_CR2_HSI14ON (1 << 0)SPI_CR1_BR_FPCLK_DIV_2 0x0RCC_CFGR_PLLMUL_MUL14 (0x0C << RCC_CFGR_PLLMUL_SHIFT)SPI_CR2_DS_5BIT (0x4 << 8)RCC_CR_PLLRDY (1 << 25)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKRCC_CFGR3_USART2SW (3 << RCC_CFGR3_USART2SW_SHIFT)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRRCC_CFGR_PLLMUL_MUL5 (0x03 << RCC_CFGR_PLLMUL_SHIFT)RCC_AHBRSTR MMIO32(RCC_BASE + 0x28)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intRCC_APB2RSTR_USART7RST (1 << 6)SPI_CR2_FRXTH (1 << 12)RCC_CFGR_SW_HSI (0 << RCC_CFGR_SW_SHIFT)SPI_SR_MODF (1 << 5)RCC_CFGR3_I2C1SW (1 << 4)WCHAR_MINDMA1_BASE DMA_BASERCC_CFGR3_ADCSW (1 << 8)BEGIN_DECLS RCC_APB1RSTR_CRSRST (1 << 27)RCC_APB2RSTR_TIM1RST (1 << 11)RCC_APB2RSTR_SPI1RST (1 << 12)USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)SPI1_CR2 SPI_CR2(SPI1_BASE)SPI1_RXCRCR SPI_RXCRCR(SPI1_BASE)RCC_CSR MMIO32(RCC_BASE + 0x24)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)RCC_CFGR3_USART1SW (3 << RCC_CFGR3_USART1SW_SHIFT)RCC_CR2 MMIO32(RCC_BASE + 0x34)SPI_CR1_CPOL_CLK_TO_1_WHEN_IDLE (1 << 1)__ARM_EABI__ 1INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1RCC_CR_HSICAL (0xFF << RCC_CR_HSICAL_SHIFT)RCC_CIR_HSERDYF (1 << 3)RCC_APB1RSTR_TIM6RST (1 << 4)USART6_BASE (PERIPH_BASE_APB + 0x11400)RCC_CFGR_SWS_HSI48 (3 << RCC_CFGR_SWS_SHIFT)__QQ_IBIT__ 0SPI_CR1_BAUDRATE_FPCLK_DIV_16 (0x03 << 3)DESIG_UNIQUE_ID_BASE (0x1FFFF7ACU)__LLACCUM_FBIT__ 31RCC_APB2ENR_USART6EN (1 << 5)__UINTMAX_TYPE__ long long unsigned int__FLT32X_MIN_10_EXP__ (-307)RCC_BDCR_RTCSEL (3 << RCC_BDCR_RTCSEL_SHIFT)__USQ_IBIT__ 0SPI_SR_FRLVL_QUARTER_FIFO (0x1 << 9)__UINT_LEAST32_TYPE__ long unsigned intRCC_CFGR_SW_PLL (2 << RCC_CFGR_SW_SHIFT)RCC_APB2ENR_USART7EN (1 << 6)__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 1RCC_APB2RSTR_TIM17RST (1 << 18)STM32F0 1RCC_APB1RSTR_USART2RST (1 << 17)INTMAX_MAXDEBUG_BASE (SCS_BASE + 0x0DF0)SPI_CR1_CRCNEXT (1 << 12)RCC_CIR_CSSF (1 << 7)__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1spi_fifo_reception_threshold_8bit__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CSPI2_SR SPI_SR(SPI2_BASE)_REG_BIT(base,bit) (((base) << 5) + (bit))RCC_APB1ENR_WWDGEN (1 << 11)INT64_MINSPI_CR2_ERRIE (1 << 5)__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intUINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULR__ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned intI2C2_BASE (PERIPH_BASE_APB + 0x5800)RCC_CFGR3_USART1SW_SHIFT 0RCC_APB2ENR_TIM16EN (1 << 17)RCC_APB1RSTR_I2C1RST (1 << 21)RCC_APB1ENR_SPI2EN (1 << 14)__LONG_MAX__ 0x7fffffffLTIM15_BASE (PERIPH_BASE_APB + 0x14000)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16RCC_CFGR_PLLSRC_HSE_CLK 0x1FLASH_BASE (0x08000000U)CORESIGHT_LAR_OFFSET 0xfb0RCC_BDCR_LSEON (1 << 0)SPI_CR1_BR_FPCLK_DIV_16 0x3FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x2000)short intRCC_AHBENR_GPIOBEN (1 << 18)__UINT16_C(c) cSPI_SR_RXNE (1 << 0)BIT31 (1<<31)__UDA_IBIT__ 32UINT_LEAST32_MAXBIT2 (1<<2)RCC_CFGR_MCOPRE_DIV128 (7 << RCC_CFGR_MCOPRE_SHIFT)__ATOMIC_RELAXED 0__UHQ_FBIT__ 16__ARM_FEATURE_COPROCRCC_APB1ENR_DACEN (1 << 29)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53RCC_BDCR_LSEBYP (1 << 2)RCC_APB1RSTR_SPI2RST (1 << 14)__GCC_ATOMIC_BOOL_LOCK_FREE 1BIT5 (1<<5)BIT1 (1<<1)USART4_BASE (PERIPH_BASE_APB + 0x4C00)INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1SPI_RXCRCR(spi_base) MMIO32((spi_base) + 0x14)SPI_CR1_BIDIMODE_1LINE_BIDIR (1 << 15)SPI_SR_CHSIDE (1 << 2)__DBL_DECIMAL_DIG__ 17LIBOPENCM3_SPI_H BIT8 (1<<8)RCC_CFGR3_USART3SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)SPI_CR1_BAUDRATE_FPCLK_DIV_256 (0x07 << 3)INT16_C(c) __INT16_C(c)RCC_CFGR2 MMIO32(RCC_BASE + 0x2c)RCC_BDCR_LSEDRV (3 << RCC_BDCR_LSEDRV_SHIFT)__INT16_MAX__ 0x7fffRCC_APB1RSTR_USART3RST (1 << 18)SPI_CR1_BR_FPCLK_DIV_64 0x5SPI3_I2SPR SPI_I2SPR(SPI3_BASE)__INT_WIDTH__ 32RCC_CR_HSEBYP (1 << 18)__QQ_FBIT__ 7RCC_APB1ENR_CANEN (1 << 25)POWER_CONTROL_BASE (PERIPH_BASE_APB + 0x7000)__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64RCC_CFGR3_USART3SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)RCC_CFGR2_PREDIV_DIV2 0x1__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32SPI_SR_FRE (1 << 8)__LFRACT_FBIT__ 31__ULLFRACT_EPSILON__ 0x1P-64ULLR__STDC_HOSTED__ 1SPI_CR2(spi_base) MMIO32((spi_base) + 0x04)RCC_CR2_HSI48CAL (0xFF << RCC_CR2_HSI48CAL_SHIFT)__SIZEOF_WINT_T__ 4SPI_CR1_SSI (1 << 8)__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17RCC_AHBENR_CRCEN (1 << 6)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1SPI_CR2_RXDMAEN (1 << 0)__FLT32X_HAS_DENORM__ 1__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1SPI_SR_FTLVL_FIFO_EMPTY (0x0 << 11)__LDBL_IS_IEC_60559__ 2RCC_CFGR_PPRE (7 << RCC_CFGR_PPRE_SHIFT)RCC_CFGR_MCOPRE (7 << RCC_CFGR_MCOPRE_SHIFT)RCC_CFGR_PLLMUL_MUL11 (0x09 << RCC_CFGR_PLLMUL_SHIFT)SPI_I2SCFGR_I2SSTD_PCM 0x3SPI_I2SCFGR_I2SSTD_LSB 4SPI_I2SCFGR_I2SMOD (1 << 11)RCC_CFGR_PLLSRC0 (1<<15)__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODRCC_APB2RSTR_ADCRST (1 << 9)RCC_APB1RSTR_TIM3RST (1 << 1)SPI_CR1_CPOL (1 << 1)__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H RCC_CFGR_PLLMUL_MUL16 (0x0E << RCC_CFGR_PLLMUL_SHIFT)__GCC_CONSTRUCTIVE_SIZE 64RCC_CSR_PORRSTF (1 << 27)__LLFRACT_IBIT__ 0RCC_BDCR_LSEDRV_MEDLO (1 << RCC_BDCR_LSEDRV_SHIFT)uint32_tBIT12 (1<<12)RCC_CFGR_PLLMUL_MUL2 (0x00 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB1ENR_USART4EN (1 << 19)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HKRCC_CIR_HSI14RDYC (1 << 21)RCC_CFGR_SW_SHIFT 0RCC_CFGR2_PREDIV_DIV10 0x9SPI1_CR1 SPI_CR1(SPI1_BASE)SPI3_SR SPI_SR(SPI3_BASE)__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8RCC_CSR_WWDGRSTF (1 << 30)RCC_APB1RSTR_I2C2RST (1 << 22)__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXLIBOPENCM3_CM3_MEMORYMAP_H BIT16 (1<<16)SPI1_I2SPR SPI_I2SPR(SPI1_BASE)__WINT_MIN__ 0UINT_LEAST16_MINSPI_I2SCFGR_CKPOL (1 << 3)__FLT64_DIG__ 15RCC_AHBRSTR_TSCRST (1 << 24)RCC_APB2ENR_TIM1EN (1 << 11)__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8RCC_CFGR_PLLMUL_MUL9 (0x07 << RCC_CFGR_PLLMUL_SHIFT)RCC_CFGR3_USART1SW_SYSCLK (1 << RCC_CFGR3_USART1SW_SHIFT)DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)SPI1_CRCPR SPI_CRCPR(SPI1_BASE)__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_C__LDBL_MAX_10_EXP__ 308RCC_CFGR_PLLXTPRE_HSE_CLK 0x0RCC_CFGR_PPRE_DIV8 (6 << RCC_CFGR_PPRE_SHIFT)INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1RCC_CFGR_HPRE_DIV2 (0x8 << RCC_CFGR_HPRE_SHIFT)__HQ_FBIT__ 15__bool_true_false_are_defined 1RCC_APB1ENR_USART3EN (1 << 18)RCC_APB1RSTR MMIO32(RCC_BASE + 0x10)BIT26 (1<<26)__SIZE_MAX__ 0xffffffffURCC_CFGR_MCO_HSI14 1__ARM_FEATURE_SAT__ARM_ARCHINTMAX_C(c) __INTMAX_C(c)__ARM_NEON_FPSPI_SR_FRLVL_FIFO_EMPTY (0x0 << 9)SPI_CR2_DS_6BIT (0x5 << 8)RCC_CIR_HSI48RDYIE (1 << 14)RCC_CFGR_SWS_HSI (0 << RCC_CFGR_SWS_SHIFT)INT_LEAST64_MINPTRDIFF_MAXRCC_CFGR_PLLMUL_SHIFT 18ST_TSENSE_CAL1_30C MMIO16(0x1FFFF7B8)__LLFRACT_EPSILON__ 0x1P-63LLRRCC_APB2RSTR_USART6RST (1 << 5)__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53RCC_CFGR_MCO_PLL 7__ARM_ASM_SYNTAX_UNIFIED__WINT_MAX__INT16_C(c) cSPI5 SPI5_BASERCC_AHBENR_DMAEN RCC_AHBENR_DMA1ENINT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32RCC_AHBENR MMIO32(RCC_BASE + 0x14)SPI2_I2SPR SPI_I2SPR(SPI2_BASE)__ATOMIC_ACQ_REL 4SPI_CR2_TXEIE (1 << 7)SPI6 SPI6_BASE__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)SPI_CR2_DS_9BIT (0x8 << 8)dataSPI_CR1_CPHA_CLK_TRANSITION_2 (1 << 0)SPI3_CR2 SPI_CR2(SPI3_BASE)RCC_CFGR_MCO_NOCLK 0__FLT32_NORM_MAX__ 3.4028234663852886e+38F32I2C1_BASE (PERIPH_BASE_APB + 0x5400)SPI_CR1_CRCL_8BIT (0 << 11)UINT64_C(c) __UINT64_C(c)RCC_CFGR3_USART2SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)RCC_APB2RSTR_TIM16RST (1 << 17)RCC_CFGR_HPRE_DIV256 (0xe << RCC_CFGR_HPRE_SHIFT)__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53SPI_CR1_BR_FPCLK_DIV_32 0x4__ULFRACT_IBIT__ 0RCC_APB1RSTR_PWRRST (1 << 28)INT_FAST16_MAXRCC_AHBRSTR_IOPFRST (1 << 22)SPI_SR(spi_base) MMIO32((spi_base) + 0x08)__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long intIWDG_BASE (PERIPH_BASE_APB + 0x3000)__ARM_FEATURE_CDE_COPROCSPI_CR2_NSSP (1 << 3)UINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| $A„…ŽA+aeabi!6S-MM ñÿ 57!#%')+-/139>o Ò7k¤ Ü 8; $$.@Se‡spi_common_v2.c$t$dwm4.0.88d8b58fcc7cb03c549c2662f5adb422wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.memorymap.h.21.991cbfb03a4e91ff777157049f1f9499wm4.memorymap.h.30.896853dc49eef163ea0904dd4a9a50c4wm4.spi_common_all.h.33.9ea0c3889826c83e4c563d215a234fb7wm4.spi_common_v2.h.34.10c1122c4818b128f05bb1e70d3ba8d7wm4.rcc.h.38.ff8d227a6b85563d2eb792ddaec07026spi_init_masterspi_send8spi_read8spi_set_crcl_8bitspi_set_crcl_16bitspi_set_data_sizespi_fifo_reception_threshold_8bitspi_fifo_reception_threshold_16bit "&-4;BGTYfkx’—´¹ÖÛ÷-2OZ sw}‚ž¬·ÌÐáëïôþ $( ?VmŽ (08@H %+17 !"'#-$7@H%N&Yd'j(x)‚#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýãéïõû %+17=CIOU[agmsy…‹‘—£©¯µ»ÁÇÍÓÙßåëñ÷ý !'-39?EKQW]ciou{‡“™Ÿ¥«±·½ÃÉÏÕÛáçíóùÿ#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýãéïõû %+17=CIOU[agmsy…‹‘—£©¯µ»ÁÇÍÓÙßåëñ÷ý !'-39?EKQW]ciou{‡“™Ÿ¥«±·½ÃÉÏÕÛáçíóùÿ#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýãéïõû 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(SCS_BASE + 0x0D00)__UHA_FBIT__ 8TIM_SMCR_TS_ITR2 (0x2 << 4)TIM_CCMR1_CC2S_MASK (0x3 << 8)TIM_BDTR_OSSR (1 << 11)DMA_BASE (PERIPH_BASE_AHB1 + 0x0000)CORESIGHT_LSR_SLK (1<<1)TIM_CCMR1_IC1F_DTF_DIV_2_N_6 (0x4 << 4)TIM1_CR2 TIM_CR2(TIM1)TIM3_CCR2 TIM_CCR2(TIM3)TIM_CR2_MMS_UPDATE (0x2 << 4)TIM10_CCR1 TIM_CCR1(TIM10)TIM_CR1_UDIS (1 << 1)TIM15_SMCR TIM_SMCR(TIM15)TIM9_SR TIM_SR(TIM9)__FLT64_HAS_INFINITY__ 1TIM_CCMR1_IC2F_DTF_DIV_16_N_8 (0xC << 12)TIM3_DMAR TIM_DMAR(TIM3)TIM_CR1_ARPE (1 << 7)TIM8_BDTR TIM_BDTR(TIM8)__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffffTIM_CR2_CCUS (1 << 2)__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)TIM1_BASE (PERIPH_BASE_APB + 0x12C00)__INTMAX_MAX__ 0x7fffffffffffffffLL__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17TIM_CCMR1_IC1F_CK_INT_N_2 (0x1 << 4)__LDBL_MIN__ 2.2250738585072014e-308LINT_FAST64_MAX__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffUTIM_BDTR_LOCK_LEVEL_3 (0x3 << 8)__ARM_FEATURE_QBITINT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8__DBL_MAX_10_EXP__ 308TIM1_SMCR TIM_SMCR(TIM1)__FRACT_MIN__ (-0.5R-0.5R)TIM2_OR_ITR1_RMP_PTP (0x1 << 10)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLKTIM15_CCMR1 TIM_CCMR1(TIM15)__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned intTIM15_DIER TIM_DIER(TIM15)__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__FLT32_MIN__ 1.1754943508222875e-38F32TIM3_CCR4 TIM_CCR4(TIM3)TIM_CR1_CKD_CK_INT_MUL_4 (0x2 << 8)__USACCUM_MIN__ 0.0UHK__FLT32_DECIMAL_DIG__ 9TIM_CCMR2_IC4F_DTF_DIV_2_N_8 (0x5 << 12)TIM7_CNT TIM_CNT(TIM7)__DECIMAL_DIG__ 17__LDBL_MIN_EXP__ (-1021)__LDBL_MANT_DIG__ 53INT64_MIN (-INT64_MAX - 1)WWDG_BASE (PERIPH_BASE_APB + 0x2c00)TIM_DMAR(tim_base) MMIO32((tim_base) + 0x4C)__UINT8_C(c) c__INT16_TYPE__ short intTIM7_DIER TIM_DIER(TIM7)TIM_CCMR2_IC3PSC_8 (0x3 << 2)__FLT64_MAX__ 1.7976931348623157e+308F64TIM_SMCR_ETPS_ETRP_DIV_2 (0x1 << 12)UINT_FAST32_MAXTIM4_CCR2 TIM_CCR2(TIM4)TIM6_CNT TIM_CNT(TIM6)TIM_SMCR_TS_MASK (0x7 << 4)TIM5_OR_TI4_RMP_LSI (0x1 << 6)INT_FAST64_MAX __INT_FAST64_MAX__TIM2_CCR1 TIM_CCR1(TIM2)TIM_CCMR1_IC1F_DTF_DIV_32_N_6 (0xE << 4)PERIPH_BASE (0x40000000U)TIM_CCMR1_OC2M_TOGGLE (0x3 << 12)__UINT_LEAST16_MAX__ 0xffff__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64TIM_CCMR1_CC2S_IN_TRC (0x3 << 8)TIM_CCMR1_IC1PSC_4 (0x2 << 2)USART5_BASE (PERIPH_BASE_APB + 0x5000)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intGPIO_PORT_C_BASE (PERIPH_BASE_AHB2 + 0x0800)TIM3_ARR TIM_ARR(TIM3)TIM_CCMR2_OC3M_ACTIVE (0x1 << 4)TIM17_DMAR TIM_DMAR(TIM17)INT32_MIN (-INT32_MAX - 1)TIM_CCMR2_IC3F_DTF_DIV_2_N_8 (0x5 << 4)TIM_SMCR_TS_TI1F_ED (0x4 << 4)TIM_BDTR_DBA_MASK (0x1F << 0)TIM6_SR TIM_SR(TIM6)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZTIM17_RCR TIM_RCR(TIM17)__UINTPTR_MAX__ 0xffffffffUTIM13_CCER TIM_CCER(TIM13)TIM4_CNT TIM_CNT(TIM4)TIM2_OR_ITR1_RMP_OTG_FS_SOF (0x2 << 10)__FLT32_MIN_EXP__ (-125)TIM_EGR_CC2G (1 << 2)UINT32_MAX __UINT32_MAX__TIM3_BASE (PERIPH_BASE_APB + 0x0400)TIM_SMCR_ETF_DTS_DIV_4_N_8 (0x7 << 8)TIM4_CCR4 TIM_CCR4(TIM4)USART8_BASE (PERIPH_BASE_APB + 0x11C00)__ULFRACT_FBIT__ 32INT8_MIN (-INT8_MAX - 1)__FLT64_MIN_10_EXP__ (-307)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"TIM3_CNT TIM_CNT(TIM3)BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__TIM_CCMR2_OC3FE (1 << 2)TIM_CR2_OIS4 (1 << 14)TIM_CCMR2_IC3F_DTF_DIV_4_N_8 (0x7 << 4)TIM_CCMR1_IC1F_DTF_DIV_16_N_6 (0xB << 4)__SFRACT_EPSILON__ 0x1P-7HRTIM_CCMR2_OC3PE (1 << 3)TIM_EGR_BG (1 << 7)__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAX__SQ_FBIT__ 31TIM16_SR TIM_SR(TIM16)TIM2_CNT TIM_CNT(TIM2)TIM_CCMR1_OC2M_PWM1 (0x6 << 12)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)TIM_CCMR1_OC1M_ACTIVE (0x1 << 4)TIM7_ARR TIM_ARR(TIM7)__UHQ_FBIT__ 16__FLT64_MIN_EXP__ (-1021)TIM_CCMR1_OC2M_FORCE_HIGH (0x5 << 12)__PTRDIFF_WIDTH__ 32INT_FAST8_MAX__FLT32_MAX_10_EXP__ 38__UINT_FAST8_MAX__ 0xffffffffUPTRDIFF_MINTIM1_CNT TIM_CNT(TIM1)TIM_CCMR2_OC4M_PWM2 (0x7 << 12)TIM_DIER_CC1DE (1 << 9)UINT16_C(c) __UINT16_C(c)TIM_EGR_CC1G (1 << 1)__LACCUM_IBIT__ 32TIM15_ARR TIM_ARR(TIM15)__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__INTPTR_MAX__ 0x7fffffffTIM_BDTR_BKE (1 << 12)__UINT_FAST16_MAX__ 0xffffffffUTIM_CCER_CC3NE (1 << 10)TIM_CCMR2_OC4M_FORCE_LOW (0x4 << 12)INT64_C(c) __INT64_C(c)TIM_CCMR2_IC3F_CK_INT_N_2 (0x1 << 4)TIM_CCMR2_OC3M_PWM1 (0x6 << 4)TIM_CCMR1_IC1F_DTF_DIV_32_N_5 (0xD << 4)__GCC_IEC_559_COMPLEX 0__UFRACT_MIN__ 0.0URTIM_SR_TIF (1 << 6)TIM2_DMAR TIM_DMAR(TIM2)TIM3_DIER TIM_DIER(TIM3)WCHAR_MAX __WCHAR_MAX__TIM2_SR TIM_SR(TIM2)__FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__GPIO_PORT_D_BASE (PERIPH_BASE_AHB2 + 0x0C00)__UINT_LEAST8_TYPE__ unsigned charTIM5_CCR4 TIM_CCR4(TIM5)TIM15_CCR2 TIM_CCR2(TIM15)TIM1_SR TIM_SR(TIM1)TIM_CCMR2_IC3PSC_4 (0x2 << 2)__ACCUM_FBIT__ 15TIM_CCMR2_IC4F_DTF_DIV_16_N_5 (0xA << 12)TIM5_DMAR TIM_DMAR(TIM5)__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX__TIM_CCMR2_CC3S_IN_TI3 (0x1 << 0)__INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1TIM16_DIER TIM_DIER(TIM16)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xNVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32TIM_ARR(tim_base) MMIO32((tim_base) + 0x2C)TIM_CR2_OIS1N (1 << 9)TIM_CCER_CC1NP (1 << 3)TIM16_CR2 TIM_CR2(TIM16)__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 1TIM5_DCR TIM_DCR(TIM5)TIM_SMCR_ETP (1 << 15)BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON__TIM_CCMR2_OC4M_ACTIVE (0x1 << 12)__FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX__TIM12_CR1 TIM_CR1(TIM12)__THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)__ELF__ 1UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64USART2_BASE (PERIPH_BASE_APB + 0x4400)__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4WINT_MIN __WINT_MIN__TIM_BDTR_LOCK_LEVEL_2 (0x2 << 8)TIM_CR2_MMS_COMPARE_OC1REF (0x4 << 4)TIM_CCR4(tim_base) MMIO32((tim_base) + 0x40)TIM11_CR1 TIM_CR1(TIM11)TIM_BDTR_OSSI (1 << 10)TIM_CCMR2_IC3F_DTF_DIV_4_N_6 (0x6 << 4)__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32__FLT32X_MIN_EXP__ (-1021)TIM_CCMR1_OC1M_PWM1 (0x6 << 4)TIM4_DIER TIM_DIER(TIM4)TIM_CCMR2_IC4F_DTF_DIV_8_N_8 (0x9 << 12)TIM17_CCER TIM_CCER(TIM17)INFO_BASE (0x1ffff000U)TIM17_BASE (PERIPH_BASE_APB + 0x14800)TIM_CCMR1_OC1M_INACTIVE (0x2 << 4)TIM8_CCR1 TIM_CCR1(TIM8)BIT27 (1<<27)TIM7_BASE (PERIPH_BASE_APB + 0x1400)TIM_CCMR1_CC1S_OUT (0x0 << 0)TIM_IC_BOTHTIM_SR_CC2OF (1 << 10)__UTA_FBIT__ 64../common/timer_common_f0234.c__FLT_DECIMAL_DIG__ 9__thumb__ 1TIM12_CNT TIM_CNT(TIM12)__INT_LEAST32_MAX__ 0x7fffffffLLIBOPENCM3_MEMORYMAP_COMMON_H signed charTIM_CCMR1_IC2PSC_MASK (0x3 << 10)INT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)TIM10_SR TIM_SR(TIM10)INT32_C(c) __INT32_C(c)TIM7_PSC TIM_PSC(TIM7)__GNUC_STDC_INLINE__ 1__INT64_C(c) c ## LL__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLK__GNUC_PATCHLEVEL__ 1TIM9_EGR TIM_EGR(TIM9)TIM_SMCR(tim_base) MMIO32((tim_base) + 0x08)TIM_SMCR_ETF_DTS_DIV_8_N_6 (0x8 << 8)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)TIM1_CCMR1 TIM_CCMR1(TIM1)TIM_CCMR2_OC4M_FORCE_HIGH (0x5 << 12)UINTPTR_MAX __UINTPTR_MAX____ARM_ARCH_PROFILE 77TIM3_DCR TIM_DCR(TIM3)TIM_CCMR1_IC2F_DTF_DIV_16_N_6 (0xB << 12)TIM1_CCER TIM_CCER(TIM1)GPIO_PORT_E_BASE (PERIPH_BASE_AHB2 + 0x1000)__FLT64_MAX_10_EXP__ 308__WCHAR_WIDTH__ 32MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINTIM5_SR TIM_SR(TIM5)TIM8_EGR TIM_EGR(TIM8)TIM12_CCR1 TIM_CCR1(TIM12)TIM15 TIM15_BASETIM6_CR1 TIM_CR1(TIM6)unsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38TIM2_DCR TIM_DCR(TIM2)TIM8_DCR TIM_DCR(TIM8)__FRACT_MAX__ 0X7FFFP-15RTIM_DIER_CC3DE (1 << 11)TIM_CCMR1_OC2M_INACTIVE (0x2 << 12)PERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)TIM_CCER_CC3P (1 << 9)TIM_SMCR_TS_ITR0 (0x0 << 4)__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5TIM7_EGR TIM_EGR(TIM7)__ARM_ARCH_EXT_IDIV__TIM15_DCR TIM_DCR(TIM15)TIM8_CCER TIM_CCER(TIM8)PERIPH_BASE_APB (PERIPH_BASE + 0x00000000)TIM_CR2_OIS2N (1 << 11)TIM11_ARR TIM_ARR(TIM11)TIM1_DCR TIM_DCR(TIM1)TIM_CCMR1_OC1M_TOGGLE (0x3 << 4)__UINT16_MAX__ 0xffffTIM_CR2_MMS_ENABLE (0x1 << 4)__TQ_FBIT__ 127TIM_SMCR_MSM (1 << 7)TIM_CCER_CC4NP (1 << 15)TIM14_BASE (PERIPH_BASE_APB + 0x2000)__USQ_FBIT__ 32INT_FAST16_MINTIM_CCMR2_CC3S_IN_TRC (0x3 << 0)TIM13_CNT TIM_CNT(TIM13)TIM_CCMR2_IC3F_DTF_DIV_16_N_6 (0xB << 4)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32TIM11_SR TIM_SR(TIM11)TIM_CR1_DIR_DOWN (1 << 4)TIM8_CCR4 TIM_CCR4(TIM8)TIM_CCMR2_IC4F_DTF_DIV_2_N_6 (0x4 << 12)TIM_CCMR1_IC1PSC_MASK (0x3 << 2)SPI1_BASE (PERIPH_BASE_APB + 0x13000)TIM_CCMR1_CC2S_OUT (0x0 << 8)CEC_BASE (PERIPH_BASE_APB + 0x7800)TIM5_EGR TIM_EGR(TIM5)UINT_LEAST8_MAXUINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)TIM5_CCR2 TIM_CCR2(TIM5)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__TIM17_PSC TIM_PSC(TIM17)TIM_CR2_OIS1 (1 << 8)__USA_IBIT__ 16TIM_CCMR2_IC3F_OFF (0x0 << 4)TIM8_CCR2 TIM_CCR2(TIM8)PTRDIFF_MIN (-PTRDIFF_MAX - 1)TIM4_EGR TIM_EGR(TIM4)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__DBL_IS_IEC_60559__ 2__UINT_FAST64_TYPE__ long long unsigned intTIM2_BASE (PERIPH_BASE_APB + 0x0000)TIM16 TIM16_BASETIM_CR2_MMS_COMPARE_PULSE (0x3 << 4)TIM_CCMR1_IC1F_DTF_DIV_4_N_6 (0x6 << 4)__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7TIM_CCMR1_OC2M_FORCE_LOW (0x4 << 12)__FDPIC__TIM2_SMCR TIM_SMCR(TIM2)__UINT32_C(c) c ## UL__FLT32_IS_IEC_60559__ 2TIM3_EGR TIM_EGR(TIM3)INT_FAST64_MIN__USFRACT_IBIT__ 0TIM4_DMAR TIM_DMAR(TIM4)__LDBL_EPSILON__ 2.2204460492503131e-16L__USFRACT_MIN__ 0.0UHRTSC_BASE (PERIPH_BASE_AHB1 + 0x4000)__ARM_NEONTIM_CCMR2_OC3M_FROZEN (0x0 << 4)__UINT8_MAX__ 0xffTIM8_RCR TIM_RCR(TIM8)__LDBL_MAX_EXP__ 1024TIM_CCMR1_IC2F_DTF_DIV_2_N_6 (0x4 << 12)LIBOPENCM3_MEMORYMAP_H TIM17_CR1 TIM_CR1(TIM17)TIM3_SR TIM_SR(TIM3)__DBL_HAS_DENORM__ 1TIM_CCMR2_OC4PE (1 << 11)TIM8_DIER TIM_DIER(TIM8)TIM_SMCR_SMS_ECM1 (0x7 << 0)TIM_CCMR2_IC4F_DTF_DIV_32_N_8 (0xF << 12)TIM5 TIM5_BASE__DA_FBIT__ 31TIM_CCMR2_CC4S_IN_TI3 (0x2 << 8)__GXX_ABI_VERSION 1017TIM_CR2_CCPC (1 << 0)__INT_LEAST16_MAX__ 0x7fffTIM_DCR(tim_base) MMIO32((tim_base) + 0x48)__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LTIM_CCMR2_CC3S_IN_TI4 (0x2 << 0)INT_LEAST32_MAX __INT_LEAST32_MAX____ULLACCUM_EPSILON__ 0x1P-32ULLKTIM11_CNT TIM_CNT(TIM11)TIM_CR2_MMS_COMPARE_OC3REF (0x6 << 4)INT_LEAST8_MAX __INT_LEAST8_MAX__TIM16_BDTR TIM_BDTR(TIM16)TIM_CCMR2_CC3S_OUT (0x0 << 0)TIM_CCMR1_IC2F_DTF_DIV_2_N_8 (0x5 << 12)USART3_BASE (PERIPH_BASE_APB + 0x4800)TIM8_DMAR TIM_DMAR(TIM8)__UACCUM_MIN__ 0.0UK__FLT_EPSILON__ 1.1920928955078125e-7FTIM9_CCR2 TIM_CCR2(TIM9)TIM17 TIM17_BASETIM11_CCMR1 TIM_CCMR1(TIM11)TIM_CCMR1_IC2F_OFF (0x0 << 12)TIM_CCR2(tim_base) MMIO32((tim_base) + 0x38)TIM2_ARR TIM_ARR(TIM2)__ARM_ARCH_ISA_THUMBTIM15_PSC TIM_PSC(TIM15)TIM_SR_CC4IF (1 << 4)TIM_CCMR1_CC1S_IN_TI2 (0x2 << 0)__ARM_FEATURE_MATMUL_INT8TIM_SMCR_ETF_DTS_DIV_16_N_5 (0xA << 8)__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0TIM2_CCMR2 TIM_CCMR2(TIM2)TIM13_CCR1 TIM_CCR1(TIM13)TIM_SMCR_ETF_CK_INT_N_2 (0x1 << 8)DBGMCU_BASE (PERIPH_BASE_APB + 0x15800)__USACCUM_FBIT__ 8TIM9_SMCR TIM_SMCR(TIM9)__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1TIM_BDTR_DBL_MASK (0x1F << 8)__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)TIM16_BASE (PERIPH_BASE_APB + 0x14400)TIM13_CCMR1 TIM_CCMR1(TIM13)__FLT32_HAS_QUIET_NAN__ 1__LDBL_HAS_INFINITY__ 1TIM_CCMR1_OC2PE (1 << 11)TIM_CCMR1_IC2PSC_4 (0x2 << 10)__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308TIM_DIER_CC3IE (1 << 3)__ARM_PCS 1TIM_CCMR1_IC1F_OFF (0x0 << 4)bool _BoolTIM_CCMR2_IC4F_DTF_DIV_32_N_5 (0xD << 12)UINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)TIM9_DIER TIM_DIER(TIM9)__UINT_LEAST8_MAX__ 0xffTIM9_CR1 TIM_CR1(TIM9)BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)TIM15_EGR TIM_EGR(TIM15)INT16_MAX __INT16_MAX__TIM_CCMR2_OC3M_MASK (0x7 << 4)TIM8_PSC TIM_PSC(TIM8)__FLT32X_IS_IEC_60559__ 2TIM_SR_BIF (1 << 7)TIM_CR1_CMS_CENTER_2 (0x2 << 5)TIM1_ARR TIM_ARR(TIM1)SYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXTIM8_CR1 TIM_CR1(TIM8)PERIPH_BASE_AHB1 (PERIPH_BASE + 0x00020000)__INT_LEAST16_WIDTH__ 16TIM_CCMR1_OC1M_FROZEN (0x0 << 4)__DEC_EVAL_METHOD__ 2TIM1_RCR TIM_RCR(TIM1)__ARM_FEATURE_FP16_FMLTIM15_SR TIM_SR(TIM15)INT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHRTIM_CCMR2_CC3S_MASK (0x3 << 0)TIM_DIER(tim_base) MMIO32((tim_base) + 0x0C)TIM5_OR_TI4_RMP_RTC (0x3 << 6)__USFRACT_FBIT__ 8TIM7_CR1 TIM_CR1(TIM7)CORESIGHT_LSR_SLI (1<<0)TIM17_CR2 TIM_CR2(TIM17)TIM_SMCR_SMS_OFF (0x0 << 0)TIM15_CR1 TIM_CR1(TIM15)TIM_CCMR1_OC2FE (1 << 10)/build/libopencm3/lib/stm32/f0__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX__TIM_CCER_CC2P (1 << 5)TIM2_OR_ITR1_RMP_OTG_HS_SOF (0x3 << 10)__UINT32_MAX__ 0xffffffffULTIM13_PSC TIM_PSC(TIM13)TIM_CCMR1_IC1PSC_OFF (0x0 << 2)TIM16_CCR1 TIM_CCR1(TIM16)__INT_LEAST8_MAX__ 0x7fTIM8_SR TIM_SR(TIM8)__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXtimer_ic_set_polarityDAC_BASE (PERIPH_BASE_APB + 0x7400)TIM_CCMR1_IC2F_DTF_DIV_8_N_6 (0x8 << 12)TIM2_CR1 TIM_CR1(TIM2)TIM7_SR TIM_SR(TIM7)TIM5_OR_TI4_RMP_LSE (0x2 << 6)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024TIM_CR1_CKD_CK_INT (0x0 << 8)TIM_SMCR_TS_ETRF (0x7 << 4)TIM5_CR1 TIM_CR1(TIM5)TIM_CCMR1_OC2M_PWM2 (0x7 << 12)__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)TIM_CCMR1_CC1S_IN_TRC (0x3 << 0)TIM8_SMCR TIM_SMCR(TIM8)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1TIM_CCMR1_OC1M_FORCE_HIGH (0x5 << 4)TIM_SMCR_ETF_MASK (0xF << 8)__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fTIM_SMCR_TS_ITR3 (0x3 << 4)BIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)TIM4_CR1 TIM_CR1(TIM4)__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVETIM_CCMR1_OC1M_MASK (0x7 << 4)__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intTIM9_ARR TIM_ARR(TIM9)TIM14_CNT TIM_CNT(TIM14)TIM13_EGR TIM_EGR(TIM13)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__TIM_SR_CC4OF (1 << 12)INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0TIM3_CR1 TIM_CR1(TIM3)ST_VREFINT_CAL MMIO16(0x1FFFF7BA)__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAXTIM_CCER_CC2E (1 << 4)__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32TIM8_ARR TIM_ARR(TIM8)__FRACT_EPSILON__ 0x1P-15RTIM_SR_CC1OF (1 << 9)BIT24 (1<<24)TIM_CCER_CC1NE (1 << 2)__INT32_MAX__ 0x7fffffffLST_TSENSE_CAL2_110C MMIO16(0x1FFFF7C2)TIM9_CCR1 TIM_CCR1(TIM9)UINTMAX_MAXEXTI_BASE (PERIPH_BASE_APB + 0x10400)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_BF16_VECTOR_ARITHMETICTIM14_CCR1 TIM_CCR1(TIM14)TIM4_SMCR TIM_SMCR(TIM4)__FLT32_MANT_DIG__ 24TIM15_CR2 TIM_CR2(TIM15)INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32TIM13_CR1 TIM_CR1(TIM13)__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__INT8_MAX __INT8_MAX__TIM1_CR1 TIM_CR1(TIM1)__INT_LEAST16_TYPE__ short intTIM6_PSC TIM_PSC(TIM6)__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1TIM11_PSC TIM_PSC(TIM11)TIM16_ARR TIM_ARR(TIM16)ADC_BASE (PERIPH_BASE_APB + 0x12400)__DBL_MAX_EXP__ 1024TIM_BDTR(tim_base) MMIO32((tim_base) + 0x44)__ATOMIC_RELEASE 3TIM15_RCR TIM_RCR(TIM15)TIM_CCMR2_IC3PSC_2 (0x1 << 2)UINT_FAST8_MAX__FLT_MANT_DIG__ 24TIM_BDTR_BKP (1 << 13)TIM_CR1_CKD_CK_INT_MUL_2 (0x1 << 8)__UDQ_IBIT__ 0TIM_SMCR_ETF_DTS_DIV_8_N_8 (0x9 << 8)TIM_CR1_OPM (1 << 3)__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1TIM2_CCER TIM_CCER(TIM2)__UACCUM_MAX__ 0XFFFFFFFFP-16UKTIM_SMCR_SMS_MASK (0x7 << 0)__FLT64_NORM_MAX__ 1.7976931348623157e+308F64TIM5_ARR TIM_ARR(TIM5)__FINITE_MATH_ONLY__ 0__LDBL_DENORM_MIN__ 4.9406564584124654e-324LTIM_CCER_CC1E (1 << 0)__INT64_MAX__ 0x7fffffffffffffffLLTIM13_ARR TIM_ARR(TIM13)__ULLFRACT_IBIT__ 0TIM_CCMR2_IC3F_DTF_DIV_8_N_6 (0x8 << 4)MMIO16(addr) (*(volatile uint16_t *)(addr))TIM9_CCMR1 TIM_CCMR1(TIM9)TIM4_ARR TIM_ARR(TIM4)TIM_CCMR2_IC3F_MASK (0xF << 4)__GNUC__ 12WCHAR_MAX__LONG_WIDTH__ 32TIM11_EGR TIM_EGR(TIM11)__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16TIM_CCMR2_OC3M_FORCE_LOW (0x4 << 4)TIM_CR1_CMS_EDGE (0x0 << 5)__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0TIM17_ARR TIM_ARR(TIM17)CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULK__ARM_ARCH 6TIM5_PSC TIM_PSC(TIM5)TIM13_SR TIM_SR(TIM13)TIM2_CCR3 TIM_CCR3(TIM2)__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55TIM_CCMR1_IC2F_CK_INT_N_4 (0x2 << 12)__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXTIM_CR1_CKD_CK_INT_MASK (0x3 << 8)TIM17_BDTR TIM_BDTR(TIM17)__LDBL_HAS_QUIET_NAN__ 1TIM_DIER_CC4DE (1 << 12)TIM_CCMR1_IC2F_DTF_DIV_8_N_8 (0x9 << 12)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)TIM17_DCR TIM_DCR(TIM17)TIM3_PSC TIM_PSC(TIM3)TIM8_CNT TIM_CNT(TIM8)TIM_CCMR1_IC2PSC_OFF (0x0 << 10)__UINT_FAST64_MAX__ 0xffffffffffffffffULL__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1tim_ic_polBIT9 (1<<9)TIM_EGR_CC4G (1 << 4)__FLT32X_MIN__ 2.2250738585072014e-308F32xTIM_SMCR_TS_ITR1 (0x1 << 4)INTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLTIM_SR_UIF (1 << 0)TIM_CCER_CC3E (1 << 8)__ARM_ARCH_PROFILETIM3_SMCR TIM_SMCR(TIM3)__LFRACT_FBIT__ 31__CHAR_BIT__ 8TIM15_BDTR TIM_BDTR(TIM15)__SIZEOF_WCHAR_T__ 4TIM1_BDTR TIM_BDTR(TIM1)TIM_BDTR_MOE (1 << 15)TIM_CCMR1_IC2PSC_2 (0x1 << 10)TIM_CR2_OIS3 (1 << 12)TIM_CCMR2_IC3F_CK_INT_N_8 (0x3 << 4)__UFRACT_MAX__ 0XFFFFP-16URTIM1_DMAR TIM_DMAR(TIM1)INT64_MAXTIM_CCMR2_IC3F_DTF_DIV_8_N_8 (0x9 << 4)TIM_SR(tim_base) MMIO32((tim_base) + 0x10)TIM_DIER_UIE (1 << 0)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0TIM8_CCR3 TIM_CCR3(TIM8)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__TIM_CCMR1_OC2CE (1 << 15)TIM2_OR TIM_OR(TIM2)SYS_TICK_BASE (SCS_BASE + 0x0010)TIM15_CCR1 TIM_CCR1(TIM15)__USER_LABEL_PREFIX__ TIM_CCMR1_IC1F_CK_INT_N_8 (0x3 << 4)__ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)TIM_CCMR2_IC4F_MASK (0xF << 12)SPI2_BASE (PERIPH_BASE_APB + 0x3800)TIM_CR2_MMS_COMPARE_OC4REF (0x7 << 4)TIM_CCR3(tim_base) MMIO32((tim_base) + 0x3C)__INT_FAST32_TYPE__ intTIM_CCMR2_OC3M_FORCE_HIGH (0x5 << 4)CRS_BASE (PERIPH_BASE_APB + 0x6C00)TIM_CCMR1_OC1M_FORCE_LOW (0x4 << 4)unsigned int__INT64_TYPE__ long long int__GCC_ASM_FLAG_OUTPUTS__TIM_CCMR1_IC2F_DTF_DIV_16_N_5 (0xA << 12)__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1TIM4_CCMR1 TIM_CCMR1(TIM4)TIM_SR_CC2IF (1 << 2)__USACCUM_IBIT__ 8TIM_CR1_URS (1 << 2)TIM_CCMR2_IC4F_DTF_DIV_4_N_8 (0x7 << 12)__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UKTIM_CCMR2_IC3F_DTF_DIV_16_N_8 (0xC << 4)TIM_BDTR_LOCK_MASK (0x3 << 8)__FLT_EVAL_METHOD__ 0TIM_DIER_UDE (1 << 8)TIM5_DIER TIM_DIER(TIM5)TIM_CR2_MMS_COMPARE_OC2REF (0x5 << 4)__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32TIM_CCER_CC3NP (1 << 11)__thumb2__RCC_BASE (PERIPH_BASE_AHB1 + 0x1000)__ARM_FEATURE_LDREXTIM2_DIER TIM_DIER(TIM2)__UQQ_FBIT__ 8TIM9_PSC TIM_PSC(TIM9)INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX__TIM_SMCR_SMS_GM (0x5 << 0)__LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4TIM_DIER_CC1IE (1 << 1)__STDC__ 1TIM_BDTR_LOCK_OFF (0x0 << 8)TIM_RCR(tim_base) MMIO32((tim_base) + 0x30)TIM_EGR_UG (1 << 0)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__RTC_BASE (PERIPH_BASE_APB + 0x2800)__UINT8_TYPE__ unsigned charTIM_SMCR_ETF_CK_INT_N_4 (0x2 << 8)TIM_CCMR1_CC1S_MASK (0x3 << 0)TIM_CCMR2_OC4M_MASK (0x7 << 12)__SIG_ATOMIC_TYPE__ intTIM_CCMR1_CC2S_IN_TI1 (0x2 << 8)UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"TIM_CCMR2_IC4F_CK_INT_N_4 (0x2 << 12)INT8_MINTIM_CCMR1_IC1F_DTF_DIV_2_N_8 (0x5 << 4)TIM_SR_CC3OF (1 << 11)TIM_CR1(tim_base) MMIO32((tim_base) + 0x00)true 1__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)TIM_CCMR1_IC1F_DTF_DIV_4_N_8 (0x7 << 4)__LDBL_MIN_10_EXP__ (-307)TIM_IC_RISINGINT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1TIM8_CR2 TIM_CR2(TIM8)TIM_CCMR2_IC3F_DTF_DIV_32_N_6 (0xE << 4)BIT28 (1<<28)__LFRACT_EPSILON__ 0x1P-31LRTIM_CCMR1_OC1PE (1 << 3)TIM2_EGR TIM_EGR(TIM2)TIM16_RCR TIM_RCR(TIM16)TIM_EGR_CC3G (1 << 3)__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX____FLT32X_NORM_MAX__ 1.7976931348623157e+308F32xTIM_CCMR1_IC1F_CK_INT_N_4 (0x2 << 4)__arm__ 1TIM11_DIER TIM_DIER(TIM11)TIM_CCMR1_IC1F_DTF_DIV_16_N_5 (0xA << 4)TIM1_CCR2 TIM_CCR2(TIM1)TIM7_CR2 TIM_CR2(TIM7)TIM_CCMR2_IC4PSC_OFF (0x0 << 10)__FLT32_MIN_10_EXP__ (-37)TIM4_CCER TIM_CCER(TIM4)MMIO64(addr) (*(volatile uint64_t *)(addr))TIM_CCMR2_CC4S_IN_TRC (0x3 << 8)TIM1_EGR TIM_EGR(TIM1)__ARM_FP16_FORMAT_ALTERNATIVETIM17_CNT TIM_CNT(TIM17)__LDBL_NORM_MAX__ 1.7976931348623157e+308LGNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsTIM_CCMR1_IC1F_DTF_DIV_8_N_6 (0x8 << 4)DESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)TIM6_CR2 TIM_CR2(TIM6)TIM8_CCMR1 TIM_CCMR1(TIM8)__TA_IBIT__ 64TIM5_CNT TIM_CNT(TIM5)TIM2_CCR2 TIM_CCR2(TIM2)TIM_IC_FALLINGTIM_SMCR_ETF_DTS_DIV_2_N_6 (0x4 << 8)TIM_SMCR_ETPS_ETRP_DIV_4 (0x2 << 12)TIM4_PSC TIM_PSC(TIM4)__ARM_FEATURE_QRDMXTIM16_CCMR1 TIM_CCMR1(TIM16)TIM_DIER_COMIE (1 << 5)__ARM_ARCH_ISA_THUMB 1DESIG_FLASH_SIZE_BASE (0x1FFFF7CCU)TIM5_CR2 TIM_CR2(TIM5)__LONG_LONG_MAX__ 0x7fffffffffffffffLLTIM_CCMR1_IC2F_CK_INT_N_8 (0x3 << 12)TIM_EGR_TG (1 << 6)__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX____UINT_FAST32_TYPE__ unsigned intTIM_CCMR2_IC4F_DTF_DIV_4_N_6 (0x6 << 12)BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__TIM_CCER_CC4E (1 << 12)__SIZEOF_INT__ 4TIM4_CR2 TIM_CR2(TIM4)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1INT_FAST32_MIN (-INT_FAST32_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1TIM2_PSC TIM_PSC(TIM2)__FLT32_DIG__ 6TIM1_PSC TIM_PSC(TIM1)INT_LEAST16_MAXTIM6_BASE (PERIPH_BASE_APB + 0x1000)PPBI_BASE (0xE0000000U)BIT15 (1<<15)TIM_EGR_COMG (1 << 5)TIM_SMCR_ETF_DTS_DIV_4_N_6 (0x6 << 8)TIM1_CCR3 TIM_CCR3(TIM1)TIM_EGR(tim_base) MMIO32((tim_base) + 0x14)TIM_SMCR_SMS_EM3 (0x3 << 0)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7TIM_CCMR2_IC4F_OFF (0x0 << 12)INT32_MAXTIM_CCMR2_OC4M_PWM1 (0x6 << 12)__ACCUM_MIN__ (-0X1P15K-0X1P15K)TIM_CCER_CC2NE (1 << 6)__ARM_FEATURE_CRYPTOTIM_CCMR2_IC3F_DTF_DIV_32_N_5 (0xD << 4)__INT_LEAST32_TYPE__ long intTIM_CCMR1_IC1F_DTF_DIV_32_N_8 (0xF << 4)TIM5_CCMR2 TIM_CCMR2(TIM5)TIM_SR_COMIF (1 << 5)TIM_CCMR2_OC3M_TOGGLE (0x3 << 4)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULLTIM5_SMCR TIM_SMCR(TIM5)__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2TIM_CR2_OIS2 (1 << 10)BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)__FLT_NORM_MAX__ 3.4028234663852886e+38FUSART1_BASE (PERIPH_BASE_APB + 0x13800)long long unsigned intTIM16_CCER TIM_CCER(TIM16)__FLT_MIN_10_EXP__ (-37)GPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)TIM10_EGR TIM_EGR(TIM10)__ULACCUM_IBIT__ 32TIM_DIER_COMDE (1 << 13)__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int__APCS_32__ 1__DQ_FBIT__ 63TIM_CCMR1(tim_base) MMIO32((tim_base) + 0x18)INT_LEAST64_MAX__SACCUM_IBIT__ 8__UHQ_IBIT__ 0TIM_BDTR_LOCK_LEVEL_1 (0x1 << 8)INT_LEAST8_MINTIM_CCMR1_IC2F_CK_INT_N_2 (0x1 << 12)TIM_CCMR2_IC4PSC_8 (0x3 << 10)BIT29 (1<<29)long unsigned int__INT_FAST16_TYPE__ intUSART7_BASE (PERIPH_BASE_APB + 0x11800)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRTIM16_DCR TIM_DCR(TIM16)__UINT_LEAST16_TYPE__ short unsigned intTIM12_SMCR TIM_SMCR(TIM12)__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intTIM_CCMR2_OC3M_PWM2 (0x7 << 4)__FLT32X_DIG__ 15TIM_SMCR_ETF_DTS_DIV_32_N_5 (0xD << 8)TIM_SMCR_ETF_OFF (0x0 << 8)__UTQ_FBIT__ 128TIM17_CCR1 TIM_CCR1(TIM17)TIM_CCMR1_OC1CE (1 << 7)TIM10_CR1 TIM_CR1(TIM10)timer_peripheral__INT_FAST16_MAX__ 0x7fffffffTIM_CR2_TI1S (1 << 7)DMA2_BASE (PERIPH_BASE_AHB1 + 0x0400)PTRDIFF_MAX __PTRDIFF_MAX__TIM_CCER_CC2NP (1 << 7)TIM10_CCMR1 TIM_CCMR1(TIM10)TIM_CCMR2_IC3F_DTF_DIV_32_N_8 (0xF << 4)TIM_SMCR_ETF_DTS_DIV_16_N_8 (0xC << 8)TIM_CR2_MMS_RESET (0x0 << 4)TIM12_DIER TIM_DIER(TIM12)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKTIM_CCMR1_IC1PSC_8 (0x3 << 2)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRTIM_CR2_CCDS (1 << 3)TIM12_CCR2 TIM_CCR2(TIM12)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intTIM_CR1_DIR_UP (0 << 4)TIM_SMCR_SMS_EM2 (0x2 << 0)TIM_CCMR2_IC4F_DTF_DIV_16_N_8 (0xC << 12)WCHAR_MINDMA1_BASE DMA_BASETIM_CCMR1_IC2F_DTF_DIV_4_N_8 (0x7 << 12)TIM_CR2_OIS3N (1 << 13)BEGIN_DECLS TIM3_CCR1 TIM_CCR1(TIM3)TIM_SMCR_ETF_DTS_DIV_32_N_6 (0xE << 8)INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)TIM_CCMR2_IC3F_DTF_DIV_16_N_5 (0xA << 4)USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)TIM5_CCMR1 TIM_CCMR1(TIM5)TIM_CCER_CC4P (1 << 13)TIM_CCMR2_IC4PSC_4 (0x2 << 10)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)TIM_CCMR2_IC3F_CK_INT_N_4 (0x2 << 4)__ARM_EABI__ 1INT16_MININTPTR_MIN__FLT_IS_IEC_60559__ 2__THUMBEL__ 1TIM_CCMR1_IC1F_DTF_DIV_16_N_8 (0xC << 4)TIM_CCMR2_OC4FE (1 << 10)USART6_BASE (PERIPH_BASE_APB + 0x11400)TIM_SR_CC1IF (1 << 1)__QQ_IBIT__ 0TIM_SMCR_SMS_TM (0x6 << 0)TIM10_CCER TIM_CCER(TIM10)DESIG_UNIQUE_ID_BASE (0x1FFFF7ACU)__LLACCUM_FBIT__ 31__UINTMAX_TYPE__ long long unsigned intTIM_CCMR1_IC2F_DTF_DIV_32_N_6 (0xE << 12)__USQ_IBIT__ 0TIM_SMCR_SMS_RM (0x4 << 0)__UINT_LEAST32_TYPE__ long unsigned intTIM4_SR TIM_SR(TIM4)__ARM_FEATURE_NUMERIC_MAXMINTIM3_CCR3 TIM_CCR3(TIM3)__INTMAX_TYPE__ long long intUINTPTR_MAX__GCC_ATOMIC_INT_LOCK_FREE 1TIM_CCMR2_CC4S_IN_TI4 (0x1 << 8)__CHAR_UNSIGNED__ 1STM32F0 1TIM6_EGR TIM_EGR(TIM6)INTMAX_MAXDEBUG_BASE (SCS_BASE + 0x0DF0)TIM_DIER_CC2DE (1 << 10)TIM3_CCMR1 TIM_CCMR1(TIM3)__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1TIM_CCMR1_IC1F_DTF_DIV_8_N_8 (0x9 << 4)TIM_SMCR_ETF_DTS_DIV_32_N_8 (0xF << 8)__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CTIM3 TIM3_BASETIM_CCR1(tim_base) MMIO32((tim_base) + 0x34)INT64_MINTIM5_CCR1 TIM_CCR1(TIM5)__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intTIM4_CCR1 TIM_CCR1(TIM4)UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULR__ARM_ARCH_6M__ 1TIM_CCMR1_IC2F_DTF_DIV_32_N_5 (0xD << 12)__SIZEOF_SIZE_T__ 4TIM14_ARR TIM_ARR(TIM14)TIM_SMCR_ECE (1 << 14)__UINT64_TYPE__ long long unsigned intI2C2_BASE (PERIPH_BASE_APB + 0x5800)TIM_SR_CC3IF (1 << 3)TIM12_PSC TIM_PSC(TIM12)TIM_CR2_OIS_MASK (0x7f << 8)__LONG_MAX__ 0x7fffffffLTIM15_BASE (PERIPH_BASE_APB + 0x14000)TIM12_SR TIM_SR(TIM12)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16TIM_SMCR_ETF_DTS_DIV_16_N_6 (0xB << 8)FLASH_BASE (0x08000000U)CORESIGHT_LAR_OFFSET 0xfb0TIM_CCMR1_OC1FE (1 << 2)TIM_DIER_CC4IE (1 << 4)FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x2000)short intTIM6_DIER TIM_DIER(TIM6)TIM7 TIM7_BASE__UINT16_C(c) cBIT31 (1<<31)__UDA_IBIT__ 32TIM16_DMAR TIM_DMAR(TIM16)TIM_CR2_MMS_MASK (0x7 << 4)UINT_LEAST32_MAXTIM14_CCER TIM_CCER(TIM14)TIM4_CCR3 TIM_CCR3(TIM4)BIT2 (1<<2)TIM1_CCR1 TIM_CCR1(TIM1)__ATOMIC_RELAXED 0TIM14_CCMR1 TIM_CCMR1(TIM14)__ARM_FEATURE_COPROCTIM_SMCR_TS_TI1FP1 (0x5 << 4)TIM9_CCER TIM_CCER(TIM9)TIM16_EGR TIM_EGR(TIM16)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53TIM13_DIER TIM_DIER(TIM13)TIM10_DIER TIM_DIER(TIM10)BIT5 (1<<5)TIM2_OR_ITR1_RMP_MASK (0x3 << 10)BIT1 (1<<1)USART4_BASE (PERIPH_BASE_APB + 0x4C00)INT8_CINT_LEAST32_MAXTIM_SMCR_ETPS_ETRP_DIV_8 (0x3 << 12)__USES_INITFINI__ 1TIM2_CCR4 TIM_CCR4(TIM2)TIM_CCMR2_IC4F_DTF_DIV_32_N_6 (0xE << 12)__DBL_DECIMAL_DIG__ 17TIM_CCMR2_CC4S_MASK (0x3 << 8)TIM_CCMR2_IC4PSC_MASK (0x3 << 10)BIT8 (1<<8)TIM10_CNT TIM_CNT(TIM10)INT16_C(c) __INT16_C(c)TIM5_OR_TI4_RMP_GPIO (0x0 << 6)TIM_OR(tim_base) MMIO32((tim_base) + 0x50)TIM_CCMR2_IC4F_CK_INT_N_8 (0x3 << 12)TIM_CCMR1_CC1S_IN_TI1 (0x1 << 0)TIM_CR1_CMS_CENTER_3 (0x3 << 5)__INT16_MAX__ 0x7fffTIM_DIER_BIE (1 << 7)__INT_WIDTH__ 32TIM_CCER_CC1P (1 << 1)TIM16_CR1 TIM_CR1(TIM16)TIM6_ARR TIM_ARR(TIM6)TIM_SMCR_ETPS_OFF (0x0 << 12)__QQ_FBIT__ 7TIM_SMCR_ETPS_MASK (0X3 << 12)TIM16_PSC TIM_PSC(TIM16)TIM_CCMR2_IC4F_DTF_DIV_8_N_6 (0x8 << 12)POWER_CONTROL_BASE (PERIPH_BASE_APB + 0x7000)TIM2_CCMR1 TIM_CCMR1(TIM2)__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64TIM_CR2(tim_base) MMIO32((tim_base) + 0x04)TIM12_ARR TIM_ARR(TIM12)__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32TIM5_CCER TIM_CCER(TIM5)TIM17_CCMR1 TIM_CCMR1(TIM17)__ULLFRACT_EPSILON__ 0x1P-64ULLRTIM_CCMR1_IC1F_MASK (0xF << 4)TIM14_SR TIM_SR(TIM14)GPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)__UINT_LEAST32_MAX__ 0xffffffffUL__SIZEOF_WINT_T__ 4TIM15_DMAR TIM_DMAR(TIM15)TIM2 TIM2_BASE__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17TIM11_CCER TIM_CCER(TIM11)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)TIM_CCMR1_OC1M_PWM2 (0x7 << 4)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1TIM5_CCR3 TIM_CCR3(TIM5)__FLT32X_HAS_DENORM__ 1TIM5_OR TIM_OR(TIM5)__ULLACCUM_MIN__ 0.0ULLKTIM_CR1_CMS_MASK (0x3 << 5)__INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1TIM_CCMR2_CC4S_OUT (0x0 << 8)TIM_CCMR2_IC4F_DTF_DIV_16_N_6 (0xB << 12)TIM_CCMR2_OC4M_INACTIVE (0x2 << 12)TIM_CCER(tim_base) MMIO32((tim_base) + 0x20)TIM_CR1_CMS_CENTER_1 (0x1 << 5)TIM_DIER_CC2IE (1 << 2)TIM4_DCR TIM_DCR(TIM4)TIM1_CCR4 TIM_CCR4(TIM1)__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODTIM_CCMR1_IC2F_MASK (0xF << 12)TIM14_EGR TIM_EGR(TIM14)TIM14_PSC TIM_PSC(TIM14)TIM_CR1_CEN (1 << 0)TIM3_CCMR2 TIM_CCMR2(TIM3)TIM2_OR_ITR1_RMP_TIM8_TRGOU (0x0 << 10)TIM_CCMR2_OC4M_TOGGLE (0x3 << 12)__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H TIM4_CCMR2 TIM_CCMR2(TIM4)TIM9_CNT TIM_CNT(TIM9)__GCC_CONSTRUCTIVE_SIZE 64TIM6 TIM6_BASE__LLFRACT_IBIT__ 0TIM_SMCR_TS_TI2FP2 (0x6 << 4)uint32_tBIT12 (1<<12)TIM_CCMR1_OC2M_FROZEN (0x0 << 12)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HKTIM_CCMR2_IC4PSC_2 (0x1 << 10)TIM_CCMR2_IC4F_CK_INT_N_2 (0x1 << 12)TIM_CCMR2_IC3PSC_MASK (0x3 << 2)TIM1_CCMR2 TIM_CCMR2(TIM1)__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8TIM14_CR1 TIM_CR1(TIM14)__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULKTIM_BDTR_DTG_MASK 0x00FF__LDBL_DIG__ 15TIM_SMCR_ETF_CK_INT_N_8 (0x3 << 8)UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXLIBOPENCM3_CM3_MEMORYMAP_H BIT16 (1<<16)TIM_CCMR2_IC3F_DTF_DIV_2_N_6 (0x4 << 4)__WINT_MIN__ 0UINT_LEAST16_MINTIM12_CCMR1 TIM_CCMR1(TIM12)__FLT64_DIG__ 15TIM10_ARR TIM_ARR(TIM10)__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8TIM_DIER_TIE (1 << 6)DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)__DBL_MAX__ ((double)1.7976931348623157e+308L)TIM_SMCR_SMS_EM1 (0x1 << 0)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1TIM1_DIER TIM_DIER(TIM1)UINTMAX_C__LDBL_MAX_10_EXP__ 308INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1__HQ_FBIT__ 15__bool_true_false_are_defined 1TIM17_DIER TIM_DIER(TIM17)TIM14_DIER TIM_DIER(TIM14)TIM16_CNT TIM_CNT(TIM16)BIT26 (1<<26)TIM_CCMR2_OC4M_FROZEN (0x0 << 12)__SIZE_MAX__ 0xffffffffUTIM_CCMR2_OC3CE (1 << 7)__ARM_FEATURE_SATTIM_CCMR1_IC2F_DTF_DIV_4_N_6 (0x6 << 12)__ARM_ARCHINTMAX_C(c) __INTMAX_C(c)TIM_CNT(tim_base) MMIO32((tim_base) + 0x24)__STRICT_ANSI__ 1TIM_CCMR2_OC4CE (1 << 15)TIM1 TIM1_BASETIM12_EGR TIM_EGR(TIM12)TIM_IC1TIM_IC2TIM_IC3TIM_IC4TIM_PSC(tim_base) MMIO32((tim_base) + 0x28)INT_LEAST64_MINPTRDIFF_MAXTIM_CCMR2_OC3M_INACTIVE (0x2 << 4)TIM_CCMR2(tim_base) MMIO32((tim_base) + 0x1C)ST_TSENSE_CAL1_30C MMIO16(0x1FFFF7B8)__LLFRACT_EPSILON__ 0x1P-63LLR__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53TIM14 TIM14_BASE__ARM_ASM_SYNTAX_UNIFIED__TIM5_OR_TI4_RMP_MASK (0x3 << 6)WINT_MAX__INT16_C(c) cINT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32TIM_CCMR1_IC2F_DTF_DIV_32_N_8 (0xF << 12)TIM15_CNT TIM_CNT(TIM15)__ATOMIC_ACQ_REL 4TIM_CCMR1_OC2M_MASK (0x7 << 12)__HQ_IBIT__ 0TIM17_SR TIM_SR(TIM17)__DBL_MIN_10_EXP__ (-307)TIM_CCMR1_IC2PSC_8 (0x3 << 10)TIM15_CCER TIM_CCER(TIM15)TIM12_CCER TIM_CCER(TIM12)TIM_CCMR1_CC2S_IN_TI2 (0x1 << 8)TIM3_CCER TIM_CCER(TIM3)TIM10_PSC TIM_PSC(TIM10)TIM8_CCMR2 TIM_CCMR2(TIM8)TIM17_EGR TIM_EGR(TIM17)TIM_CCMR2_IC3PSC_OFF (0x0 << 2)__FLT32_NORM_MAX__ 3.4028234663852886e+38F32I2C1_BASE (PERIPH_BASE_APB + 0x5400)UINT64_C(c) __UINT64_C(c)TIM3_CR2 TIM_CR2(TIM3)__UINTMAX_MAX__ 0xffffffffffffffffULLTIM11_CCR1 TIM_CCR1(TIM11)__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0TIM_BDTR_AOE (1 << 14)TIM_CCMR1_OC2M_ACTIVE (0x1 << 12)tim_ic_idINT_FAST16_MAX__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long intIWDG_BASE (PERIPH_BASE_APB + 0x3000)__ARM_FEATURE_CDE_COPROCTIM2_CR2 TIM_CR2(TIM2)UINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| &D„ŽA+aeabi!6S-MM ñÿ +-!#%')/@q¢Ô9m¨ .1 ã& timer_common_f0234.c$twm4.0.88d8b58fcc7cb03c549c2662f5adb422wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.memorymap.h.21.991cbfb03a4e91ff777157049f1f9499wm4.memorymap.h.30.896853dc49eef163ea0904dd4a9a50c4wm4.timer_common_all.h.38.1b83078db17784251452104549b9a0aewm4.timer_common_f24.h.39.dbb660608fe9ac16c8091996090fb0edtimer_ic_set_polarity " &-4;BIPUcjx}–œ¢©»ÁÇÎÕà÷ û , '-7@HN^d#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýãéïõû %+17=CIOU[agmsy…‹‘—£©¯µ»ÁÇÍÓÙßåëñ÷ý !'-39?EKQW]ciou{‡“™Ÿ¥«±·½ÃÉÏÕÛáçíóùÿ#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýãéïõû %+17=CIOU[agmsy…‹‘—£©¯µ»ÁÇÍÓÙßåëñ÷ý !'-39?EKQW]ciou{‡“™Ÿ¥«±·½ÃÉÏÕÛáçíóùÿ#)/5;AGMSY_ekqw}ƒ‰•›¡§³¹¿ÅËÑ×Ýãéïõû %+17=CIOU[agmsy…‹‘—£©¯µ»ÁÇÍÓÙßåëñ÷ý !'-39?EKQW]ciou{‡“™Ÿ¥«±·½ÃÉÏÕÛáçíóùÿ # ) / 5 ; A G M S Y _ e k q w } ƒ ‰ • › ¡ § ³ ¹ ¿ Å Ë Ñ × Ý ã é ï õ û % + 1 7 = C I O U [ a g m s y #)/5;AGMSY_ekqx†”›¢©°·¾ÅÌÓÚáèïöý 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USART_RTOR_BLEN_SHIFT)RCC_BDCR_LSEDRV_MEDHI (2 << RCC_BDCR_LSEDRV_SHIFT)RCC_CSR_LPWRRSTF (1 << 31)__FLT64_HAS_INFINITY__ 1RCC_CFGR_PLLMUL_MUL4 (0x02 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB1ENR MMIO32(RCC_BASE + 0x1c)__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffffUSART_CR1_DEDT_VAL(x) ((x) << USART_CR1_DEDT_SHIFT)__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)TIM1_BASE (PERIPH_BASE_APB + 0x12C00)__INTMAX_MAX__ 0x7fffffffffffffffLLRCC_APB1ENR_TIM6EN (1 << 4)__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17USART1_TDR USART_TDR(USART1_BASE)__LDBL_MIN__ 2.2250738585072014e-308LINT_FAST64_MAX__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffU__ARM_FEATURE_QBITRCC_CFGR2_PREDIV_DIV14 0xdRCC_CFGR_SW_HSI (0 << RCC_CFGR_SW_SHIFT)USART2_BRR USART_BRR(USART2_BASE)USART3_ISR USART_ISR(USART3_BASE)INT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8__DBL_MAX_10_EXP__ 308RCC_APB2RSTR_ADCRST (1 << 9)__FRACT_MIN__ (-0.5R-0.5R)RCC_CR_PLLRDY (1 << 25)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7USART_STOPBITS_0_5 USART_CR2_STOPBITS_0_5__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned intRCC_APB1RSTR_USART2RST (1 << 17)RCC_CIR_PLLRDYIE (1 << 12)__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__FLT32_MIN__ 1.1754943508222875e-38F32USART_ISR_LBDF (1 << 8)__USACCUM_MIN__ 0.0UHKRCC_CFGR_PLLSRC_HSI_CLK_DIV2 0x0__FLT32_DECIMAL_DIG__ 9__DECIMAL_DIG__ 17__LDBL_MIN_EXP__ (-1021)UINTPTR_MAX __UINTPTR_MAX____LDBL_MANT_DIG__ 53RCC_CFGR_HPRE_DIV16 (0xb << RCC_CFGR_HPRE_SHIFT)INT64_MIN (-INT64_MAX - 1)WWDG_BASE (PERIPH_BASE_APB + 0x2c00)RCC_CFGR_PLLSRC (1<<16)__UINT8_C(c) c__INT16_TYPE__ short intUSART_STOPBITS_1 USART_CR2_STOPBITS_1__FLT64_MAX__ 1.7976931348623157e+308F64RCC_CFGR3_USART2SW_SYSCLK (1 << RCC_CFGR3_USART2SW_SHIFT)UINT_FAST32_MAXUSART_GTPR_GT_SHIFT 8RCC_CSR_RESET_FLAGS (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF | RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF | RCC_CSR_PINRSTF | RCC_CSR_OBLRSTF)USART1_RTOR USART_RTOR(USART1_BASE)INT_FAST64_MAX __INT_FAST64_MAX__USART_CR3_IRLP (1 << 2)usart_enable_idle_interruptusart_sendUSART_ICR_EOBCF (1 << 12)RCC_BDCR_LSEDRV_MEDLO (1 << RCC_BDCR_LSEDRV_SHIFT)__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64RCC_CFGR_PLLMUL_MUL13 (0x0B << RCC_CFGR_PLLMUL_SHIFT)RCC_CSR_SFTRSTF (1 << 28)USART_CR3_DDRE (1 << 13)USART5_BASE (PERIPH_BASE_APB + 0x5000)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intGPIO_PORT_C_BASE (PERIPH_BASE_AHB2 + 0x0800)USART3_CR2 USART_CR2(USART3_BASE)USART_CR1_M USART_CR1_M0usart_disable_rx_interruptINT32_MIN (-INT32_MAX - 1)RCC_AHBENR_SRAMEN (1 << 2)__FLT32_MAX_10_EXP__ 38USART_CR2_ADDM7 (1 << 4)usart_enable_rx_interruptRCC_CIR MMIO32(RCC_BASE + 0x08)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZUSART_CR1_PS (1 << 9)__UINTPTR_MAX__ 0xffffffffUUSART_CR3_SCARCNT_SHIFT 17RCC_CFGR2_PREDIV_DIV9 0x8__FLT32_MIN_EXP__ (-125)usart_disable_tx_dmaRCC_CIR_HSIRDYC (1 << 18)USART3_BRR USART_BRR(USART3_BASE)USART4_ISR USART_ISR(USART4_BASE)RCC_CFGR2_PREDIV_DIV7 0x6UINT32_MAX __UINT32_MAX__TIM3_BASE (PERIPH_BASE_APB + 0x0400)USART_GTPR_PSC_VAL(x) ((x) << USART_GTPR_PSC_SHIFT)USART8_BASE (PERIPH_BASE_APB + 0x11C00)__ULFRACT_FBIT__ 32RCC_APB2ENR_USART1EN (1 << 14)__FLT64_MIN_10_EXP__ (-307)RCC_APB1ENR_TIM14EN (1 << 8)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__RCC_CFGR_HPRE_SHIFT 4RCC_CFGR_HPRE_DIV4 (0x9 << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_MCOPRE_DIV32 (5 << RCC_CFGR_MCOPRE_SHIFT)__SFRACT_EPSILON__ 0x1P-7HRUSART_CR2_STOPBITS_MASK (0x03 << 12)USART_CR2_ABRMOD_FRAME_0x7F (0x2 << USART_CR2_ABRMOD_SHIFT)__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAXUSART_CR2_SWAP (1 << 15)__UINTPTR_TYPE__ unsigned int__SQ_FBIT__ 31RCC_CFGR3_USART1SW_SHIFT 0RCC_CFGR2_PREDIV 0xfINT_LEAST32_MIN (-INT_LEAST32_MAX - 1)USART_ISR_RXNE (1 << 5)__UHQ_FBIT__ 16USART_CR1_DEDT_SHIFT 16__FLT64_MIN_EXP__ (-1021)__PTRDIFF_WIDTH__ 32INT_FAST8_MAX__UINT_FAST8_MAX__ 0xffffffffUUINT16_C(c) __UINT16_C(c)RCC_APB2ENR_ADCEN (1 << 9)__LACCUM_IBIT__ 32RCC_CFGR_PLLMUL_MUL7 (0x05 << RCC_CFGR_PLLMUL_SHIFT)RCC_BDCR_LSEDRV_SHIFT 3__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__INTPTR_MAX__ 0x7fffffffRCC_CIR_HSERDYC (1 << 19)__UINT_FAST16_MAX__ 0xffffffffURCC_CFGR2_PREDIV_DIV13 0xcUSART_STOPBITS_2 USART_CR2_STOPBITS_2RCC_CFGR2_PREDIV_DIV12 0xbRCC_CFGR3_USART2SW_SHIFT 16__GCC_IEC_559_COMPLEX 0__UFRACT_MIN__ 0.0URUSART_CR2_STOPBITS_1 (0x00 << 12)RCC_CFGR_MCO_SHIFT 24WCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__GPIO_PORT_D_BASE (PERIPH_BASE_AHB2 + 0x0C00)USART_CR3_DMAT (1 << 7)__UINT_LEAST8_TYPE__ unsigned charRCC_AHBENR_GPIOFEN (1 << 22)__ACCUM_FBIT__ 15USART3 USART3_BASEUSART1_CR1 USART_CR1(USART1_BASE)__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17RCC_CFGR_SWS_PLL (2 << RCC_CFGR_SWS_SHIFT)__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1__FLT32X_EPSILON__ 2.2204460492503131e-16F32xNVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32LIBOPENCM3_USART_COMMON_ALL_H __USACCUM_EPSILON__ 0x1P-8UHK__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 1RCC_CR2 MMIO32(RCC_BASE + 0x34)BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON__RCC_CFGR_PPRE_MASK 0x7__FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX__usart_enable_tx_complete_interrupt__THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRUSART_GTPR_PSC_SHIFT 0USART1_CR2 USART_CR2(USART1_BASE)short unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)usart_set_baudrateUINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64USART2_BASE (PERIPH_BASE_APB + 0x4400)__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4WINT_MIN __WINT_MIN__RCC_APB2RSTR_TIM15RST (1 << 16)USART_CR2_STOPBITS_2 (0x02 << 12)USART_CR2_ABREN (1 << 20)USART_MODE_TX USART_CR1_TERCC_APB2RSTR_USART8RST (1 << 7)USART_CR2_CPHA (1 << 9)RCC_BDCR_RTCEN (1 << 15)__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32USART_PARITY_EVEN USART_CR1_PCE__FLT32X_MIN_EXP__ (-1021)INFO_BASE (0x1ffff000U)TIM17_BASE (PERIPH_BASE_APB + 0x14800)USART_ISR_RWU (1 << 19)BIT27 (1<<27)TIM7_BASE (PERIPH_BASE_APB + 0x1400)RCC_CFGR_MCO_LSE 3USART_CR1_TCIE (1 << 6)__UTA_FBIT__ 64usartRCC_CIR_LSERDYC (1 << 17)__FLT_DECIMAL_DIG__ 9__thumb__ 1LIBOPENCM3_MEMORYMAP_COMMON_H signed charINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1usart_recv__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLKRCC_CFGR2_PREDIV_DIV8 0x7__GNUC_PATCHLEVEL__ 1PTRDIFF_MIN__UINT_LEAST16_MAX__ 0xffffRCC_AHBENR_DMA1EN (1 << 0)PPBI_BASE (0xE0000000U)__ARM_ARCH_PROFILE 77RCC_CR2_HSI48ON (1 << 16)RCC_AHBRSTR_IOPBRST (1 << 18)GPIO_PORT_E_BASE (PERIPH_BASE_AHB2 + 0x1000)__FLT64_MAX_10_EXP__ 308__WCHAR_WIDTH__ 32MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINRCC_APB1RSTR_CECRST (1 << 30)__UINT_FAST32_TYPE__ unsigned int__aeabi_uidivEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38__FRACT_MAX__ 0X7FFFP-15RPERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)RCC_CFGR_MCO_SYSCLK 4USART_ICR_IDLECF (1 << 4)__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5RCC_APB2ENR_USART8EN (1 << 7)__ARM_ARCH_EXT_IDIV__USART_CR3_SCARCNT_MASK 0x7PERIPH_BASE_APB (PERIPH_BASE + 0x00000000)USART_CR1_DEDT (0x1F << USART_CR1_DEDT_SHIFT)USART2_CR3 USART_CR3(USART2_BASE)RCC_AHBENR_GPIODEN (1 << 20)RCC_CIR_PLLRDYF (1 << 4)RCC_CSR_LSION (1 << 0)RCC_CFGR2_PREDIV_DIV6 0x5__UINT16_MAX__ 0xffffUSART_CR2_RXINV (1 << 16)__TQ_FBIT__ 127RCC_CFGR_MCO_HSI 5usart_set_stopbitsUSART_CR3_WUFIE (1 << 22)TIM14_BASE (PERIPH_BASE_APB + 0x2000)__USQ_FBIT__ 32USART_CR1(usart_base) MMIO32((usart_base) + 0x00)uint16_tUSART_ISR_CTSIF (1 << 9)USART7 USART7_BASEUSART_RQR(usart_base) MMIO32((usart_base) + 0x18)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32USART_ISR_CMF (1 << 17)RCC_APB1ENR_TIM2EN (1 << 0)RCC_APB1ENR_TIM7EN (1 << 5)SPI1_BASE (PERIPH_BASE_APB + 0x13000)INT_FAST32_MIN (-INT_FAST32_MAX - 1)RCC_CFGR_MCO_MASK 0xfCEC_BASE (PERIPH_BASE_APB + 0x7800)RCC_CIR_LSIRDYF (1 << 0)UINT_LEAST8_MAXRCC_CFGR_SW_HSI48 (3 << RCC_CFGR_SW_SHIFT)RCC_APB1ENR_PWREN (1 << 28)UINT8_C(c) __UINT8_C(c)RCC_CIR_HSIRDYIE (1 << 10)__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__USART4_BRR USART_BRR(USART4_BASE)USART_CR2_ADD_VAL(x) ((x) << USART_CR2_ADD_SHIFT)__USA_IBIT__ 16RCC_CR_HSIRDY (1 << 1)PTRDIFF_MIN (-PTRDIFF_MAX - 1)RCC_CSR_V18PWRRSTF (1 << 23)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__DBL_IS_IEC_60559__ 2__UINT_FAST64_TYPE__ long long unsigned intTIM2_BASE (PERIPH_BASE_APB + 0x0000)RCC_CFGR_PLLMUL_MUL9 (0x07 << RCC_CFGR_PLLMUL_SHIFT)RCC_CFGR_PLLXTPRE (1<<17)RCC_CIR_HSI48RDYC (1 << 22)__FLT_MIN__ 1.1754943508222875e-38Fusart_set_flow_control__HA_FBIT__ 7__FDPIC__RCC_CIR_HSI14RDYIE (1 << 13)RCC_BDCR_LSERDY (1 << 1)__UINT32_C(c) c ## UL__FLT32_IS_IEC_60559__ 2USART_CR3_WUS_START_BIT (0x2 << 20)RCC_CSR_PINRSTF (1 << 26)INT_FAST64_MIN__USFRACT_IBIT__ 0USART8 USART8_BASEUSART_PARITY_NONE 0x00USART_CR2(usart_base) MMIO32((usart_base) + 0x04)USART_CR3_SCEN (1 << 5)__USFRACT_MIN__ 0.0UHRTSC_BASE (PERIPH_BASE_AHB1 + 0x4000)RCC_CFGR_PLLMUL_MUL8 (0x06 << RCC_CFGR_PLLMUL_SHIFT)__ARM_NEONRCC_BDCR_RTCSEL_LSI (2 << RCC_BDCR_RTCSEL_SHIFT)RCC_AHBRSTR_IOPERST (1 << 21)__UINT8_MAX__ 0xffRCC_CR2_HSI14ON (1 << 0)RCC_CFGR_HPRE_DIV8 (0xa << RCC_CFGR_HPRE_SHIFT)USART3_CR3 USART_CR3(USART3_BASE)__LDBL_MAX_EXP__ 1024RCC_CIR_PLLRDYC (1 << 20)LIBOPENCM3_MEMORYMAP_H RCC_CFGR_HPRE_MASK 0xfUSART_FLAG_ORE USART_ISR_OREUSART1_ICR USART_ICR(USART1_BASE)RCC_APB1ENR_USBEN (1 << 23)__DBL_HAS_DENORM__ 1RCC_CIR_LSIRDYIE (1 << 8)RCC_CFGR_MCO_HSI14 1USART_FLAG_TC USART_ISR_TCUSART1_BRR USART_BRR(USART1_BASE)RCC_APB1RSTR_USBRST (1 << 23)__DA_FBIT__ 31__GXX_ABI_VERSION 1017RCC_CFGR_PPRE_DIV16 (7 << RCC_CFGR_PPRE_SHIFT)__INT_LEAST16_MAX__ 0x7fffUSART_ISR_ABRE (1 << 14)__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LUSART_FLAG_PE USART_ISR_PEusart_disable_tx_complete_interruptINT_LEAST32_MAX __INT_LEAST32_MAX__usart_enableRCC_BDCR_LSEDRV_HIGH (3 << RCC_BDCR_LSEDRV_SHIFT)INT_LEAST8_MAX __INT_LEAST8_MAX__USART_FLAG_NF USART_ISR_NFUSART3_BASE (PERIPH_BASE_APB + 0x4800)USART_CR2_CLKEN (1 << 11)RCC_CIR_HSI14RDYF (1 << 5)__UACCUM_MIN__ 0.0UKRCC_CFGR3_USART3SW (3 << RCC_CFGR3_USART2SW_SHIFT)__FLT_EPSILON__ 1.1920928955078125e-7FUSART_CR1_RTOIE (1 << 26)RCC_CR2_HSI14CAL_SHIFT 8USART_ISR_ABRF (1 << 15)USART_CR2_ADD (0xFF << USART_CR2_ADD_SHIFT)__ARM_ARCH_ISA_THUMBRCC_CR_HSEON (1 << 16)RCC_CFGR_MCO_HSE 6RCC_BDCR_RTCSEL_HSE (3 << RCC_BDCR_RTCSEL_SHIFT)__ARM_FEATURE_MATMUL_INT8USART_ISR_REACK (1 << 22)__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0RCC_APB1RSTR_USART5RST (1 << 20)DBGMCU_BASE (PERIPH_BASE_APB + 0x15800)__USACCUM_FBIT__ 8usart_recv_blocking__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1USART_ICR_RTOCF (1 << 11)__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)TIM16_BASE (PERIPH_BASE_APB + 0x14400)RCC_APB2RSTR_USART1RST (1 << 14)__FLT32_HAS_QUIET_NAN__ 1RCC_CFGR2_PREDIV_DIV11 0xaUSART_CR1_RE (1 << 2)RCC_CSR_OBLRSTF (1 << 25)USART_ISR_TXE (1 << 7)__LDBL_HAS_INFINITY__ 1RCC_CFGR_MCOPRE_DIV1 (0 << RCC_CFGR_MCOPRE_SHIFT)__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308USART_ISR_TC (1 << 6)__ARM_PCS 1RCC_CFGR_MCOPRE_DIV8 (3 << RCC_CFGR_MCOPRE_SHIFT)bool _BoolRCC_APB2ENR_TIM15EN (1 << 16)UINTMAX_MAX __UINTMAX_MAX__RCC_CFGR_PLLMUL_MUL12 (0x0A << RCC_CFGR_PLLMUL_SHIFT)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffRCC_APB1RSTR_SPI2RST (1 << 14)RCC_CFGR_PLLMUL_MUL15 (0x0D << RCC_CFGR_PLLMUL_SHIFT)BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)USART_CR1_MME (1 << 13)USART_CR2_ABRMOD_FRAME_0x55 (0x3 << USART_CR2_ABRMOD_SHIFT)INT16_MAX __INT16_MAX__USART_CR3_DEM (1 << 14)RCC_CFGR3_USART1SW_PCLK (0 << RCC_CFGR3_USART1SW_SHIFT)__FLT32X_IS_IEC_60559__ 2SYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXRCC_CFGR_SW_HSE (1 << RCC_CFGR_SW_SHIFT)PERIPH_BASE_AHB1 (PERIPH_BASE + 0x00020000)__INT_LEAST16_WIDTH__ 16RCC_CR_HSITRIM (0x1F << RCC_CR_HSITRIM_SHIFT)RCC_APB1RSTR_TIM14RST (1 << 8)__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLINT16_MIN (-INT16_MAX - 1)_REG_BIT__USFRACT_EPSILON__ 0x1P-8UHRRCC_APB1ENR_I2C1EN (1 << 21)RCC_AHBRSTR_IOPDRST (1 << 20)__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)USART1 USART1_BASERCC_APB2ENR_USART6EN (1 << 5)USART_CR3_WUS_ADDRMATCH (0x0 << 20)USART_CR2_ABRMOD_FALL_EDGE (0x1 << USART_CR2_ABRMOD_SHIFT)/build/libopencm3/lib/stm32/f0__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffULflowcontrol__INT_LEAST8_MAX__ 0x7fRCC_CFGR3_CECSW (1 << 6)__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXDAC_BASE (PERIPH_BASE_APB + 0x7400)USART_CR3_WUS_RXNE (0x3 << 20)RCC_CFGR2_PREDIV_DIV5 0x4RCC_CFGR3_ADCSW (1 << 8)RCC_CIR_LSERDYF (1 << 1)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1RCC_CR_HSICAL_SHIFT 8parity__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fBIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVEUSART_ICR_LBDCF (1 << 8)USART_CR2_LBDIE (1 << 6)__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intUSART_CR2_CPOL (1 << 10)USART_GTPR_GT (0xFF << USART_GTPR_GT_SHIFT)RCC_CR2_HSI14TRIM (31 << RCC_CR2_HSI14TRIM_SHIFT)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0ST_VREFINT_CAL MMIO16(0x1FFFF7BA)__SCHAR_WIDTH__ 8rcc_apb2_frequency rcc_apb1_frequencyBIT18 (1<<18)UINT_FAST16_MAX__UINT_FAST8_TYPE__ unsigned intUSART_RQR_RXFRQ (1 << 3)__LLACCUM_IBIT__ 32RCC_BDCR_RTCSEL_LSE (1 << RCC_BDCR_RTCSEL_SHIFT)__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)RCC_CFGR_HPRE_NODIV (0x0 << RCC_CFGR_HPRE_SHIFT)__INT32_MAX__ 0x7fffffffL__INT64_C(c) c ## LLST_TSENSE_CAL2_110C MMIO16(0x1FFFF7C2)UINTMAX_MAXEXTI_BASE (PERIPH_BASE_APB + 0x10400)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLRCC_CIR_CSSC (1 << 23)__ARM_FEATURE_BF16_VECTOR_ARITHMETICRCC_BDCR_LSEDRV_LOW (0 << RCC_BDCR_LSEDRV_SHIFT)LIBOPENCM3_RCC_H RCC_APB1ENR_CRSEN (1 << 27)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__RCC_CFGR_PLLMUL_MUL6 (0x04 << RCC_CFGR_PLLMUL_SHIFT)INT8_MAX __INT8_MAX__RCC_CSR_LSIRDY (1 << 1)BIT28 (1<<28)__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1RCC_CFGR3_USART3SW_SYSCLK (1 << RCC_CFGR3_USART2SW_SHIFT)ADC_BASE (PERIPH_BASE_APB + 0x12400)RCC_CFGR_PPRE_DIV4 (5 << RCC_CFGR_PPRE_SHIFT)__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24clock__UDQ_IBIT__ 0RCC_CR_HSERDY (1 << 17)__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1RCC_AHBENR_CRCEN (1 << 6)__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64RCC_BDCR MMIO32(RCC_BASE + 0x20)UINTPTR_MAXRCC_CR2_HSI14DIS (1 << 2)__LDBL_DENORM_MIN__ 4.9406564584124654e-324LRCC_APB1RSTR_WWDGRST (1 << 11)__INT64_MAX__ 0x7fffffffffffffffLLUSART_CR3_DMAR (1 << 6)__ULLFRACT_IBIT__ 0USART_FLAG_FE USART_ISR_FERCC_CFGR_HPRE (0xf << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_MCOPRE_DIV2 (1 << RCC_CFGR_MCOPRE_SHIFT)__INTMAX_WIDTH__ 64MMIO16(addr) (*(volatile uint16_t *)(addr))USART_FLOWCONTROL_NONE 0x00USART_RDR(usart_base) MMIO32((usart_base) + 0x24)USART_CR3_OVRDIS (1 << 12)__GNUC__ 12RCC_CFGR_SW (3 << RCC_CFGR_SW_SHIFT)WCHAR_MAXRCC_CFGR3_USBSW (1 << 7)__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16RCC_CFGR3_USART2SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0UUSART_CR2_LINEN (1 << 14)__UQQ_IBIT__ 0RCC_CFGR_SWS_SHIFT 2CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULKRCC_CIR_HSIRDYF (1 << 2)__INT_MAX__ 0x7fffffff__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXrcc_apb1_frequencyRCC_APB1ENR_USART3EN (1 << 18)__LDBL_HAS_QUIET_NAN__ 1__LONG_LONG_WIDTH__ 64BIT6 (1<<6)RCC_APB1ENR_I2C2EN (1 << 22)USART1_RDR USART_RDR(USART1_BASE)RCC_CFGR_MCOPRE_SHIFT 28__UINT_FAST64_MAX__ 0xffffffffffffffffULLRCC_APB2RSTR MMIO32(RCC_BASE + 0x0c)__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1RCC_CIR_LSIRDYC (1 << 16)RCC_CFGR_MCO_LSI 2BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024RCC_CFGR2_PREDIV_NODIV 0x0UINT16_MAXRCC_APB1ENR_USART5EN (1 << 20)__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLUSART_CR1_CMIE (1 << 14)RCC_CFGR3_USART2SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)RCC_APB1ENR_CANEN (1 << 25)RCC_CFGR_MCO_HSI48 8__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4RCC_CFGR_SWS_HSE (1 << RCC_CFGR_SWS_SHIFT)USART_ISR_NF (1 << 2)RCC_CFGR3_USART3SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)USART_ICR_NCF (1 << 2)RCC_BDCR_RTCSEL_NOCLK (0 << RCC_BDCR_RTCSEL_SHIFT)RCC_CR_HSION (1 << 0)__UFRACT_MAX__ 0XFFFFP-16URUSART_CR3_HDSEL (1 << 3)usart_disable_rx_dmaINT64_MAXUSART4_TDR USART_TDR(USART4_BASE)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0RCC_CFGR3 MMIO32(RCC_BASE + 0x30)../common/usart_common_all.cUSART5 USART5_BASEUSART_STOPBITS_1_5 USART_CR2_STOPBITS_1_5USART_CR1_UE (1 << 0)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__RCC_CFGR3_USARTxSW_MASK 3USART_CR3_EIE (1 << 0)SYS_TICK_BASE (SCS_BASE + 0x0010)RCC_CR2_HSI48RDY (1 << 17)RCC_CFGR3_USART1SW_HSI (3 << RCC_CFGR3_USART1SW_SHIFT)__USER_LABEL_PREFIX__ USART_FLAG_TXE USART_ISR_TXE__ARM_32BIT_STATE__UFRACT_FBIT__ 16usart_enable_tx_dma__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)RCC_CFGR_PPRE_DIV2 (4 << RCC_CFGR_PPRE_SHIFT)SPI2_BASE (PERIPH_BASE_APB + 0x3800)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)USART_RQR_MMRQ (1 << 2)__INT_FAST32_TYPE__ intCRS_BASE (PERIPH_BASE_APB + 0x6C00)unsigned int__GCC_ASM_FLAG_OUTPUTS__USART_CR2_LBCL (1 << 8)__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1RCC_APB1RSTR_DACRST (1 << 29)USART_FLAG_RXNE USART_ISR_RXNERCC_CFGR_MCO_NOCLK 0USART2_CR1 USART_CR1(USART2_BASE)RCC_CFGR_MCOPRE_DIV64 (6 << RCC_CFGR_MCOPRE_SHIFT)__USACCUM_IBIT__ 8RCC_CFGR3_USART3SW_SHIFT 18USART_ISR_RTOF (1 << 11)__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UKRCC_BDCR_RTCSEL_SHIFT 8USART_MODE_TX_RX (USART_CR1_RE | USART_CR1_TE)RCC_APB1RSTR_USART4RST (1 << 19)USART_CR2_ABRMOD_STARTBIT (0x0 << USART_CR2_ABRMOD_SHIFT)RCC_CFGR3_USART1SW (3 << RCC_CFGR3_USART1SW_SHIFT)__FLT_EVAL_METHOD__ 0USART_CR2_ABRMOD_MASK 3__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__thumb2__LIBOPENCM3_RCC_COMMON_ALL_H RCC_BASE (PERIPH_BASE_AHB1 + 0x1000)__ARM_FEATURE_LDREXUSART_RQR_TXFRQ (1 << 4)__UQQ_FBIT__ 8USART_TDR_MASK (0x1FF << 0)INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4bits__STDC__ 1RCC_APB2RSTR_SYSCFGRST (1 << 0)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__RTC_BASE (PERIPH_BASE_APB + 0x2800)__UINT8_TYPE__ unsigned charRCC_AHBRSTR_TSCRST (1 << 24)RCC_AHBENR_GPIOCEN (1 << 19)__SIG_ATOMIC_TYPE__ intUSART4_CR3 USART_CR3(USART4_BASE)RCC_AHBENR_FLTFEN (1 << 4)UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINRCC_CFGR_HPRE_DIV512 (0xf << RCC_CFGR_HPRE_SHIFT)PERIPH_BASE (0x40000000U)true 1USART_RTOR_BLEN_VAL(x) ((x) << USART_RTOR_BLEN_SHIFT)__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)USART_ISR_TEACK (1 << 21)RCC_APB2ENR MMIO32(RCC_BASE + 0x18)RCC_CSR_IWDGRSTF (1 << 29)__LDBL_MIN_10_EXP__ (-307)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1RCC_CFGR_PLLMUL (0x0F << RCC_CFGR_PLLMUL_SHIFT)USART_CR1_OVER8 (1 << 15)__LFRACT_EPSILON__ 0x1P-31LRUSART_CR1_M1 (1 << 28)RCC_CR2_HSI14CAL (0xFF << RCC_CR2_HSI14CAL_SHIFT)__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX__unsigned char__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32xUSART3_CR1 USART_CR1(USART3_BASE)__arm__ 1usart_disable_tx_interruptRCC_CFGR_PLLMUL_MUL3 (0x01 << RCC_CFGR_PLLMUL_SHIFT)USART2_RQR USART_RQR(USART2_BASE)__FLT32_MIN_10_EXP__ (-37)MMIO64(addr) (*(volatile uint64_t *)(addr))__ARM_FP16_FORMAT_ALTERNATIVEUSART_CR3_RTSE (1 << 8)__LDBL_NORM_MAX__ 1.7976931348623157e+308LRCC_APB1RSTR_CANRST (1 << 25)INTPTR_MINRCC_AHBENR_DMAEN RCC_AHBENR_DMA1ENDESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)RCC_APB1RSTR_TIM2RST (1 << 0)RCC_CFGR_PLLMUL_MUL10 (0x08 << RCC_CFGR_PLLMUL_SHIFT)USART_FLOWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE)__TA_IBIT__ 64__ARM_FEATURE_SIMD32RCC_CR2_HSI14RDY (1 << 1)RCC_CFGR2_PREDIV_DIV4 0x3__ARM_FEATURE_QRDMX__ARM_ARCH_ISA_THUMB 1DESIG_FLASH_SIZE_BASE (0x1FFFF7CCU)USART_ISR_SBKF (1 << 18)USART_ICR_FECF (1 << 1)__LONG_LONG_MAX__ 0x7fffffffffffffffLLRCC_CSR_RMVF (1 << 24)__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__USART_CR2_MSBFIRST (1 << 19)RCC_CFGR_MCOPRE_DIV16 (4 << RCC_CFGR_MCOPRE_SHIFT)INT64_C(c) __INT64_C(c)BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0USART_GTPR_GT_VAL(x) ((x) << USART_GTPR_GT_SHIFT)_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1USART4 USART4_BASEUSART_CR1_TE (1 << 3)RCC_CFGR_SWS_HSI48 (3 << RCC_CFGR_SWS_SHIFT)USART2_ICR USART_ICR(USART2_BASE)INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1USART_CR3_CTSE (1 << 9)__FLT32_DIG__ 6INT_LEAST16_MAXTIM6_BASE (PERIPH_BASE_APB + 0x1000)BIT15 (1<<15)RCC_APB2RSTR_DBGMCURST (1 << 22)USART_CR1_IDLEIE (1 << 4)RCC_CFGR_PLLXTPRE_HSE_CLK 0x0USART4_CR1 USART_CR1(USART4_BASE)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7INT32_MAXUSART_CR3_SCARCNT_DISABLE (0 << USART_CR3_SCARCNT_SHIFT)RCC_BDCR_BDRST (1 << 16)USART3_RQR USART_RQR(USART3_BASE)__ACCUM_MIN__ (-0X1P15K-0X1P15K)USART6 USART6_BASEusart_enable_error_interrupt__ARM_FEATURE_CRYPTOUSART_ISR_PE (1 << 0)__INT_LEAST32_TYPE__ long intRCC_CFGR_PLLXTPRE_HSE_CLK_DIV2 0x1RCC_CFGR_PLLNODIV (1 << 31)USART_CR1_RXNEIE (1 << 5)RCC_AHBENR_DMA2EN (1 << 1)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0USART2_RDR USART_RDR(USART2_BASE)RCC_CIR_HSI48RDYF (1 << 6)UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2RCC_APB2ENR_DBGMCUEN (1 << 22)BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)__FLT_NORM_MAX__ 3.4028234663852886e+38FUSART1_BASE (PERIPH_BASE_APB + 0x13800)RCC_CFGR3_USART1SW_LSE (2 << RCC_CFGR3_USART1SW_SHIFT)long long unsigned intUSART_CR2_DATAINV (1 << 18)__FLT_MIN_10_EXP__ (-37)GPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)RCC_AHBENR_GPIOAEN (1 << 17)__ULACCUM_IBIT__ 32RCC_AHBENR_GPIOEEN (1 << 21)__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ intRCC_CFGR_PPRE_NODIV (0 << RCC_CFGR_PPRE_SHIFT)__APCS_32__ 1__DQ_FBIT__ 63USART_CR2_STOPBITS_1_5 (0x03 << 12)INT_LEAST64_MAX__SACCUM_IBIT__ 8reg32RCC_CR_HSITRIM_SHIFT 3__UHQ_IBIT__ 0INT_LEAST8_MINUSART_CR2_RTOEN (1 << 23)RCC_CFGR_MCOPRE_DIV4 (2 << RCC_CFGR_MCOPRE_SHIFT)BIT29 (1<<29)RCC_CFGR_SWS (3 << RCC_CFGR_SWS_SHIFT)__INT_FAST16_TYPE__ intRCC_CFGR_ADCPRE (1<<14)USART7_BASE (PERIPH_BASE_APB + 0x11800)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRRCC_AHBRSTR_IOPCRST (1 << 19)__UINT_LEAST16_TYPE__ short unsigned intUSART_FLAG_IDLE USART_ISR_IDLE__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intusart_disable_error_interruptRCC_CIR_HSERDYIE (1 << 11)__FLT32X_DIG__ 15USART3_ICR USART_ICR(USART3_BASE)USART_ICR_CMCF (1 << 17)RCC_APB1RSTR_CRSRST (1 << 27)__UTQ_FBIT__ 128USART4_GTPR USART_GTPR(USART4_BASE)USART_CR3_ONEBIT (1 << 11)usart_wait_send_ready__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffRCC_APB1ENR_TIM3EN (1 << 1)USART_CR1_PEIE (1 << 8)DMA2_BASE (PERIPH_BASE_AHB1 + 0x0400)PTRDIFF_MAX __PTRDIFF_MAX__RCC_CFGR2_PREDIV_DIV16 0xfRCC_CFGR_PLLMUL_MUL14 (0x0C << RCC_CFGR_PLLMUL_SHIFT)__ARM_ARCH 6USART_CR2_LBDL (1 << 5)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKUSART4_RQR USART_RQR(USART4_BASE)RCC_CFGR3_USART2SW (3 << RCC_CFGR3_USART2SW_SHIFT)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRRCC_CFGR_HPRE_DIV128 (0xd << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_PLLMUL_MUL5 (0x03 << RCC_CFGR_PLLMUL_SHIFT)RCC_AHBRSTR MMIO32(RCC_BASE + 0x28)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intRCC_APB2RSTR_USART7RST (1 << 6)USART_ICR_ORECF (1 << 3)USART3_RDR USART_RDR(USART3_BASE)usart_disable_idle_interruptRCC_CFGR3_I2C1SW (1 << 4)WCHAR_MINUSART_ICR_TCCF (1 << 6)DMA1_BASE DMA_BASEusart_disableRCC_CSR_PORRSTF (1 << 27)BEGIN_DECLS USART_ISR_EOBF (1 << 12)_REG_BIT(base,bit) (((base) << 5) + (bit))RCC_APB2RSTR_TIM1RST (1 << 11)USART_CR2_STOPBITS_SHIFT 12USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)RCC_CSR MMIO32(RCC_BASE + 0x24)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)USART2_RTOR USART_RTOR(USART2_BASE)USART_ISR_CTS (1 << 10)__ARM_EABI__ 1RCC_APB2RSTR_SPI1RST (1 << 12)INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1RCC_CR_HSICAL (0xFF << RCC_CR_HSICAL_SHIFT)RCC_CIR_HSERDYF (1 << 3)USART_RQR_SBKRQ (1 << 1)USART6_BASE (PERIPH_BASE_APB + 0x11400)USART2_TDR USART_TDR(USART2_BASE)__QQ_IBIT__ 0USART_ICR_PECF (1 << 0)USART_FLOWCONTROL_RTS USART_CR3_RTSEUSART4_ICR USART_ICR(USART4_BASE)RCC_CR_PLLON (1 << 24)RCC_APB1RSTR_TIM7RST (1 << 5)DESIG_UNIQUE_ID_BASE (0x1FFFF7ACU)__LLACCUM_FBIT__ 31RCC_CFGR_HPRE_DIV64 (0xc << RCC_CFGR_HPRE_SHIFT)__UINTMAX_TYPE__ long long unsigned intRCC_BDCR_RTCSEL (3 << RCC_BDCR_RTCSEL_SHIFT)__USQ_IBIT__ 0__UINT_LEAST32_TYPE__ long unsigned intRCC_CFGR_SW_PLL (2 << RCC_CFGR_SW_SHIFT)RCC_APB2ENR_USART7EN (1 << 6)__ARM_FEATURE_NUMERIC_MAXMINUSART_CR1_TXEIE (1 << 7)__INTMAX_TYPE__ long long intRCC_CFGR2_PREDIV_DIV3 0x2__GCC_ATOMIC_INT_LOCK_FREE 1RCC_APB2RSTR_TIM17RST (1 << 18)STM32F0 1INTMAX_MAXDEBUG_BASE (SCS_BASE + 0x0DF0)USART_RTOR_RTO_SHIFT 0RCC_APB1ENR_SPI2EN (1 << 14)RCC_CIR_CSSF (1 << 7)__ARM_FEATURE_FP16_SCALAR_ARITHMETICUSART_PARITY_ODD (USART_CR1_PS | USART_CR1_PCE)__DBL_HAS_QUIET_NAN__ 1__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CUSART4_RDR USART_RDR(USART4_BASE)USART2 USART2_BASERCC_APB1ENR_WWDGEN (1 << 11)INT64_MINRCC_CFGR_PPRE_SHIFT 8__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_Cusart_wait_recv_readyUSART_CR1_WAKE (1 << 11)UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRUSART1_GTPR USART_GTPR(USART1_BASE)__ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned intI2C2_BASE (PERIPH_BASE_APB + 0x5800)GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsUSART4_RTOR USART_RTOR(USART4_BASE)usart_enable_tx_interruptRCC_APB2ENR_TIM16EN (1 << 17)__LDBL_EPSILON__ 2.2204460492503131e-16L__LONG_MAX__ 0x7fffffffLTIM15_BASE (PERIPH_BASE_APB + 0x14000)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16RCC_CFGR_PLLSRC_HSE_CLK 0x1FLASH_BASE (0x08000000U)CORESIGHT_LAR_OFFSET 0xfb0USART_ISR_FE (1 << 1)USART3_TDR USART_TDR(USART3_BASE)RCC_BDCR_LSEON (1 << 0)USART_ICR_CTSCF (1 << 9)FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x2000)short intRCC_AHBENR_GPIOBEN (1 << 18)USART_RDR_MASK (0x1FF << 0)__UINT16_C(c) cBIT31 (1<<31)__UDA_IBIT__ 32modeUSART_CR1_EOBIE (1 << 27)USART_FLOWCONTROL_CTS USART_CR3_CTSEUINT_LEAST32_MAXBIT2 (1<<2)RCC_CFGR_MCOPRE_DIV128 (7 << RCC_CFGR_MCOPRE_SHIFT)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCUSART_ISR(usart_base) MMIO32((usart_base) + 0x1C)RCC_APB1ENR_DACEN (1 << 29)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53RCC_BDCR_LSEBYP (1 << 2)USART_CR1_M0 (1 << 12)usart_set_databitsBIT5 (1<<5)BIT1 (1<<1)USART4_BASE (PERIPH_BASE_APB + 0x4C00)INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1USART_CR3_CTSIE (1 << 10)RCC_APB1RSTR_TIM6RST (1 << 4)__DBL_DECIMAL_DIG__ 17BIT8 (1<<8)RCC_CFGR3_USART3SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)USART_CR3_IREN (1 << 1)INT16_C(c) __INT16_C(c)RCC_CFGR2 MMIO32(RCC_BASE + 0x2c)__INT16_MAX__ 0x7fffUSART3_GTPR USART_GTPR(USART3_BASE)RCC_APB2ENR_TIM17EN (1 << 18)RCC_APB1RSTR_USART3RST (1 << 18)USART_RTOR(usart_base) MMIO32((usart_base) + 0x14)USART2_GTPR USART_GTPR(USART2_BASE)__INT_WIDTH__ 32RCC_APB1RSTR_PWRRST (1 << 28)RCC_APB1ENR_CECEN (1 << 30)USART_TDR(usart_base) MMIO32((usart_base) + 0x28)RCC_CR_HSEBYP (1 << 18)__QQ_FBIT__ 7POWER_CONTROL_BASE (PERIPH_BASE_APB + 0x7000)__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64USART_MODE_RX USART_CR1_RERCC_CFGR3_USART3SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)RCC_CFGR2_PREDIV_DIV2 0x1__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32RCC_CFGR MMIO32(RCC_BASE + 0x04)__ULLFRACT_EPSILON__ 0x1P-64ULLRGPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)RCC_CR2_HSI48CAL (0xFF << RCC_CR2_HSI48CAL_SHIFT)__SIZEOF_WINT_T__ 4USART_ISR_IDLE (1 << 4)__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17USART_GTPR_PSC (0xFF << USART_GTPR_PSC_SHIFT)USART_CR1_PCE (1 << 10)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1RCC_BDCR_LSEDRV (3 << RCC_BDCR_LSEDRV_SHIFT)USART_BRR(usart_base) MMIO32((usart_base) + 0x0C)__FLT32X_HAS_DENORM__ 1USART_CR2_ADD_SHIFT 24__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1USART_CR1_DEAT_SHIFT 21RCC_CFGR_PPRE (7 << RCC_CFGR_PPRE_SHIFT)RCC_CFGR_MCOPRE (7 << RCC_CFGR_MCOPRE_SHIFT)RCC_CFGR_PLLMUL_MUL11 (0x09 << RCC_CFGR_PLLMUL_SHIFT)RCC_CR MMIO32(RCC_BASE + 0x00)USART_CR3_NACK (1 << 4)__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODUSART1_RQR USART_RQR(USART1_BASE)USART1_CR3 USART_CR3(USART1_BASE)USART_ICR_WUCF (1 << 20)RCC_APB1RSTR_TIM3RST (1 << 1)USART1_ISR USART_ISR(USART1_BASE)usart_set_mode__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H RCC_CR2_HSI48CAL_SHIFT 24USART_CR3_SCARCNT_VAL(x) ((x) << USART_CR3_SCARCNT_SHIFT)RCC_CFGR_PLLMUL_MUL16 (0x0E << RCC_CFGR_PLLMUL_SHIFT)__GCC_CONSTRUCTIVE_SIZE 64USART_CR3(usart_base) MMIO32((usart_base) + 0x08)__LLFRACT_IBIT__ 0uint32_tUSART2_CR2 USART_CR2(USART2_BASE)BIT12 (1<<12)RCC_CFGR_PLLMUL_MUL2 (0x00 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB1ENR_USART4EN (1 << 19)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HKRCC_CIR_HSI14RDYC (1 << 21)USART_FLOWCONTROL_MASK (USART_CR3_RTSE | USART_CR3_CTSE)RCC_CFGR_SW_SHIFT 0RCC_CFGR2_PREDIV_DIV10 0x9__UINT_FAST16_TYPE__ unsigned intUSART_CR1_UESM (1 << 1)__UHA_IBIT__ 8RCC_CSR_WWDGRSTF (1 << 30)RCC_APB1RSTR_I2C2RST (1 << 22)__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULKUSART_RTOR_RTO_MASK (0xFFFFF << USART_RTOR_RTO_SHIFT)__LDBL_DIG__ 15UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXLIBOPENCM3_CM3_MEMORYMAP_H BIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MINUSART_ISR_ORE (1 << 3)__FLT64_DIG__ 15RCC_APB2ENR_TIM1EN (1 << 11)__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8RCC_CFGR3_USART1SW_SYSCLK (1 << RCC_CFGR3_USART1SW_SHIFT)DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)__ULLACCUM_EPSILON__ 0x1P-32ULLKRCC_AHBENR_TSCEN (1 << 24)__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_C__LDBL_MAX_10_EXP__ 308stopbitsRCC_CFGR_PPRE_DIV8 (6 << RCC_CFGR_PPRE_SHIFT)INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1RCC_CFGR_HPRE_DIV2 (0x8 << RCC_CFGR_HPRE_SHIFT)__HQ_FBIT__ 15__bool_true_false_are_defined 1USART3_RTOR USART_RTOR(USART3_BASE)RCC_APB1RSTR MMIO32(RCC_BASE + 0x10)BIT26 (1<<26)RCC_CR2_HSI14TRIM_SHIFT 3__SIZE_MAX__ 0xffffffffUUSART_CR2_ABRMOD_SHIFT 21__ARM_FEATURE_SATUSART_ICR(usart_base) MMIO32((usart_base) + 0x20)usart_send_blocking__ARM_ARCHINTMAX_C(c) __INTMAX_C(c)__STRICT_ANSI__ 1RCC_CIR_HSI48RDYIE (1 << 14)INT_FAST16_MINRCC_CFGR_SWS_HSI (0 << RCC_CFGR_SWS_SHIFT)INT_LEAST64_MINPTRDIFF_MAXRCC_APB1RSTR_I2C1RST (1 << 21)RCC_CFGR_PLLMUL_SHIFT 18ST_TSENSE_CAL1_30C MMIO16(0x1FFFF7B8)__LLFRACT_EPSILON__ 0x1P-63LLRRCC_APB2RSTR_USART6RST (1 << 5)__SFRACT_MAX__ 0X7FP-7HR__FLT32X_MANT_DIG__ 53RCC_CFGR_MCO_PLL 7__ARM_ASM_SYNTAX_UNIFIED__USART_MODE_MASK (USART_CR1_RE | USART_CR1_TE)WINT_MAX__INT16_C(c) cRCC_APB1ENR_USART2EN (1 << 17)INT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32__INT_LEAST16_TYPE__ short intRCC_AHBENR MMIO32(RCC_BASE + 0x14)USART_RTOR_BLEN_SHIFT 24USART_CR2_STOPBITS_0_5 (0x01 << 12)__ATOMIC_ACQ_REL 4RCC_CFGR_PLLSRC0 (1<<15)__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)dataRCC_AHBRSTR_IOPARST (1 << 17)RCC_CR_CSSON (1 << 19)RCC_APB2ENR_SPI1EN (1 << 12)USART_ISR_WUF (1 << 20)USART2_ISR USART_ISR(USART2_BASE)__FLT32_NORM_MAX__ 3.4028234663852886e+38F32USART_GTPR(usart_base) MMIO32((usart_base) + 0x10)I2C1_BASE (PERIPH_BASE_APB + 0x5400)UINT64_C(c) __UINT64_C(c)RCC_CFGR3_USART2SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)RCC_APB2RSTR_TIM16RST (1 << 17)USART_CR1_DEAT_VAL(x) ((x) << USART_CR1_DEAT_SHIFT)RCC_CFGR_HPRE_DIV256 (0xe << RCC_CFGR_HPRE_SHIFT)__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0USART_CR2_TXINV (1 << 17)USART_RQR_ABKRQ (1 << 0)INT_FAST16_MAXRCC_AHBRSTR_IOPFRST (1 << 22)USART_RTOR_RTO_VAL(x) ((x) << USART_RTOR_RTO_SHIFT)LIBOPENCM3_USART_H __INT_LEAST64_TYPE__ long long intusart_enable_rx_dmaIWDG_BASE (PERIPH_BASE_APB + 0x3000)__ARM_FEATURE_CDE_COPROCUSART_ISR_BUSY (1 << 16)UINT32_CUSART_PARITY_MASK (USART_CR1_PS | USART_CR1_PCE)GCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| B„Ž A„…†ŽA„Ž A+aeabi!6S-MM ñÿ !!""##$$%%&&''(())*,-/13KM579;=?ACEGIOAr£Õ:n© ã NQ AObuˆ›¬»Ò ß í"6LW k € ” © Ã !Þ "ø # $6 %Z &v '“ (° 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(PERIPH_BASE_AHB2 + 0x0800)USART3_CR2 USART_CR2(USART3_BASE)USART_CR1_M USART_CR1_M0INT32_MIN (-INT32_MAX - 1)__FLT32_MAX_10_EXP__ 38USART_CR2_ADDM7 (1 << 4)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZUSART_CR1_PS (1 << 9)__UINTPTR_MAX__ 0xffffffffUUSART_CR3_SCARCNT_SHIFT 17__FLT32_MIN_EXP__ (-125)USART3_BRR USART_BRR(USART3_BASE)USART4_ISR USART_ISR(USART4_BASE)UINT32_MAX __UINT32_MAX__usart_disable_tx_inversionTIM3_BASE (PERIPH_BASE_APB + 0x0400)USART_GTPR_PSC_VAL(x) ((x) << USART_GTPR_PSC_SHIFT)USART8_BASE (PERIPH_BASE_APB + 0x11C00)__ULFRACT_FBIT__ 32__FLT64_MIN_10_EXP__ (-307)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX____SFRACT_EPSILON__ 0x1P-7HRUSART_CR2_STOPBITS_MASK (0x03 << 12)USART_CR2_ABRMOD_FRAME_0x7F (0x2 << USART_CR2_ABRMOD_SHIFT)__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAXUSART_CR2_SWAP (1 << 15)__UINTPTR_TYPE__ unsigned int__SQ_FBIT__ 31INT_LEAST32_MIN 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0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32LIBOPENCM3_USART_COMMON_ALL_H __USACCUM_EPSILON__ 0x1P-8UHK__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 1BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLR__FLT64_DECIMAL_DIG__ 17USART1_CR2 USART_CR2(USART1_BASE)short unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64USART2_BASE (PERIPH_BASE_APB + 0x4400)__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4USART_CR2_STOPBITS_2 (0x02 << 12)USART_CR2_ABREN (1 << 20)USART_MODE_TX USART_CR1_TEUSART_CR2_CPHA (1 << 9)__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32USART_PARITY_EVEN USART_CR1_PCEINFO_BASE (0x1ffff000U)TIM17_BASE (PERIPH_BASE_APB + 0x14800)USART_ISR_RWU (1 << 19)BIT27 (1<<27)TIM7_BASE (PERIPH_BASE_APB + 0x1400)DBGMCU_BASE (PERIPH_BASE_APB + 0x15800)USART_CR1_TCIE (1 << 6)__UTA_FBIT__ 64usart__FLT_DECIMAL_DIG__ 9__thumb__ 1LIBOPENCM3_MEMORYMAP_COMMON_H signed charINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1usart_recv__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLK__GNUC_PATCHLEVEL__ 1PTRDIFF_MINGNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsUINTPTR_MAX __UINTPTR_MAX____ARM_ARCH_PROFILE 77GPIO_PORT_E_BASE (PERIPH_BASE_AHB2 + 0x1000)__FLT64_MAX_10_EXP__ 308GPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MIN__UINT_FAST32_TYPE__ unsigned intunsigned charusart_disable_rx_inversion__SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38__FRACT_MAX__ 0X7FFFP-15RPERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)USART_ICR_IDLECF (1 << 4)__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5__ARM_ARCH_EXT_IDIV__USART_CR3_SCARCNT_MASK 0x7PERIPH_BASE_APB (PERIPH_BASE + 0x00000000)USART_CR1_DEDT (0x1F << USART_CR1_DEDT_SHIFT)USART2_CR3 USART_CR3(USART2_BASE)__UINT16_MAX__ 0xffffUSART_CR2_RXINV (1 << 16)__LDBL_MIN__ 2.2250738585072014e-308L__TQ_FBIT__ 127USART_CR3_WUFIE (1 << 22)TIM14_BASE (PERIPH_BASE_APB + 0x2000)__USQ_FBIT__ 32USART_CR1(usart_base) MMIO32((usart_base) + 0x00)uint16_tUSART_ISR_CTSIF (1 << 9)USART7 USART7_BASEUSART_RQR(usart_base) MMIO32((usart_base) + 0x18)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32USART_ISR_CMF (1 << 17)_BoolSPI1_BASE (PERIPH_BASE_APB + 0x13000)INT_FAST32_MIN (-INT_FAST32_MAX - 1)CEC_BASE (PERIPH_BASE_APB + 0x7800)usart_enable_tx_inversionvalueUINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__USART4_BRR USART_BRR(USART4_BASE)USART_CR2_ADD_VAL(x) ((x) << USART_CR2_ADD_SHIFT)__USA_IBIT__ 16PTRDIFF_MIN (-PTRDIFF_MAX - 1)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__DBL_IS_IEC_60559__ 2__UINT_FAST64_TYPE__ long long unsigned intTIM2_BASE (PERIPH_BASE_APB + 0x0000)__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC____UINT32_C(c) c ## UL__FLT32_IS_IEC_60559__ 2USART_CR3_WUS_START_BIT (0x2 << 20)INT_FAST64_MIN__USFRACT_IBIT__ 0USART8 USART8_BASEUSART_PARITY_NONE 0x00USART_CR2(usart_base) MMIO32((usart_base) + 0x04)USART_CR3_SCEN (1 << 5)__USFRACT_MIN__ 0.0UHRTSC_BASE (PERIPH_BASE_AHB1 + 0x4000)__ARM_NEON__UINT8_MAX__ 0xffUSART3_CR3 USART_CR3(USART3_BASE)__LDBL_MAX_EXP__ 1024LIBOPENCM3_MEMORYMAP_H USART_FLAG_ORE USART_ISR_OREUSART1_ICR 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1USART_CR1_RE (1 << 2)USART_ISR_TXE (1 << 7)__LDBL_HAS_INFINITY__ 1__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308USART_ISR_TC (1 << 6)__ARM_PCS 1bool _BoolUINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffBBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)USART_CR1_MME (1 << 13)USART_CR2_ABRMOD_FRAME_0x55 (0x3 << USART_CR2_ABRMOD_SHIFT)INT16_MAX __INT16_MAX__USART_CR3_DEM (1 << 14)__FLT32X_IS_IEC_60559__ 2USART_RQR_ABKRQ (1 << 0)SYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXPERIPH_BASE_AHB1 (PERIPH_BASE + 0x00020000)__INT_LEAST16_WIDTH__ 16__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLINT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHR__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)USART1 USART1_BASEUSART_CR2_ABRMOD_SHIFT 21/build/libopencm3/lib/stm32/f0__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffULUSART_RTOR_RTO_VAL(x) ((x) << USART_RTOR_RTO_SHIFT)INT64_C(c) __INT64_C(c)__INT_LEAST8_MAX__ 0x7f__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXDAC_BASE (PERIPH_BASE_APB + 0x7400)USART_CR3_WUS_RXNE (0x3 << 20)usart_enable_rx_inversion__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fBIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVEUSART_ICR_LBDCF (1 << 8)USART_CR2_LBDIE (1 << 6)__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intUSART_CR2_CPOL (1 << 10)USART_GTPR_GT (0xFF << USART_GTPR_GT_SHIFT)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0ST_VREFINT_CAL MMIO16(0x1FFFF7BA)__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAX__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)__INT32_MAX__ 0x7fffffffL__INT64_C(c) c ## LLST_TSENSE_CAL2_110C MMIO16(0x1FFFF7C2)UINTMAX_MAXEXTI_BASE (PERIPH_BASE_APB + 0x10400)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_BF16_VECTOR_ARITHMETICPPBI_BASE (0xE0000000U)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__INT8_MAX __INT8_MAX____INT_LEAST16_TYPE__ short int__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1ADC_BASE (PERIPH_BASE_APB + 0x12400)__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24USART_CR1_RTOIE (1 << 26)__UDQ_IBIT__ 0__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64UINTPTR_MAX__LDBL_DENORM_MIN__ 4.9406564584124654e-324L__INT64_MAX__ 0x7fffffffffffffffLLUSART_CR3_DMAR (1 << 6)__ULLFRACT_IBIT__ 0USART_FLAG_FE USART_ISR_FE__INTMAX_WIDTH__ 64MMIO16(addr) (*(volatile uint16_t *)(addr))USART_FLOWCONTROL_NONE 0x00USART_RDR(usart_base) MMIO32((usart_base) + 0x24)USART_CR3_OVRDIS (1 << 12)__GNUC__ 12WCHAR_MAX__WCHAR_WIDTH__ 32__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0UUSART_CR2_LINEN (1 << 14)__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULK__INT_MAX__ 0x7fffffff__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAX__LDBL_HAS_QUIET_NAN__ 1__LONG_LONG_WIDTH__ 64BIT6 (1<<6)USART1_RDR USART_RDR(USART1_BASE)__UINT_FAST64_MAX__ 0xffffffffffffffffULL__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLUSART_CR1_CMIE (1 << 14)__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4USART_ISR_NF (1 << 2)USART_ICR_NCF (1 << 2)__UFRACT_MAX__ 0XFFFFP-16URINT64_MAXINT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0USART5 USART5_BASEUSART_STOPBITS_1_5 USART_CR2_STOPBITS_1_5USART_CR1_UE (1 << 0)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__USART_CR3_EIE (1 << 0)SYS_TICK_BASE (SCS_BASE + 0x0010)__USER_LABEL_PREFIX__ USART_FLAG_TXE USART_ISR_TXE__ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)SPI2_BASE (PERIPH_BASE_APB + 0x3800)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)USART_RQR_MMRQ (1 << 2)__INT_FAST32_TYPE__ intUSART_CR2_ABRMOD_FALL_EDGE (0x1 << USART_CR2_ABRMOD_SHIFT)CRS_BASE (PERIPH_BASE_APB + 0x6C00)unsigned int__GCC_ASM_FLAG_OUTPUTS____LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1USART_FLAG_RXNE USART_ISR_RXNEUSART2_CR1 USART_CR1(USART2_BASE)__USACCUM_IBIT__ 8USART_ISR_RTOF (1 << 11)__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UKUSART_MODE_TX_RX (USART_CR1_RE | USART_CR1_TE)USART_CR2_ABRMOD_STARTBIT (0x0 << USART_CR2_ABRMOD_SHIFT)__FLT_EVAL_METHOD__ 0USART_CR2_ABRMOD_MASK 3__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__thumb2__RCC_BASE (PERIPH_BASE_AHB1 + 0x1000)__ARM_FEATURE_LDREXUSART_RQR_TXFRQ (1 << 4)__UQQ_FBIT__ 8USART_TDR_MASK (0x1FF << 0)INT16_Cflag__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__RTC_BASE (PERIPH_BASE_APB + 0x2800)__UINT8_TYPE__ unsigned char__SIG_ATOMIC_TYPE__ intUSART4_CR3 USART_CR3(USART4_BASE)usart_disable_rx_timeout__GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINPERIPH_BASE (0x40000000U)true 1USART_RTOR_BLEN_VAL(x) ((x) << USART_RTOR_BLEN_SHIFT)__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)USART_ISR_TEACK (1 << 21)__LDBL_MIN_10_EXP__ (-307)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1usart_enable_rx_timeoutBIT28 (1<<28)USART_CR1_OVER8 (1 << 15)__LFRACT_EPSILON__ 0x1P-31LRUSART_CR1_M1 (1 << 28)__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX____FLT32X_NORM_MAX__ 1.7976931348623157e+308F32xUSART3_CR1 USART_CR1(USART3_BASE)__arm__ 1USART2_RQR USART_RQR(USART2_BASE)__FLT32_MIN_10_EXP__ (-37)MMIO64(addr) (*(volatile uint64_t *)(addr))__ARM_FP16_FORMAT_ALTERNATIVEUSART_CR3_RTSE (1 << 8)__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MINDESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)USART_FLOWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE)__TA_IBIT__ 64__ARM_FEATURE_QRDMX__ARM_ARCH_ISA_THUMB 1DESIG_FLASH_SIZE_BASE (0x1FFFF7CCU)USART_ISR_SBKF (1 << 18)USART_ICR_FECF (1 << 1)__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__USART_CR2_MSBFIRST (1 << 19)__USQ_IBIT__ 0USART_CR3(usart_base) MMIO32((usart_base) + 0x08)BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0USART_GTPR_GT_VAL(x) ((x) << USART_GTPR_GT_SHIFT)_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1USART4 USART4_BASEUSART_CR1_TE (1 << 3)USART2_ICR USART_ICR(USART2_BASE)INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1USART_CR3_CTSE (1 << 9)__FLT32_DIG__ 6INT_LEAST16_MAXTIM6_BASE (PERIPH_BASE_APB + 0x1000)BIT15 (1<<15)USART_CR1_IDLEIE (1 << 4)USART4_CR1 USART_CR1(USART4_BASE)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7INT32_MAXUSART_CR3_SCARCNT_DISABLE (0 << USART_CR3_SCARCNT_SHIFT)USART3_RQR USART_RQR(USART3_BASE)__ACCUM_MIN__ (-0X1P15K-0X1P15K)USART6 USART6_BASEEND_DECLS __ARM_FEATURE_CRYPTOUSART_ISR_PE (1 << 0)__INT_LEAST32_TYPE__ long intUSART_CR1_RXNEIE (1 << 5)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0USART2_RDR USART_RDR(USART2_BASE)UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)__FLT_NORM_MAX__ 3.4028234663852886e+38FUSART1_BASE (PERIPH_BASE_APB + 0x13800)long long unsigned intUSART_CR2_DATAINV (1 << 18)__FLT_MIN_10_EXP__ (-37)GPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ intusart_get_flag__DQ_FBIT__ 63INT_LEAST64_MAX__SACCUM_IBIT__ 8usart_disable_halfduplex__UHQ_IBIT__ 0INT_LEAST8_MINUSART_CR2_RTOEN (1 << 23)BIT29 (1<<29)__INT_FAST16_TYPE__ intUSART7_BASE (PERIPH_BASE_APB + 0x11800)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__UINT_LEAST16_TYPE__ short unsigned intUSART_FLAG_IDLE USART_ISR_IDLE__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15USART3_ICR USART_ICR(USART3_BASE)USART_ICR_CMCF (1 << 17)__UTQ_FBIT__ 128USART4_GTPR USART_GTPR(USART4_BASE)USART_CR3_ONEBIT (1 << 11)usart_wait_send_ready__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffUSART_CR1_PEIE (1 << 8)DMA2_BASE (PERIPH_BASE_AHB1 + 0x0400)PTRDIFF_MAX __PTRDIFF_MAX____ARM_ARCH 6USART_CR2_LBDL (1 << 5)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKUSART4_RQR USART_RQR(USART4_BASE)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULR__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intUSART_ICR_ORECF (1 << 3)USART3_RDR USART_RDR(USART3_BASE)WCHAR_MINUSART_ICR_TCCF (1 << 6)DMA1_BASE DMA_BASEUSART_CR2_LBCL (1 << 8)BEGIN_DECLS USART_ISR_EOBF (1 << 12)USART_CR2_STOPBITS_SHIFT 12USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)USART2_RTOR USART_RTOR(USART2_BASE)USART_ISR_CTS (1 << 10)UINT_LEAST8_MAX__ARM_EABI__ 1INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1USART_RQR_SBKRQ (1 << 1)USART6_BASE (PERIPH_BASE_APB + 0x11400)USART2_TDR USART_TDR(USART2_BASE)__QQ_IBIT__ 0USART_ICR_PECF (1 << 0)USART_FLOWCONTROL_RTS USART_CR3_RTSEUSART4_ICR USART_ICR(USART4_BASE)DESIG_UNIQUE_ID_BASE (0x1FFFF7ACU)__LLACCUM_FBIT__ 31__UINTMAX_TYPE__ long long unsigned int__GNUC_MINOR__ 2__UINT_LEAST32_TYPE__ long unsigned int__ARM_FEATURE_NUMERIC_MAXMINUSART_CR1_TXEIE (1 << 7)__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 1STM32F0 1INTMAX_MAXDEBUG_BASE (SCS_BASE + 0x0DF0)USART_RTOR_RTO_SHIFT 0__ARM_FEATURE_FP16_SCALAR_ARITHMETICUSART_PARITY_ODD (USART_CR1_PS | USART_CR1_PCE)__DBL_HAS_QUIET_NAN__ 1__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CUSART4_RDR USART_RDR(USART4_BASE)USART2 USART2_BASEINT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_Cusart_wait_recv_readyUSART_CR1_WAKE (1 << 11)UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRUSART1_GTPR USART_GTPR(USART1_BASE)__ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned intI2C2_BASE (PERIPH_BASE_APB + 0x5800)USART4_RTOR USART_RTOR(USART4_BASE)__LDBL_EPSILON__ 2.2204460492503131e-16L__LONG_MAX__ 0x7fffffffLTIM15_BASE (PERIPH_BASE_APB + 0x14000)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16FLASH_BASE (0x08000000U)CORESIGHT_LAR_OFFSET 0xfb0USART_ISR_FE (1 << 1)USART3_TDR USART_TDR(USART3_BASE)USART_ICR_CTSCF (1 << 9)FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x2000)short intUSART_RDR_MASK (0x1FF << 0)usart_disable_rx_timeout_interrupt__UINT16_C(c) cBIT31 (1<<31)__UDA_IBIT__ 32USART_CR1_EOBIE (1 << 27)USART_FLOWCONTROL_CTS USART_CR3_CTSEUINT_LEAST32_MAXBIT2 (1<<2)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCUSART_ISR(usart_base) MMIO32((usart_base) + 0x1C)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53USART_CR1_M0 (1 << 12)USART1_CR1 USART_CR1(USART1_BASE)BIT5 (1<<5)BIT1 (1<<1)USART4_BASE (PERIPH_BASE_APB + 0x4C00)INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1USART_CR3_CTSIE (1 << 10)__DBL_DECIMAL_DIG__ 17BIT8 (1<<8)USART_CR3_IREN (1 << 1)INT16_C(c) __INT16_C(c)__INT16_MAX__ 0x7fffUSART3_GTPR USART_GTPR(USART3_BASE)USART_RTOR(usart_base) MMIO32((usart_base) + 0x14)USART2_GTPR USART_GTPR(USART2_BASE)__INT_WIDTH__ 32USART_TDR(usart_base) MMIO32((usart_base) + 0x28)__QQ_FBIT__ 7POWER_CONTROL_BASE (PERIPH_BASE_APB + 0x7000)__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64USART_MODE_RX USART_CR1_RE__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32__ULLFRACT_EPSILON__ 0x1P-64ULLRUSART4_TDR USART_TDR(USART4_BASE)__SIZEOF_WINT_T__ 4USART_ISR_IDLE (1 << 4)__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17USART_GTPR_PSC (0xFF << USART_GTPR_PSC_SHIFT)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1USART_BRR(usart_base) MMIO32((usart_base) + 0x0C)__FLT32X_HAS_DENORM__ 1USART_CR2_ADD_SHIFT 24__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1USART_CR1_DEAT_SHIFT 21USART_CR3_NACK (1 << 4)__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODUSART1_RQR USART_RQR(USART1_BASE)USART1_CR3 USART_CR3(USART1_BASE)USART_ICR_WUCF (1 << 20)USART1_ISR USART_ISR(USART1_BASE)__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H __GCC_CONSTRUCTIVE_SIZE 64__LLFRACT_IBIT__ 0uint32_tUSART2_CR2 USART_CR2(USART2_BASE)BIT12 (1<<12)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HKUSART_FLOWCONTROL_MASK (USART_CR3_RTSE | USART_CR3_CTSE)__UINT_FAST16_TYPE__ unsigned intUSART_CR1_UESM (1 << 1)__UHA_IBIT__ 8__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULKUSART_RTOR_RTO_MASK (0xFFFFF << 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USART_CR1_TE)WINT_MAX__INT16_C(c) cINT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32USART_CR1_PCE (1 << 10)USART_ISR_LBDF (1 << 8)USART_RTOR_BLEN_SHIFT 24USART_CR2_STOPBITS_0_5 (0x01 << 12)__ATOMIC_ACQ_REL 4__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)dataUSART_ISR_WUF (1 << 20)USART2_ISR USART_ISR(USART2_BASE)__FLT32_NORM_MAX__ 3.4028234663852886e+38F32USART_GTPR(usart_base) MMIO32((usart_base) + 0x10)I2C1_BASE (PERIPH_BASE_APB + 0x5400)UINT64_C(c) __UINT64_C(c)USART_CR1_DEAT_VAL(x) ((x) << USART_CR1_DEAT_SHIFT)__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53USART_CR2_STOPBITS_1_5 (0x03 << 12)USART_CR2_TXINV (1 << 17)UINT64_MAX __UINT64_MAX__INT_FAST16_MAXusart_enable_data_inversionLIBOPENCM3_USART_H __INT_LEAST64_TYPE__ long long intIWDG_BASE (PERIPH_BASE_APB + 0x3000)__ARM_FEATURE_CDE_COPROCUSART_ISR_BUSY (1 << 16)UINT32_CUSART_PARITY_MASK (USART_CR1_PS | USART_CR1_PCE)GCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| A+aeabi!6S-MM ñÿ "#%')?A+-/13579;=C@q¢Ô9m¨ â BE .Ke€šµ Í æ2Tw‚ £ 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1)USB_FEAT_ENDPOINT_HALT 0INT32_C(c) __INT32_C(c)__ptr_t void *__GNUC_STDC_INLINE__ 1_REENT_RAND48_ADD(ptr) ((ptr)->_new._reent._r48._add)__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLK__GNUC_PATCHLEVEL__ 1__alloc_align(x) __attribute__((__alloc_align__(x)))__UINT_LEAST16_MAX__ 0xffffUINTPTR_MAX __UINTPTR_MAX___REENT_MP_RESULT_K(ptr) ((ptr)->_result_k)__predict_true(exp) __builtin_expect((exp), 1)_STDBOOL_H _REENT_WCSRTOMBS_STATE(ptr) ((ptr)->_new._reent._wcsrtombs_state)USB_CONFIG_ATTR_SELF_POWERED 0x40__FLT64_MAX_10_EXP__ 308MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINbcdDeviceusbd_ep_stall_getusb_interface_descriptor_BSD_SIZE_T_DEFINED_ ___int32_t_defined 1__UINT_FAST32_TYPE__ unsigned int___int_size_t_h bmRequestType__SIZEOF_FLOAT__ 4__SACCUM_IBIT__ 8__GNUCLIKE_MATH_BUILTIN_RELOPS __FLT_MAX_10_EXP__ 38__PMT(args) argsUSB_REQ_GET_INTERFACE 10__FRACT_MAX__ 0X7FFFP-15R__GCC_IEC_559 0__DBL_MIN_10_EXP__ (-307)INT_LEAST32_MAX __INT_LEAST32_MAX___REENT_SMALL_CHECK_INIT(ptr) __INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5_READ_WRITE_RETURN_TYPE int__ARM_ARCH_EXT_IDIV____DEFINED_size_t USB_REQ_SET_CONFIGURATION 9BIT8 (1<<8)__need_wint_tBEGIN_DECLS __sym_default(sym,impl,verid) __asm__(".symver " #impl ", " #sym "@@" #verid)__alloc_size2(n,x) __attribute__((__alloc_size__(n, x)))__UINT16_MAX__ 0xffffusb_config_descriptormax_size__POSIX_VISIBLE 0_HAVE_LONG_DOUBLE 1_Alignas(x) __aligned(x)__GNUCLIKE_BUILTIN_CONSTANT_P 1__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32_Bool__DECONST(type,var) ((type)(__uintptr_t)(const void *)(var))__STRICT_ANSI__ 1_SYS_FEATURES_H user_callback_set_configUINT_LEAST8_MAXUINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__LAST_DATA_OUTchar__USA_IBIT__ 16PTRDIFF_MIN (-PTRDIFF_MAX - 1)__hidden __attribute__((__visibility__("hidden")))USB_CONFIG_ATTR_DEFAULT 0x80__UINT_FAST64_TYPE__ long long unsigned intUSB_ENDPOINT_ATTR_ASYNC 0x04_REENT_MBRTOWC_STATE(ptr) ((ptr)->_new._reent._mbrtowc_state)_WINT_T __lock_close(lock) ((void) 0)__FLT_MIN__ 1.1754943508222875e-38F__need_size_t __HA_FBIT__ 7BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)__FDPIC__USB_DT_INTERFACE_SIZE 9__FLT_MAX__ 3.4028234663852886e+38F__FLT32_IS_IEC_60559__ 2__noinline __attribute__ ((__noinline__))_REENT_CHECK_SIGNAL_BUF(ptr) iface_assocINT_FAST64_MIN__USFRACT_IBIT__ 0__weak_symbol __attribute__((__weak__))USB_REQ_SET_DESCRIPTOR 7__USFRACT_MIN__ 0.0UHR__used __attribute__((__used__))UINT16_C__ARM_NEON_REENT_EMERGENCY(ptr) ((ptr)->_emergency)__GNUCLIKE_CTOR_SECTION_HANDLING 1__UINT8_MAX__ 0xff___int16_t_defined 1UINTMAX_C(c) __UINTMAX_C(c)_REENT _impure_ptr__LDBL_MAX_EXP__ 1024USB_REQ_TYPE_VENDOR 0x40__exported __attribute__((__visibility__("default")))__SCCSID(s) struct __hackBIT7 (1<<7)__DBL_HAS_DENORM__ 1__OPTIMIZE_SIZE__ 1__CC_SUPPORTS___INLINE 1_MB_LEN_MAX 1extra_string_idxcontrol_buffer__GXX_TYPEINFO_EQUALITY_INLINE 0BIT17 (1<<17)USB_ENDPOINT_ATTR_NOSYNC 0x00__GXX_ABI_VERSION 1017__ULACCUM_IBIT__ 32iInterface__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308L__returns_twice __attribute__((__returns_twice__))__requires_shared(...) __lock_annotate(shared_locks_required(__VA_ARGS__))_END_STD_C USB_ENDPOINT_ATTR_CONTROL 0x00_T_SIZE __UINT32_C(c) c ## UL__UACCUM_MIN__ 0.0UKUINT32_C(c) __UINT32_C(c)_Null_unspecified __FLT_EPSILON__ 1.1920928955078125e-7F__XSTRING(x) __STRING(x)usbd_register_reset_callback__ACCUM_IBIT__ 16USB_DT_ENDPOINT 5USB_ENDPOINT_ATTR_DATA 0x00__PTRDIFF_TYPE__ int__ARM_ARCH_ISA_THUMBUINT32_CUSB_FEAT_TEST_MODE 2__GNUCLIKE_BUILTIN_VARARGS 1__UACCUM_EPSILON__ 0x1P-16UK__ARM_FEATURE_MATMUL_INT8__UINT8_TYPE__ unsigned char_REENT_SIGNGAM(ptr) ((ptr)->_new._reent._gamma_signgam)__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0__USACCUM_FBIT__ 8_ELIDABLE_INLINE static __inline____NULLABILITY_PRAGMA_POP __MISC_VISIBLE 0__LACCUM_FBIT__ 31USB_ENDPOINT_ATTR_INTERRUPT 0x03__INT_LEAST16_WIDTH__ 16__FLT32_HAS_QUIET_NAN__ 1__OBSOLETE_MATH __OBSOLETE_MATH_DEFAULT__LDBL_HAS_INFINITY__ 1__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))usb_device_descriptor__FLT32X_MAX_10_EXP__ 308USB_TRANSACTION_OUTUSB_DT_DEVICE_SIZE sizeof(struct usb_device_descriptor)__ARM_PCS 1bool _Bool__offsetof(type,field) offsetof(type, field)UINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 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(a) : (b))_usbd_control_in_ATEXIT_DYNAMIC_ALLOC 1__need_size_t__ARM_ARCH 6_SIZE_T_ USB_REQ_SET_FEATURE 3__FLT_RADIX__ 2BIT3 (1<<3)long long int_REENT_RAND48_MULT(ptr) ((ptr)->_new._reent._r48._mult)BIT29 (1<<29)__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXINTPTR_MIN__wchar_t__ __LDBL_HAS_QUIET_NAN__ 1usbd_poll__LONG_LONG_WIDTH__ 64BIT6 (1<<6)__DEFINED_wchar_t force_nak__UINT_FAST64_MAX__ 0xffffffffffffffffULL__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINT_FAST8_MIN (-INT_FAST8_MAX - 1)INTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024__WCHAR_T __SYS_CONFIG_H__ __FLT64_MIN__ 2.2250738585072014e-308F64wMaxPacketSize__INT_WIDTH__ 32_HAVE_CC_INHIBIT_LOOP_TO_LIBCALL 1__FLT_MIN_EXP__ (-125)__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4_PTRDIFF_T __BSD_VISIBLE 0__predict_false(exp) __builtin_expect((exp), 0)__unused __attribute__((__unused__))__nonnull_all __attribute__((__nonnull__))_REENT_MBSRTOWCS_STATE(ptr) ((ptr)->_new._reent._mbsrtowcs_state)MAX_USER_CONTROL_CALLBACK 4__UFRACT_MAX__ 0XFFFFP-16UR___int_least64_t_defined 1_Alignof(x) __alignof(x)iManufacturer__THROW UINTMAX_C__UHA_FBIT__ 8user_control_callbackINT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0_REENT_L64A_BUF(ptr) ((ptr)->_new._reent._l64a_buf)__EXP(x) __ ##x ##__complete__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__usbd_driver_REENT_CHECK_ASCTIME_BUF(ptr) _ANSIDECL_H_ __USER_LABEL_PREFIX__ __ARM_32BIT_STATE__UFRACT_FBIT__ 16__ACCUM_EPSILON__ 0x1P-15K__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)__GNUCLIKE_BUILTIN_MEMCPY 1_usbd_control_outUSB_REQ_TYPE_IN 0x80__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)USB_CLASS_VENDOR 0xFF__INT_FAST32_TYPE__ int__SIZEOF_LONG_LONG__ 8unsigned int_SIZE_T_DEFINED_ __GCC_ASM_FLAG_OUTPUTS__USB_DT_INTERFACE_ASSOCIATION_SIZE sizeof(struct usb_iface_assoc_descriptor)usb_control_state_SIZET_ __DEC_EVAL_METHOD__ 2usbd_ep_setup__USACCUM_IBIT__ 8__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UINTMAX_TYPE__ long long unsigned int_WCHAR_T_DECLARED usbd_register_extra_stringep_stall_setINT_LEAST8_MAX __INT_LEAST8_MAX____ARM_ASM_SYNTAX_UNIFIED____FLT_EVAL_METHOD__ 0bInterfaceClass__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__thumb2__UINT64_C(c) __UINT64_C(c)__ARM_FEATURE_LDREX_T_PTRDIFF __UQQ_FBIT__ 8INT16_C__ARM_FP16_ARGS__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT32X_DIG__ 15__requires_unlocked(...) __lock_annotate(locks_excluded(__VA_ARGS__))usbd_ep_nak_set__LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__WCHAR_T__ USB_REQ_TYPE_OUT 0x0___int_least8_t_defined 1__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN___GCC_WCHAR_T usbd_ep_stall_setcontrol_buffer_size__unlocks(...) __lock_annotate(unlock_function(__VA_ARGS__))__EXPORT __SIG_ATOMIC_TYPE__ int__OBSOLETE_MATH_DEFAULT 1_Noreturn __dead2extralenstring/build/libopencm3/lib/stm32/f0bRequest_UNBUF_STREAM_OPT 1__IMPORT _RAND48_SEED_2 (0x1234)poll__USA_FBIT__ 16__volatile volatile_MACHINE__TYPES_H __IEEE_LITTLE_ENDIAN __LDBL_MIN_10_EXP__ (-307)INT64_MAXINT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1control_state__LFRACT_EPSILON__ 0x1P-31LR_BEGIN_STD_C __malloc_like __attribute__((__malloc__))bFunctionSubClassBIT20 (1<<20)__ARM_SIZEOF_MINIMAL_ENUM 1USB_REQ_TYPE_OTHER 0x03_POINTER_INT long__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x_PTRDIFF_T_DECLARED INT_FAST64_MAXUSB_DT_INTERFACE_POWER 8__FRACT_EPSILON__ 0x1P-15R__FLT32_MIN_10_EXP__ (-37)__RAND_MAX 0x7fffffff__lock_try_acquire(lock) ((void) 0)__STRING(x) #x_WCHAR_T INT8_MAX __INT8_MAX____ARM_FP16_FORMAT_ALTERNATIVEUSB_DT_OTHER_SPEED_CONFIGURATION 7__FBSDID(s) struct __hack_usbd_deviceGNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sections__DA_FBIT__ 31_MACHINE__DEFAULT_TYPES_H __BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)USB_REQ_TYPE_DEVICE 0x00_GCC_PTRDIFF_T __GNUCLIKE_BUILTIN_NEXT_ARG 1__TA_IBIT__ 64__ARM_FEATURE_SIMD32usbd_ep_write_packet__LOCK_INIT(class,lock) static int lock = 0;_SIZE_T _WCHAR_T_H __ARM_FEATURE_QRDMX__ARM_ARCH_ISA_THUMB 1__ASMNAME(cname) __XSTRING (__USER_LABEL_PREFIX__) cname__LONG_LONG_MAX__ 0x7fffffffffffffffLL_FSEEK_OPTIMIZATION 1__WINT_WIDTH__ 32__arg_type_tag(arg_kind,arg_idx,type_tag_idx) _REENT_INIT_PTR(var) { memset((var), 0, sizeof(*(var))); _REENT_INIT_PTR_ZEROED(var); }BIT11 (1<<11)__COPYRIGHT(s) struct __hack__UFRACT_IBIT__ 0wTotalLength_REENT_MBRLEN_STATE(ptr) ((ptr)->_new._reent._mbrlen_state)_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0usbd_request_return_codes__ULACCUM_MIN__ 0.0ULK_STDDEF_H_ INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__SIZE_T bFunctionClassUSB_DT_INTERFACE_ASSOCIATION 11INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1__FLT32_DIG__ 6DATA_IN__dead2 __attribute__((__noreturn__))BIT15 (1<<15)disconnectUSB_REQ_TYPE_ENDPOINT 0x02__EXPusbd_init___int64_t_defined 1__LDBL_HAS_DENORM__ 1__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7INT32_MAX__BEGIN_DECLS __ACCUM_MIN__ (-0X1P15K-0X1P15K)__GNUC_VA_LIST_COMPATIBILITY 1__ARM_FEATURE_CRYPTOINT16_MIN (-INT16_MAX - 1)__INT_LEAST32_TYPE__ long intUSB_REQ_SET_ADDRESS 5UINT_LEAST16_MAXBIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2__NEWLIB_PATCHLEVEL__ 0bLength__ORDER_LITTLE_ENDIAN__ 1234__size_t__FLT_NORM_MAX__ 3.4028234663852886e+38Fuser_callback_set_altsettinglong long unsigned int__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)wIndex__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__ULLACCUM_EPSILON__ 0x1P-32ULLK_SIZE_T_DEFINED __DQ_FBIT__ 63__GNU_VISIBLE 0INT_LEAST64_MAXuint16_t__PTRDIFF_T __UHQ_IBIT__ 0INT_LEAST8_MIN_REENT_WCTOMB_STATE(ptr) ((ptr)->_new._reent._wctomb_state)usbd_dev__INT_FAST16_TYPE__ intextra__USBD_H __SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__UINT_LEAST16_TYPE__ short unsigned intUINT16_MAX__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intSTATUS_INusbd_control_complete_callback__signed signedSTATUS_OUTbNumConfigurations_REENT_ASCTIME_BUF(ptr) ((ptr)->_new._reent._asctime_buf)__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffff__have_longlong64 1INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)PTRDIFF_MAX __PTRDIFF_MAX__bFunctionProtocolINT8_MIN__size_t _WCHAR_T_DEFINED idProduct__trylocks_exclusive(...) __lock_annotate(exclusive_trylock_function(__VA_ARGS__))USB_REQ_TYPE_TYPE 0x60ep_write_packetUINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRBIT26 (1<<26)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long int__always_inline __inline__ __attribute__((__always_inline__))iConfiguration_ATEXIT_SIZE 32USBD_REQ_NOTSUPPidVendor_BSD_SIZE_T_ WCHAR_MIN__no_lock_analysis __lock_annotate(no_thread_safety_analysis)_WCHAR_T_ true 1_REENT_STDIO_STREAM(var,index) &(var)->__sf[index]desc_T_WCHAR ../../usb/usb.cusb_iface_assoc_descriptor_TIME_T_ __int_least64_t_CLOCKID_T_ unsigned long_REENT_CHECK_TM(ptr) __arm__ 1__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__INT_WCHAR_T_H __FLT32X_MAX__ 1.7976931348623157e+308F32x_usbd_resetwValue__FLT32_MIN__ 1.1754943508222875e-38F32INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1WINT_MIN __WINT_MIN__USB_ENDPOINT_ATTR_SYNC 0x0C__QQ_IBIT__ 0_SYS_REENT_H_ __LLACCUM_FBIT__ 31USB_FEAT_DEVICE_REMOTE_WAKEUP 1bInterfaceSubClass__USQ_IBIT__ 0USB_REQ_TYPE_DIRECTION 0x80__lock_release_recursive(lock) ((void) 0)__UINT_LEAST32_TYPE__ long unsigned intinit__ARM_FEATURE_NUMERIC_MAXMIN_RAND48_MULT_1 (0xdeec)__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 1STM32F0 1_RAND48_SEED_0 (0x330e)INTMAX_MAXbFirstInterface__ARM_FEATURE_FP16_SCALAR_ARITHMETICUSB_TRANSACTION_SETUP__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1UINT_LEAST32_MAX__FLT64_HAS_QUIET_NAN__ 1__ptrvalue _NOINLINE_STATIC _NOINLINE static__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_C__CC_SUPPORTS_VARADIC_XXX 1INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intMMIO64(addr) (*(volatile uint64_t *)(addr))bDeviceClass__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRdriverWCHAR_MAX __WCHAR_MAX____ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4__lock_close_recursive(lock) ((void) 0)USB_ENDPOINT_ATTR_ADAPTIVE 0x08__UINT64_TYPE__ long long unsigned intusbd_set_altsetting_callback__INT64_C(c) c ## LL_FVWRITE_IN_STREAMIO 1__lockable __lock_annotate(lockable)ep_reset__END_DECLS __generic(expr,t,yes,no) __builtin_choose_expr( __builtin_types_compatible_p(__typeof(expr), t), yes, no)__LONG_MAX__ 0x7fffffffL__ARM_FEATURE_CDEbInterfaceNumberMAX_USER_SET_CONFIG_CALLBACK 4unsignedstallINT_LEAST32_MIN (-INT_LEAST32_MAX - 1)_STRING_H_ short int_STDDEF_H __pt_guarded_by(x) __lock_annotate(pt_guarded_by(x))__guarded_by(x) __lock_annotate(guarded_by(x))__GNUCLIKE___OFFSETOF 1__UINT16_C(c) c__FLT64_MIN_EXP__ (-1021)_REENT_INIT_ATEXIT _NULL, _ATEXIT_INIT,__CC_SUPPORTS___INLINE__ 1__UDA_IBIT__ 32__printflike(fmtarg,firstvararg) __attribute__((__format__ (__printf__, fmtarg, firstvararg)))__USB_PRIVATE_H __fastcall __attribute__((__fastcall__))current_address__lock_annotate(x) BIT2 (1<<2)_REENT_SIGNAL_BUF(ptr) ((ptr)->_new._reent._signal_buf)__ATOMIC_RELAXED 0_ATTRIBUTE(attrs) __attribute__ (attrs)__ARM_FEATURE_COPROC__ATTRIBUTE_IMPURE_PTR__ __DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53BIT5 (1<<5)BIT1 (1<<1)__rangeof(type,start,end) (__offsetof(type, end) - __offsetof(type, start))INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1USB_DEV_STATUS_SELF_POWERED 0x01__lock_init(lock) ((void) 0)__need_ptrdiff_t__DBL_DECIMAL_DIG__ 17index__have_long32 1_GLOBAL_REENT _global_impure_ptr_NULL 0__flexarr [0]INT16_C(c) __INT16_C(c)UINT32_MAX__INT16_MAX__ 0x7fff_WANT_REGISTER_FINI 1__DEVOLATILE(type,var) ((type)(__uintptr_t)(volatile void *)(var))DATA_OUT__sym_compat(sym,impl,verid) __asm__(".symver " #impl ", " #sym "@" #verid)__SSP_FORTIFY_LEVEL 0__GNUCLIKE_BUILTIN_STDARG 1__XSI_VISIBLE 0INT_FAST32_MIN (-INT_FAST32_MAX - 1)__QQ_FBIT__ 7__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1otgfs_usb_driver stm32f107_usb_driver__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64USB_TRANSACTION_IN__GNUC_PREREQ__(ma,mi) __GNUC_PREREQ(ma, mi)__pure2 __attribute__((__const__))__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32__ARM_FEATURE_CRC32__strong_reference(sym,aliassym) extern __typeof (sym) aliassym __attribute__ ((__alias__ (#sym)))__LDBL_NORM_MAX__ 1.7976931348623157e+308L__ULLFRACT_EPSILON__ 0x1P-64ULLR__unreachable() __builtin_unreachable()__SIZEOF_WINT_T__ 4__INT_LEAST32_MAX__ 0x7fffffffL__STDC__ 1__LDBL_DECIMAL_DIG__ 17USB_REQ_TYPE_RECIPIENT 0x1F__GNUCLIKE_ASM 3__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1__scanflike(fmtarg,firstvararg) __attribute__((__format__ (__scanf__, fmtarg, firstvararg)))_WIDE_ORIENT 1user_callback_reset__ULLACCUM_MIN__ 0.0ULLK_SYS__TYPES_H __INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1_RAND48_MULT_0 (0xe66d)SIG_ATOMIC_MAX__GNUCLIKE_BUILTIN_VAALIST 1__locks_exclusive(...) __lock_annotate(exclusive_lock_function(__VA_ARGS__))USB_ENDPOINT_ATTR_BULK 0x02__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPROD__Long long_NEWLIB_VERSION "3.3.0"__pure __attribute__((__pure__))_GCC_SIZE_T __CC_SUPPORTS_WARNING 1PTRDIFF_MAX__ULLFRACT_MIN__ 0.0ULLRUINT_FAST8_MAX_REENT_MP_P5S(ptr) ((ptr)->_p5s)_REENT_CHECK_RAND48(ptr) __lock_release(lock) ((void) 0)__GCC_CONSTRUCTIVE_SIZE 64_BSD_WCHAR_T___LLFRACT_IBIT__ 0addr__INT16_TYPE__ short int__LLFRACT_MIN__ (-0.5LLR-0.5LLR)uint32_tBIT12 (1<<12)__weak_reference(sym,alias) __asm__(".weak " #alias); __asm__(".equ " #alias ", " #sym)__SACCUM_EPSILON__ 0x1P-7HK_REENT_CHECK_VERIFY 1__need_wchar_tuser_callback_resumeusbd_control_callback__UHA_IBIT__ 8__need_wint_t bMaxPower__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15BIT16 (1<<16)_Atomic(T) struct { T volatile __val; }__SIZE_WIDTH__ 32bConfigurationValue__containerof(x,s,m) ({ const volatile __typeof(((s *)0)->m) *__x = (x); __DEQUALIFY(s *, (const volatile char *)__x - __offsetof(s, m));})otghs_usb_driver stm32f207_usb_driver__WINT_MIN__ 0U__locks_shared(...) __lock_annotate(shared_lock_function(__VA_ARGS__))__FLT64_DIG__ 15__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8__long_double_t long double__INT_LEAST16_TYPE__ short intusbd_register_suspend_callbackLAST_DATA_IN__DBL_MAX__ ((double)1.7976931348623157e+308L)_REENT_WCRTOMB_STATE(ptr) ((ptr)->_new._reent._wcrtomb_state)short unsigned int__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1__thumb__ 1__LDBL_MAX_10_EXP__ 308INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1__format_arg(fmtarg) __attribute__((__format_arg__ (fmtarg)))__compiler_membar() __asm __volatile(" " : : : "memory")__HQ_FBIT__ 15__bool_true_false_are_defined 1__datatype_type_tag(kind,type) __RCSID(s) struct __hack__lock_try_acquire_recursive(lock) ((void) 0)__SIZE_MAX__ 0xffffffffU__ARM_FEATURE_SAT__INT_LEAST16_MAX__ 0x7fffUSB_DT_STRING 3USB_ENDPOINT_ATTR_TYPE 0x03__ARM_ARCH__DEFINED_ptrdiff_t _SYS_CDEFS_H_ BIT25 (1<<25)type_mask__nonnull(x) __attribute__((__nonnull__ x))_RAND48_ADD (0x000b)__printf0like(fmtarg,firstvararg) SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__INT_LEAST64_MININT32_MINUSB_ENDPOINT_ATTR_USAGETYPE 0x30bInterfaceCount__LLFRACT_EPSILON__ 0x1P-63LLR__SFRACT_MAX__ 0X7FP-7HR__FLT32X_MANT_DIG__ 53__WCHAR_WIDTH__ 32WINT_MAX__INT16_C(c) cINT_LEAST16_MINUSB_ENDPOINT_ADDR_IN(x) (0x80 | (x))INT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32__strftimelike(fmtarg,firstvararg) __attribute__((__format__ (__strftime__, fmtarg, firstvararg)))_ATEXIT_INIT {_NULL, 0, {_NULL}, {{_NULL}, {_NULL}, 0, 0}}USB_DT_ENDPOINT_SIZE 7__DEQUALIFY(type,var) ((type)(__uintptr_t)(const volatile void *)(var))__ATOMIC_ACQ_REL 4BIT4 (1<<4)__HQ_IBIT__ 0__packed __attribute__((__packed__))_WCHAR_T_DEFINED_ _usbd_driverUSB_REQ_SET_INTERFACE 11bEndpointAddress__asserts_shared(...) __lock_annotate(assert_shared_lock(__VA_ARGS__))__SYS_LOCK_H__ __FLT32_NORM_MAX__ 3.4028234663852886e+38F32_REENT_ASCTIME_SIZE 26SIG_ATOMIC_MAX __SIG_ATOMIC_MAX____UINTMAX_MAX__ 0xffffffffffffffffULL__INT_MAX__ 0x7fffffff__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0UINT64_MAX __UINT64_MAX__INT_FAST16_MAXuser_callback_suspend__UTQ_FBIT__ 128__INT_LEAST64_TYPE__ long long int_usbd_transaction_REENT_INIT(var) { 0, _REENT_STDIO_STREAM(&(var), 0), _REENT_STDIO_STREAM(&(var), 1), _REENT_STDIO_STREAM(&(var), 2), 0, "", 0, _NULL, 0, _NULL, _NULL, 0, _NULL, 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1)INT32_C(c) __INT32_C(c)__ptr_t void *__GNUC_STDC_INLINE__ 1_REENT_RAND48_ADD(ptr) ((ptr)->_new._reent._r48._add)__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLK__GNUC_PATCHLEVEL__ 1__alloc_align(x) __attribute__((__alloc_align__(x)))__UINT_LEAST16_MAX__ 0xffffUINTPTR_MAX __UINTPTR_MAX____ARM_ARCH_PROFILE 77__predict_true(exp) __builtin_expect((exp), 1)_STDBOOL_H _REENT_WCSRTOMBS_STATE(ptr) ((ptr)->_new._reent._wcsrtombs_state)USB_CONFIG_ATTR_SELF_POWERED 0x40__FLT64_MAX_10_EXP__ 308MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINbcdDeviceusb_interface_descriptor_BSD_SIZE_T_DEFINED_ ___int32_t_defined 1__UINT_FAST32_TYPE__ unsigned int___int_size_t_h bmRequestType__SIZEOF_FLOAT__ 4__SACCUM_IBIT__ 8__GNUCLIKE_MATH_BUILTIN_RELOPS __FLT_MAX_10_EXP__ 38__PMT(args) argsUSB_REQ_GET_INTERFACE 10__FRACT_MAX__ 0X7FFFP-15R__GCC_IEC_559 0__DBL_MIN_10_EXP__ (-307)INT_LEAST32_MAX __INT_LEAST32_MAX___REENT_SMALL_CHECK_INIT(ptr) __INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5_READ_WRITE_RETURN_TYPE int__ARM_ARCH_EXT_IDIV____DEFINED_size_t USB_REQ_SET_CONFIGURATION 9BIT8 (1<<8)__need_wint_tBEGIN_DECLS __sym_default(sym,impl,verid) __asm__(".symver " #impl ", " #sym "@@" #verid)__alloc_size2(n,x) __attribute__((__alloc_size__(n, x)))__UINT16_MAX__ 0xffffusb_config_descriptor__TQ_FBIT__ 127__POSIX_VISIBLE 0_HAVE_LONG_DOUBLE 1_Alignas(x) __aligned(x)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32_Bool__DECONST(type,var) ((type)(__uintptr_t)(const void *)(var))__FLT_MIN__ 1.1754943508222875e-38F__STRICT_ANSI__ 1_SYS_FEATURES_H user_callback_set_configUINT_LEAST8_MAX_MACHSTDLIB_H_ UINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__LAST_DATA_OUTchar__USA_IBIT__ 16__need_wchar_t __hidden __attribute__((__visibility__("hidden")))USB_CONFIG_ATTR_DEFAULT 0x80__SFRACT_MAX__ 0X7FP-7HR__UINT_FAST64_TYPE__ long long unsigned intUSB_ENDPOINT_ATTR_ASYNC 0x04_REENT_MBRTOWC_STATE(ptr) ((ptr)->_new._reent._mbrtowc_state)_WINT_T __lock_close(lock) ((void) 0)__need_size_t __HA_FBIT__ 7BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)__FDPIC__USB_DT_INTERFACE_SIZE 9__FLT_MAX__ 3.4028234663852886e+38F__FLT32_IS_IEC_60559__ 2__noinline __attribute__ ((__noinline__))_REENT_CHECK_SIGNAL_BUF(ptr) iface_assocINT_FAST64_MIN__USFRACT_IBIT__ 0__weak_symbol __attribute__((__weak__))USB_REQ_SET_DESCRIPTOR 7__USFRACT_MIN__ 0.0UHR__used __attribute__((__used__))UINT16_C__ARM_NEON_REENT_EMERGENCY(ptr) ((ptr)->_emergency)__aeabi_idivmod__UINT8_MAX__ 0xff___int16_t_defined 1UINTMAX_C(c) __UINTMAX_C(c)_REENT _impure_ptr__LDBL_MAX_EXP__ 1024USB_REQ_TYPE_VENDOR 0x40__exported __attribute__((__visibility__("default")))__SCCSID(s) struct __hackBIT7 (1<<7)__DBL_HAS_DENORM__ 1__OPTIMIZE_SIZE__ 1__CC_SUPPORTS___INLINE 1_MB_LEN_MAX 1extra_string_idx__GXX_TYPEINFO_EQUALITY_INLINE 0long long intBIT17 (1<<17)USB_ENDPOINT_ATTR_NOSYNC 0x00__GXX_ABI_VERSION 1017__ULACCUM_IBIT__ 32iInterface__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308L__returns_twice __attribute__((__returns_twice__))__requires_shared(...) __lock_annotate(shared_locks_required(__VA_ARGS__))_END_STD_C USB_ENDPOINT_ATTR_CONTROL 0x00INT_LEAST8_MAX __INT_LEAST8_MAX____UINT32_C(c) c ## UL__UACCUM_MIN__ 0.0UKUINT32_C(c) __UINT32_C(c)_Null_unspecified __FLT_EPSILON__ 1.1920928955078125e-7F__XSTRING(x) __STRING(x)__attribute_pure__ __ACCUM_IBIT__ 16USB_DT_ENDPOINT 5USB_ENDPOINT_ATTR_DATA 0x00__PTRDIFF_TYPE__ int__ARM_ARCH_ISA_THUMBpacketsizeUINT32_CUSB_FEAT_TEST_MODE 2__GNUCLIKE_BUILTIN_VARARGS 1__UACCUM_EPSILON__ 0x1P-16UK__ARM_FEATURE_MATMUL_INT8__UINT8_TYPE__ unsigned char_REENT_SIGNGAM(ptr) ((ptr)->_new._reent._gamma_signgam)__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0__USACCUM_FBIT__ 8_ELIDABLE_INLINE static __inline____MISC_VISIBLE 0__LACCUM_FBIT__ 31USB_ENDPOINT_ATTR_INTERRUPT 0x03__INT_LEAST16_WIDTH__ 16__FLT32_HAS_QUIET_NAN__ 1__OBSOLETE_MATH __OBSOLETE_MATH_DEFAULT__LDBL_HAS_INFINITY__ 1__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))usb_device_descriptor__FLT32X_MAX_10_EXP__ 308USB_DT_DEVICE_SIZE sizeof(struct usb_device_descriptor)__ARM_PCS 1bool _Bool__offsetof(type,field) offsetof(type, field)UINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xff__GCC_ATOMIC_LONG_LOCK_FREE 1BIT13 (1<<13)_BSD_WCHAR_T_ _REENT_TM(ptr) (&(ptr)->_new._reent._localtime_buf)INT16_MAX __INT16_MAX__USB_DT_CONFIGURATION_SIZE 9__FLT32X_IS_IEC_60559__ 2endpointINT_LEAST64_MAX __INT_LEAST64_MAX__USB_CONFIG_ATTR_REMOTE_WAKEUP 0x20LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))__UINTPTR_MAX__ 0xffffffffU_REENT_CHECK_EMERGENCY(ptr) USBD_REQ_HANDLED__ARM_FEATURE_FP16_FML__containerof(x,s,m) ({ const volatile __typeof(((s *)0)->m) *__x = (x); __DEQUALIFY(s *, (const volatile char *)__x - __offsetof(s, m));})__restrict restrict__ATFILE_VISIBLE 0__USFRACT_EPSILON__ 0x1P-8UHRNULL ((void *)0)_Thread_local __threadbNumInterfaces___int_least32_t_defined 1__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__need_NULLUINT64_Cinterface__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX__USB_REQ_TYPE_STANDARD 0x00usb_control_request_dispatch__UINT32_MAX__ 0xffffffffULiFunctionset_address_before_status_REENT_MBTOWC_STATE(ptr) ((ptr)->_new._reent._mbtowc_state)USB_REQ_CLEAR_FEATURE 1_REENT_MBLEN_STATE(ptr) ((ptr)->_new._reent._mblen_state)__trylocks_shared(...) __lock_annotate(shared_trylock_function(__VA_ARGS__))__INT_LEAST8_MAX__ 0x7fbDescriptorType__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEX__locks_shared(...) __lock_annotate(shared_lock_function(__VA_ARGS__))unsigned signedctrl_buf_len__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__bounded BIT21 (1<<21)__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)__lock_acquire(lock) ((void) 0)__LFRACT_MIN__ (-0.5LR-0.5LR)__has_feature(x) 0__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1EXIT_FAILURE 1__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fBIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1___int8_t_defined 1__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__UINT_FAST16_TYPE__ unsigned int__SHRT_WIDTH__ 16__GCC_IEC_559_COMPLEX 0__ARM_FEATURE_MVEbMaxPacketSize0__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intUSB_DT_DEVICE_QUALIFIER 6iSerialNumber__SOFTFP__ 1__attribute_format_strfmon__(a,b) UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN_T_SIZE_ __FLT_EVAL_METHOD_TS_18661_3__ 0__attribute_malloc__ __lock_init_recursive(lock) ((void) 0)INT_LEAST16_MAXBIT18 (1<<18)UINT_FAST16_MAX__NULLABILITY_PRAGMA_POP SIZE_MAX__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32bNumEndpointsusbd_deviceBIT24 (1<<24)__INT32_MAX__ 0x7fffffffL__min_size(x) static (x)_TIMER_T_ unsigned longUINTMAX_MAXBIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLL__null_sentinel __attribute__((__sentinel__))__ARM_FEATURE_BF16_VECTOR_ARITHMETIC__ARM_FEATURE_UNALIGNED__need_NULL USB_DEV_STATUS_REMOTE_WAKEUP 0x02__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__section(x) __attribute__((__section__(x)))offsetof(TYPE,MEMBER) __builtin_offsetof (TYPE, MEMBER)__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__usb_interface__USFRACT_FBIT__ 8__LDBL_EPSILON__ 2.2204460492503131e-16LBIT28 (1<<28)__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1USB_DT_INTERFACE 4INTMAX_C(c) __INTMAX_C(c)__NULLABILITY_PRAGMA_PUSH __DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3__FLT32X_HAS_DENORM__ 1__FLT_MANT_DIG__ 24_RAND48_SEED_1 (0xabcd)__UDQ_IBIT__ 0ep_read_packet__OPTIMIZE__ 1__CC_SUPPORTS___FUNC__ 1RAND_MAX __RAND_MAX__FLT64_NORM_MAX__ 1.7976931348623157e+308F64__GNUCLIKE_MATH_BUILTIN_CONSTANTS __asserts_exclusive(...) __lock_annotate(assert_exclusive_lock(__VA_ARGS__))UINTPTR_MAX_T_PTRDIFF_ __USBSTD_H __LDBL_DENORM_MIN__ 4.9406564584124654e-324L__ULLFRACT_IBIT__ 0__INT64_MAX__ 0x7fffffffffffffffLL__FLT32X_MIN_10_EXP__ (-307)_ANSI_STDDEF_H _PTRDIFF_T_ MMIO16(addr) (*(volatile uint16_t *)(addr))USB_ENDPOINT_ADDR_OUT(x) (x)UINT16_C(c) __UINT16_C(c)STALLEDcurrent_config__GNUC__ 12bmAttributesWCHAR_MAX__const const__alloc_size(x) __attribute__((__alloc_size__(x)))__LONG_WIDTH__ 32_T_WCHAR_ INT32_MAX __INT32_MAX____UACCUM_FBIT__ 16__warn_references(sym,msg) __asm__(".section .gnu.warning." #sym); __asm__(".asciz \"" msg "\""); __asm__(".previous")__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0_NEWLIB_VERSION_H__ 1MIN(a,b) ((a) < (b) ? (a) : (b))_usbd_control_in_ATEXIT_DYNAMIC_ALLOC 1__need_size_t__ARM_ARCH 6_SIZE_T_ USB_REQ_SET_FEATURE 3__FLT_RADIX__ 2BIT3 (1<<3)__lock_acquire_recursive(lock) ((void) 0)_REENT_RAND48_MULT(ptr) ((ptr)->_new._reent._r48._mult)BIT29 (1<<29)__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXINTPTR_MIN__wchar_t__ __LDBL_HAS_QUIET_NAN__ 1USB_REQ_TYPE_DEVICE 0x00__LONG_LONG_WIDTH__ 64BIT6 (1<<6)__DEFINED_wchar_t force_nak__UINT_FAST64_MAX__ 0xffffffffffffffffULL__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINT_FAST8_MIN (-INT_FAST8_MAX - 1)INTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024__WCHAR_T __SYS_CONFIG_H__ MB_CUR_MAX __locale_mb_cur_max()__FLT64_MIN__ 2.2250738585072014e-308F64wMaxPacketSize__INT_WIDTH__ 32_HAVE_CC_INHIBIT_LOOP_TO_LIBCALL 1__FLT_MIN_EXP__ (-125)__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4_PTRDIFF_T __BSD_VISIBLE 0__predict_false(exp) __builtin_expect((exp), 0)__unused __attribute__((__unused__))__nonnull_all __attribute__((__nonnull__))_REENT_MBSRTOWCS_STATE(ptr) ((ptr)->_new._reent._mbsrtowcs_state)MAX_USER_CONTROL_CALLBACK 4__UFRACT_MAX__ 0XFFFFP-16UR___int_least64_t_defined 1_Alignof(x) __alignof(x)iManufacturer__THROW UINTMAX_C__UHA_FBIT__ 8user_control_callbackINT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0_REENT_L64A_BUF(ptr) ((ptr)->_new._reent._l64a_buf)__EXP(x) __ ##x ##__complete__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX___NOTHROW _REENT_CHECK_ASCTIME_BUF(ptr) _ANSIDECL_H_ USB_ENDPOINT_ATTR_SYNCTYPE 0x0C__USER_LABEL_PREFIX__ __ARM_32BIT_STATE__UFRACT_FBIT__ 16__ACCUM_EPSILON__ 0x1P-15K__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)__GNUCLIKE_BUILTIN_MEMCPY 1_usbd_control_outUSB_REQ_TYPE_IN 0x80__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)USB_CLASS_VENDOR 0xFF__INT_FAST32_TYPE__ int__SIZEOF_LONG_LONG__ 8unsigned int_SIZE_T_DEFINED_ __GCC_ASM_FLAG_OUTPUTS__USB_DT_INTERFACE_ASSOCIATION_SIZE sizeof(struct usb_iface_assoc_descriptor)usb_control_state_SIZET_ __DEC_EVAL_METHOD__ 2__USACCUM_IBIT__ 8__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UINTMAX_TYPE__ long long unsigned int_WCHAR_T_DECLARED ep_stall_set_SYS_REENT_H_ __FLT_EVAL_METHOD__ 0bInterfaceClass__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__thumb2__UINT64_C(c) __UINT64_C(c)__ARM_FEATURE_LDREX_T_PTRDIFF __UQQ_FBIT__ 8INT16_C__ARM_FP16_ARGS__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT32X_DIG__ 15__requires_unlocked(...) __lock_annotate(locks_excluded(__VA_ARGS__))usbd_ep_nak_set__LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__WCHAR_T__ USB_REQ_TYPE_OUT 0x0___int_least8_t_defined 1__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN___GCC_WCHAR_T usbd_ep_stall_setUSB_FEAT_ENDPOINT_HALT 0__unlocks(...) __lock_annotate(unlock_function(__VA_ARGS__))__EXPORT __SIG_ATOMIC_TYPE__ int__OBSOLETE_MATH_DEFAULT 1_Noreturn __dead2extralen/build/libopencm3/lib/stm32/f0bRequest_UNBUF_STREAM_OPT 1__IMPORT _RAND48_SEED_2 (0x1234)poll__USA_FBIT__ 16__volatile volatile_MACHINE__TYPES_H __IEEE_LITTLE_ENDIAN __LDBL_MIN_10_EXP__ (-307)INT64_MAXINT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1control_state__LFRACT_EPSILON__ 0x1P-31LR_BEGIN_STD_C __malloc_like __attribute__((__malloc__))bFunctionSubClassBIT20 (1<<20)__ARM_SIZEOF_MINIMAL_ENUM 1USB_REQ_TYPE_OTHER 0x03_POINTER_INT long__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32xep_size_PTRDIFF_T_DECLARED INT_FAST64_MAXUSB_DT_INTERFACE_POWER 8__FRACT_EPSILON__ 0x1P-15R__FLT32_MIN_10_EXP__ (-37)__RAND_MAX 0x7fffffff__lock_try_acquire(lock) ((void) 0)__STRING(x) #x_WCHAR_T __size_t__ARM_FP16_FORMAT_ALTERNATIVEUSB_DT_OTHER_SPEED_CONFIGURATION 7__FBSDID(s) struct __hack_usbd_deviceGNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsusb_control_recv_chunk_MACHINE__DEFAULT_TYPES_H __BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)_GCC_PTRDIFF_T __GNUCLIKE_BUILTIN_NEXT_ARG 1__TA_IBIT__ 64usbd_ep_write_packet__LOCK_INIT(class,lock) static int lock = 0;_SIZE_T _WCHAR_T_H __ARM_FEATURE_QRDMX__ARM_ARCH_ISA_THUMB 1__ASMNAME(cname) __XSTRING (__USER_LABEL_PREFIX__) cname__LONG_LONG_MAX__ 0x7fffffffffffffffLL_FSEEK_OPTIMIZATION 1__WINT_WIDTH__ 32__arg_type_tag(arg_kind,arg_idx,type_tag_idx) __USQ_IBIT__ 0_REENT_INIT_PTR(var) { memset((var), 0, sizeof(*(var))); _REENT_INIT_PTR_ZEROED(var); }BIT11 (1<<11)__COPYRIGHT(s) struct __hack__UFRACT_IBIT__ 0wTotalLength_REENT_MBRLEN_STATE(ptr) ((ptr)->_new._reent._mbrlen_state)_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0usbd_request_return_codes__ULACCUM_MIN__ 0.0ULK_STDDEF_H_ INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__SIZE_T usb_control_setup_writeUSB_DT_INTERFACE_ASSOCIATION 11__nonnull(x) __attribute__((__nonnull__ x))__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1__FLT32_DIG__ 6DATA_INbNumConfigurationsBIT15 (1<<15)__compar_fn_t_defined disconnect../../usb/usb_control.cUSB_REQ_TYPE_ENDPOINT 0x02__EXP___int64_t_defined 1__LDBL_HAS_DENORM__ 1__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7INT32_MAX__BEGIN_DECLS __ACCUM_MIN__ (-0X1P15K-0X1P15K)__GNUC_VA_LIST_COMPATIBILITY 1__ARM_FEATURE_CRYPTOINT16_MIN (-INT16_MAX - 1)__INT_LEAST32_TYPE__ long intUSB_REQ_SET_ADDRESS 5UINT_LEAST16_MAXBIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2__NEWLIB_PATCHLEVEL__ 0bLength__ORDER_LITTLE_ENDIAN__ 1234size__FLT_NORM_MAX__ 3.4028234663852886e+38Fuser_callback_set_altsettinglong long unsigned int__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)wIndex__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__ULLACCUM_EPSILON__ 0x1P-32ULLK_SIZE_T_DEFINED __DQ_FBIT__ 63__GNU_VISIBLE 0INT_LEAST64_MAXuint16_t__PTRDIFF_T __UHQ_IBIT__ 0INT_LEAST8_MIN_REENT_WCTOMB_STATE(ptr) ((ptr)->_new._reent._wctomb_state)usbd_dev__INT_FAST16_TYPE__ intextra__USBD_H __SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__UINT_LEAST16_TYPE__ short unsigned intUINT16_MAX__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intSTATUS_INusbd_control_complete_callback__signed signedSTATUS_OUT__UTQ_FBIT__ 128_REENT_ASCTIME_BUF(ptr) ((ptr)->_new._reent._asctime_buf)__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffff__have_longlong64 1INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)PTRDIFF_MAX __PTRDIFF_MAX__INT8_CbFunctionProtocolINT8_MIN__size_t _WCHAR_T_DEFINED idProduct__trylocks_exclusive(...) __lock_annotate(exclusive_trylock_function(__VA_ARGS__))USB_REQ_TYPE_TYPE 0x60ep_write_packetUINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRBIT26 (1<<26)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long int__always_inline __inline__ __attribute__((__always_inline__))iConfiguration_ATEXIT_SIZE 32USBD_REQ_NOTSUPPidVendor_BSD_SIZE_T_ WCHAR_MIN__no_lock_analysis __lock_annotate(no_thread_safety_analysis)_WCHAR_T_ true 1_REENT_STDIO_STREAM(var,index) &(var)->__sf[index]desc_T_WCHAR usb_iface_assoc_descriptor_TIME_T_ __int_least64_t_CLOCKID_T_ unsigned long_REENT_CHECK_TM(ptr) __arm__ 1__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__INT_WCHAR_T_H __FLT32X_MAX__ 1.7976931348623157e+308F32xwValue__ARM_EABI__ 1INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1WINT_MIN __WINT_MIN__USB_ENDPOINT_ATTR_SYNC 0x0C__QQ_IBIT__ 0__LLACCUM_FBIT__ 31USB_FEAT_DEVICE_REMOTE_WAKEUP 1bInterfaceSubClass__GNUC_MINOR__ 2USB_REQ_TYPE_DIRECTION 0x80__lock_release_recursive(lock) ((void) 0)__UINT_LEAST32_TYPE__ long unsigned intinit__ARM_FEATURE_NUMERIC_MAXMIN_RAND48_MULT_1 (0xdeec)__INTMAX_TYPE__ long long intusbd_register_control_callbackSTM32F0 1_RAND48_SEED_0 (0x330e)INTMAX_MAX__GNUCLIKE_CTOR_SECTION_HANDLING 1bFirstInterface__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1UINT_LEAST32_MAX__FLT64_HAS_QUIET_NAN__ 1__ptrvalue _NOINLINE_STATIC _NOINLINE static__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CINT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intMMIO64(addr) (*(volatile uint64_t *)(addr))bDeviceClass__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRdriverWCHAR_MAX __WCHAR_MAX____ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4__lock_close_recursive(lock) ((void) 0)USB_ENDPOINT_ATTR_ADAPTIVE 0x08__UINT64_TYPE__ long long unsigned intusbd_set_altsetting_callback__INT64_C(c) c ## LLINT8_MAX __INT8_MAX___FVWRITE_IN_STREAMIO 1__lockable __lock_annotate(lockable)ep_reset__END_DECLS __generic(expr,t,yes,no) __builtin_choose_expr( __builtin_types_compatible_p(__typeof(expr), t), yes, no)__LONG_MAX__ 0x7fffffffL__ARM_FEATURE_CDEbInterfaceNumberMAX_USER_SET_CONFIG_CALLBACK 4unsignedINT_LEAST32_MIN (-INT_LEAST32_MAX - 1)usbd_endpoint_callbackshort int_STDDEF_H __pt_guarded_by(x) __lock_annotate(pt_guarded_by(x))__guarded_by(x) __lock_annotate(guarded_by(x))__GNUCLIKE___OFFSETOF 1__UINT16_C(c) c__FLT64_MIN_EXP__ (-1021)_REENT_INIT_ATEXIT _NULL, _ATEXIT_INIT,__CC_SUPPORTS___INLINE__ 1__UDA_IBIT__ 32__printflike(fmtarg,firstvararg) __attribute__((__format__ (__printf__, fmtarg, firstvararg)))__USB_PRIVATE_H __fastcall __attribute__((__fastcall__))current_address__lock_annotate(x) BIT2 (1<<2)_REENT_SIGNAL_BUF(ptr) ((ptr)->_new._reent._signal_buf)__ATOMIC_RELAXED 0_ATTRIBUTE(attrs) __attribute__ (attrs)__ARM_FEATURE_COPROC__ATTRIBUTE_IMPURE_PTR__ __DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53BIT5 (1<<5)BIT1 (1<<1)__rangeof(type,start,end) (__offsetof(type, end) - __offsetof(type, start))__dead2 __attribute__((__noreturn__))INT_LEAST32_MAX__USES_INITFINI__ 1USB_DEV_STATUS_SELF_POWERED 0x01__lock_init(lock) ((void) 0)__need_ptrdiff_t__DBL_DECIMAL_DIG__ 17__have_long32 1_GLOBAL_REENT _global_impure_ptr_NULL 0__flexarr [0]INT16_C(c) __INT16_C(c)UINT32_MAX__INT16_MAX__ 0x7fff_WANT_REGISTER_FINI 1__DEVOLATILE(type,var) ((type)(__uintptr_t)(volatile void *)(var))DATA_OUT__sym_compat(sym,impl,verid) __asm__(".symver " #impl ", " #sym "@" #verid)__SSP_FORTIFY_LEVEL 0__GNUCLIKE_BUILTIN_STDARG 1__XSI_VISIBLE 0_STDLIB_H_ INT_FAST32_MIN (-INT_FAST32_MAX - 1)__QQ_FBIT__ 7__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1otgfs_usb_driver stm32f107_usb_driver__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64__GNUC_PREREQ__(ma,mi) __GNUC_PREREQ(ma, mi)__pure2 __attribute__((__const__))__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32__ARM_FEATURE_CRC32__strong_reference(sym,aliassym) extern __typeof (sym) aliassym __attribute__ ((__alias__ (#sym)))__LDBL_NORM_MAX__ 1.7976931348623157e+308L__ULLFRACT_EPSILON__ 0x1P-64ULLR__unreachable() __builtin_unreachable()__SIZEOF_WINT_T__ 4__INT_LEAST32_MAX__ 0x7fffffffL__STDC__ 1__LDBL_DECIMAL_DIG__ 17USB_REQ_TYPE_RECIPIENT 0x1Fusb_control_send_chunk__GNUCLIKE_ASM 3__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1__scanflike(fmtarg,firstvararg) __attribute__((__format__ (__scanf__, fmtarg, firstvararg)))_WIDE_ORIENT 1user_callback_reset__ULLACCUM_MIN__ 0.0ULLK_SYS__TYPES_H __INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1_RAND48_MULT_0 (0xe66d)SIG_ATOMIC_MAX__GNUCLIKE_BUILTIN_VAALIST 1__locks_exclusive(...) __lock_annotate(exclusive_lock_function(__VA_ARGS__))USB_ENDPOINT_ATTR_BULK 0x02__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPROD__Long long_NEWLIB_VERSION "3.3.0"__pure __attribute__((__pure__))_GCC_SIZE_T __CC_SUPPORTS_WARNING 1PTRDIFF_MAX__ULLFRACT_MIN__ 0.0ULLRUINT_FAST8_MAX_REENT_MP_P5S(ptr) ((ptr)->_p5s)_REENT_CHECK_RAND48(ptr) __lock_release(lock) ((void) 0)__GCC_CONSTRUCTIVE_SIZE 64_BSD_WCHAR_T___LLFRACT_IBIT__ 0__CC_SUPPORTS_VARADIC_XXX 1__INT16_TYPE__ short int__LLFRACT_MIN__ (-0.5LLR-0.5LLR)uint32_tBIT12 (1<<12)__weak_reference(sym,alias) __asm__(".weak " #alias); __asm__(".equ " #alias ", " #sym)__SACCUM_EPSILON__ 0x1P-7HK_REENT_CHECK_VERIFY 1__need_wchar_tuser_callback_resumeusbd_control_callback__UHA_IBIT__ 8__need_wint_t bMaxPower__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15EXIT_SUCCESS 0_Atomic(T) struct { T volatile __val; }__SIZE_WIDTH__ 32bConfigurationValueBIT16 (1<<16)otghs_usb_driver stm32f207_usb_driver__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8__long_double_t long double__INT_LEAST16_TYPE__ short intLAST_DATA_IN__DBL_MAX__ ((double)1.7976931348623157e+308L)_REENT_WCRTOMB_STATE(ptr) ((ptr)->_new._reent._wcrtomb_state)short unsigned int__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1__thumb__ 1__LDBL_MAX_10_EXP__ 308INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1__format_arg(fmtarg) __attribute__((__format_arg__ (fmtarg)))__compiler_membar() __asm __volatile(" " : : : "memory")__HQ_FBIT__ 15__bool_true_false_are_defined 1__datatype_type_tag(kind,type) __RCSID(s) struct __hack__lock_try_acquire_recursive(lock) ((void) 0)__SIZE_MAX__ 0xffffffffU__ARM_FEATURE_SAT__INT_LEAST16_MAX__ 0x7fffUSB_DT_STRING 3USB_ENDPOINT_ATTR_TYPE 0x03__ARM_ARCH__DEFINED_ptrdiff_t _SYS_CDEFS_H_ BIT25 (1<<25)type_mask__DA_FBIT__ 31_RAND48_ADD (0x000b)__printf0like(fmtarg,firstvararg) SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__INT_LEAST64_MININT32_MINUSB_ENDPOINT_ATTR_USAGETYPE 0x30bInterfaceCount__LLFRACT_EPSILON__ 0x1P-63LLR__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53__ARM_ASM_SYNTAX_UNIFIED__usb_control_setup_readWINT_MAX__INT16_C(c) cUSB_ENDPOINT_ADDR_IN(x) (0x80 | (x))INT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32__strftimelike(fmtarg,firstvararg) __attribute__((__format__ (__strftime__, fmtarg, firstvararg)))_ATEXIT_INIT {_NULL, 0, {_NULL}, {{_NULL}, {_NULL}, 0, 0}}USB_DT_ENDPOINT_SIZE 7__DEQUALIFY(type,var) ((type)(__uintptr_t)(const volatile void *)(var))__ATOMIC_ACQ_REL 4BIT4 (1<<4)__HQ_IBIT__ 0__packed __attribute__((__packed__))_WCHAR_T_DEFINED_ _usbd_driverUSB_REQ_SET_INTERFACE 11bEndpointAddress__asserts_shared(...) __lock_annotate(assert_shared_lock(__VA_ARGS__))__SYS_LOCK_H__ __FLT32_NORM_MAX__ 3.4028234663852886e+38F32_REENT_ASCTIME_SIZE 26SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__PTRDIFF_MIN (-PTRDIFF_MAX - 1)__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0UINT64_MAX __UINT64_MAX__INT_FAST16_MAXuser_callback_suspend__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long int_REENT_INIT(var) { 0, _REENT_STDIO_STREAM(&(var), 0), _REENT_STDIO_STREAM(&(var), 1), _REENT_STDIO_STREAM(&(var), 2), 0, "", 0, _NULL, 0, _NULL, _NULL, 0, _NULL, _NULL, 0, _NULL, { { 0, _NULL, "", {0, 0, 0, 0, 0, 0, 0, 0, 0}, 0, 1, { {_RAND48_SEED_0, _RAND48_SEED_1, _RAND48_SEED_2}, {_RAND48_MULT_0, _RAND48_MULT_1, _RAND48_MULT_2}, _RAND48_ADD }, {0, {0}}, {0, {0}}, {0, {0}}, "", "", 0, {0, {0}}, {0, {0}}, {0, {0}}, {0, {0}}, {0, {0}} } }, _REENT_INIT_ATEXIT _NULL, {_NULL, 0, _NULL} }ctrl_buf__ARM_FEATURE_CDE_COPROCUSB_REQ_TYPE_CLASS 0x20__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xGCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| NA„…†Ž^B„…†‡ŽD0A„Ž>A„…†ŽhA„…†Ž0A„…†‡ŽjA„…†Ž‚A„…†Ž`A„…†ŽA+aeabi!6S-MM ñÿN )^ ""F"$$X>$&&oh&(())++--/12468np:<>@BDFHJLNPRTVXZ\^`bdfhjlr†ÞH{Ý @ q¢Ô >nœÌü-^Áò#Rqt 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"¾ # /0 2;/; !#"Î$# 0Û$# 0›.2 s. lt f0 !!ƒ Æ ¼.= à! !›.=&.2&!J . /Y"?! 6f < 0= « <È</ J Y!/ ! / < .À C !È.(tX <+[ J Y!/ ! / ! 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(a) : (b))__ULACCUM_MIN__ 0.0ULK_ATEXIT_DYNAMIC_ALLOC 1__need_size_t__ARM_ARCH 6_SIZE_T_ USB_REQ_SET_FEATURE 3__FLT_RADIX__ 2BIT3 (1<<3)long long int_REENT_RAND48_MULT(ptr) ((ptr)->_new._reent._r48._mult)BIT29 (1<<29)__ARM_FEATURE_CMSEINT16_MAXassocINTPTR_MIN__wchar_t__ __LDBL_HAS_QUIET_NAN__ 1USB_REQ_TYPE_DEVICE 0x00__LONG_LONG_WIDTH__ 64BIT6 (1<<6)__DEFINED_wchar_t force_nak__UINT_FAST64_MAX__ 0xffffffffffffffffULL__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__STDC__ 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINT_FAST8_MIN (-INT_FAST8_MAX - 1)INTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024__WCHAR_T __SYS_CONFIG_H__ __FLT64_MIN__ 2.2250738585072014e-308F64__GNUC_VA_LIST_COMPATIBILITY 1wMaxPacketSize__INT_WIDTH__ 32_HAVE_CC_INHIBIT_LOOP_TO_LIBCALL 1__FLT_MIN_EXP__ (-125)__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4_PTRDIFF_T __BSD_VISIBLE 0__predict_false(exp) __builtin_expect((exp), 0)__unused __attribute__((__unused__))__nonnull_all __attribute__((__nonnull__))_REENT_MBSRTOWCS_STATE(ptr) ((ptr)->_new._reent._mbsrtowcs_state)MAX_USER_CONTROL_CALLBACK 4totallen__UFRACT_MAX__ 0XFFFFP-16UR___int_least64_t_defined 1_Alignof(x) __alignof(x)iManufacturer__THROW UINTMAX_C__UHA_FBIT__ 8user_control_callbackINT_FAST64_MIN (-INT_FAST64_MAX - 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1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1control_state__LFRACT_EPSILON__ 0x1P-31LR_BEGIN_STD_C __malloc_like __attribute__((__malloc__))bFunctionSubClassBIT20 (1<<20)__ARM_SIZEOF_MINIMAL_ENUM 1USB_REQ_TYPE_OTHER 0x03_POINTER_INT long__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1INT_FAST64_MAXUSB_DT_INTERFACE_POWER 8__FRACT_EPSILON__ 0x1P-15R__FLT32_MIN_10_EXP__ (-37)__RAND_MAX 0x7fffffff__lock_try_acquire(lock) ((void) 0)__STRING(x) #x_WCHAR_T INT8_MAX __INT8_MAX____ARM_FP16_FORMAT_ALTERNATIVE__FBSDID(s) struct __hack_usbd_deviceGNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sections_MACHINE__DEFAULT_TYPES_H __BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)_GCC_PTRDIFF_T __GNUCLIKE_BUILTIN_NEXT_ARG 1__TA_IBIT__ 64__LOCK_INIT(class,lock) static int lock = 0;_SIZE_T _WCHAR_T_H __ARM_FEATURE_QRDMX__ARM_ARCH_ISA_THUMB 1__ASMNAME(cname) __XSTRING (__USER_LABEL_PREFIX__) cname__LONG_LONG_MAX__ 0x7fffffffffffffffLL_FSEEK_OPTIMIZATION 1__WINT_WIDTH__ 32usb_standard_get_interface__arg_type_tag(arg_kind,arg_idx,type_tag_idx) _REENT_INIT_PTR(var) { memset((var), 0, sizeof(*(var))); _REENT_INIT_PTR_ZEROED(var); }BIT11 (1<<11)__COPYRIGHT(s) struct __hack__UFRACT_IBIT__ 0wTotalLength_REENT_MBRLEN_STATE(ptr) ((ptr)->_new._reent._mbrlen_state)_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0usbd_request_return_codes_STDDEF_H_ INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__SIZE_T bFunctionClassUSB_DT_INTERFACE_ASSOCIATION 11INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1__FLT32_DIG__ 6DATA_INbNumConfigurationsBIT15 (1<<15)UINT16_CdisconnectUSB_REQ_TYPE_ENDPOINT 0x02num_strings___int64_t_defined 1__LDBL_HAS_DENORM__ 1iface__SACCUM_FBIT__ 7INT32_MAX__BEGIN_DECLS __ACCUM_MIN__ (-0X1P15K-0X1P15K)__ARM_FEATURE_CRYPTOINT16_MIN (-INT16_MAX - 1)__INT_LEAST32_TYPE__ long intUSB_REQ_CLEAR_FEATURE 1USB_REQ_SET_ADDRESS 5UINT_LEAST16_MAXBIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2__NEWLIB_PATCHLEVEL__ 0bLength__ORDER_LITTLE_ENDIAN__ 1234__size_t__FLT_NORM_MAX__ 3.4028234663852886e+38Fuser_callback_set_altsettinglong long unsigned int__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)wIndexcommand__LDBL_IS_IEC_60559__ 2__ULLACCUM_EPSILON__ 0x1P-32ULLK_SIZE_T_DEFINED __DQ_FBIT__ 63__GNU_VISIBLE 0INT_LEAST64_MAXuint16_t__PTRDIFF_T __UHQ_IBIT__ 0INT_LEAST8_MIN_REENT_WCTOMB_STATE(ptr) ((ptr)->_new._reent._wctomb_state)usbd_dev__INT_FAST16_TYPE__ intextra__USBD_H __SACCUM_MIN__ (-0X1P7HK-0X1P7HK)usb_standard_set_address__UINT_LEAST16_TYPE__ short unsigned intUINT16_MAX__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intSTATUS_INusbd_control_complete_callback__signed signedSTATUS_OUT__UTQ_FBIT__ 128_REENT_ASCTIME_BUF(ptr) ((ptr)->_new._reent._asctime_buf)__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffff__have_longlong64 1INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)PTRDIFF_MAX __PTRDIFF_MAX__INT8_CbFunctionProtocolINT8_MIN__size_t _WCHAR_T_DEFINED idProduct__trylocks_exclusive(...) __lock_annotate(exclusive_trylock_function(__VA_ARGS__))USB_REQ_TYPE_TYPE 0x60ep_write_packetUINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRBIT26 (1<<26)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long int__always_inline __inline__ __attribute__((__always_inline__))iConfiguration_ATEXIT_SIZE 32USBD_REQ_NOTSUPPidVendor_BSD_SIZE_T_ WCHAR_MIN__no_lock_analysis __lock_annotate(no_thread_safety_analysis)_WCHAR_T_ true 1_REENT_STDIO_STREAM(var,index) &(var)->__sf[index]descdescr_idx_T_WCHAR __FLT64_MAX__ 1.7976931348623157e+308F64usb_iface_assoc_descriptor_TIME_T_ __int_least64_t_CLOCKID_T_ unsigned long_REENT_CHECK_TM(ptr) usb_device_descriptor__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15iInterface__FLT32X_MAX__ 1.7976931348623157e+308F32xwValueUSB_LANGID_ENGLISH_US__ARM_EABI__ 1INT16_MINusb_descriptor_type__FLT_IS_IEC_60559__ 2__THUMBEL__ 1WINT_MIN __WINT_MIN__USB_ENDPOINT_ATTR_SYNC 0x0C__QQ_IBIT__ 0__LLACCUM_FBIT__ 31USB_FEAT_DEVICE_REMOTE_WAKEUP 1bInterfaceSubClass__USQ_IBIT__ 0USB_REQ_TYPE_DIRECTION 0x80__lock_release_recursive(lock) ((void) 0)__UINT_LEAST32_TYPE__ long unsigned intinit__ARM_FEATURE_NUMERIC_MAXMIN_RAND48_MULT_1 (0xdeec)__INTMAX_TYPE__ long long intUINTPTR_MAX__GCC_ATOMIC_INT_LOCK_FREE 1STM32F0 1UINT_FAST8_MAX_RAND48_SEED_0 (0x330e)INTMAX_MAXbFirstInterface__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1UINT_LEAST32_MAX__FLT64_HAS_QUIET_NAN__ 1__ptrvalue _NOINLINE_STATIC _NOINLINE static_MACHINE__TYPES_H INT32_CUSB_ENDPOINT_ATTR_BULK 0x02INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intMMIO64(addr) (*(volatile uint64_t *)(addr))usb_standard_device_get_status__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRdriverWCHAR_MAX __WCHAR_MAX____ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4usbd_register_set_config_callbackUSB_ENDPOINT_ATTR_ADAPTIVE 0x08__UINT64_TYPE__ long long unsigned intusbd_set_altsetting_callback__INT64_C(c) c ## LL_FVWRITE_IN_STREAMIO 1__lockable __lock_annotate(lockable)ep_reset__END_DECLS __generic(expr,t,yes,no) __builtin_choose_expr( __builtin_types_compatible_p(__typeof(expr), t), yes, no)__LONG_MAX__ 0x7fffffffL__ARM_FEATURE_CDEbInterfaceNumberMAX_USER_SET_CONFIG_CALLBACK 4unsignedINT_LEAST32_MIN (-INT_LEAST32_MAX - 1)_STRING_H_ short int_STDDEF_H __pt_guarded_by(x) __lock_annotate(pt_guarded_by(x))__guarded_by(x) __lock_annotate(guarded_by(x))__GNUCLIKE___OFFSETOF 1__UINT16_C(c) c__FLT64_MIN_EXP__ (-1021)_REENT_INIT_ATEXIT _NULL, _ATEXIT_INIT,__CC_SUPPORTS___INLINE__ 1__UDA_IBIT__ 32__printflike(fmtarg,firstvararg) __attribute__((__format__ (__printf__, fmtarg, firstvararg)))usb_descriptor_index__fastcall __attribute__((__fastcall__))current_address__lock_annotate(x) BIT2 (1<<2)_REENT_SIGNAL_BUF(ptr) ((ptr)->_new._reent._signal_buf)__ATOMIC_RELAXED 0_ATTRIBUTE(attrs) __attribute__ (attrs)__ARM_FEATURE_COPROC__ATTRIBUTE_IMPURE_PTR__ __DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53BIT5 (1<<5)BIT1 (1<<1)__rangeof(type,start,end) (__offsetof(type, end) - __offsetof(type, start))__dead2 __attribute__((__noreturn__))INT_LEAST32_MAX__USES_INITFINI__ 1USB_DEV_STATUS_SELF_POWERED 0x01__lock_init(lock) ((void) 0)__need_ptrdiff_t__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__DBL_DECIMAL_DIG__ 17index__have_long32 1_GLOBAL_REENT _global_impure_ptr_NULL 0__flexarr [0]INT16_C(c) __INT16_C(c)__INT16_MAX__ 0x7fff_WANT_REGISTER_FINI 1__DEVOLATILE(type,var) ((type)(__uintptr_t)(volatile void *)(var))DATA_OUT__WCHAR_T__ __SSP_FORTIFY_LEVEL 0__GNUCLIKE_BUILTIN_STDARG 1__XSI_VISIBLE 0INT_FAST32_MIN (-INT_FAST32_MAX - 1)__QQ_FBIT__ 7__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1otgfs_usb_driver stm32f107_usb_driver__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64__GNUC_PREREQ__(ma,mi) __GNUC_PREREQ(ma, mi)__pure2 __attribute__((__const__))__UTA_IBIT__ 64__ARM_FEATURE_CRC32__strong_reference(sym,aliassym) extern __typeof (sym) aliassym __attribute__ ((__alias__ (#sym)))__LDBL_NORM_MAX__ 1.7976931348623157e+308L__ULLFRACT_EPSILON__ 0x1P-64ULLR__unreachable() __builtin_unreachable()__ACCUM_EPSILON__ 0x1P-15K__SIZEOF_WINT_T__ 4strlen__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17USB_REQ_TYPE_RECIPIENT 0x1F__GNUCLIKE_ASM 3__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1__scanflike(fmtarg,firstvararg) __attribute__((__format__ (__scanf__, fmtarg, firstvararg)))_WIDE_ORIENT 1user_callback_reset__ULLACCUM_MIN__ 0.0ULLK_SYS__TYPES_H __INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1memcpySIG_ATOMIC_MAX__GNUCLIKE_BUILTIN_VAALIST 1__sym_compat(sym,impl,verid) __asm__(".symver " #impl ", " #sym "@" #verid)USB_ENDPOINT_ATTR_CONTROL 0x00__locks_exclusive(...) __lock_annotate(exclusive_lock_function(__VA_ARGS__))bDeviceClassusb_language_idINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPROD__Long long_NEWLIB_VERSION "3.3.0"__pure __attribute__((__pure__))_GCC_SIZE_T __CC_SUPPORTS_WARNING 1PTRDIFF_MAX__ULLFRACT_MIN__ 0.0ULLR_T_WCHAR_ _REENT_MP_P5S(ptr) ((ptr)->_p5s)_REENT_CHECK_RAND48(ptr) __lock_release(lock) ((void) 0)__GCC_CONSTRUCTIVE_SIZE 64_BSD_WCHAR_T___LLFRACT_IBIT__ 0__CC_SUPPORTS_VARADIC_XXX 1__LLFRACT_MIN__ (-0.5LLR-0.5LLR)uint32_tBIT12 (1<<12)__weak_reference(sym,alias) __asm__(".weak " #alias); __asm__(".equ " #alias ", " #sym)__SACCUM_EPSILON__ 0x1P-7HK_REENT_CHECK_VERIFY 1__need_wchar_tuser_callback_resumeusbd_control_callback__UHA_IBIT__ 8__need_wint_t bMaxPower__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15_Atomic(T) struct { T volatile __val; }__SIZE_WIDTH__ 32__UINT_FAST16_TYPE__ unsigned intBIT16 (1<<16)otghs_usb_driver stm32f207_usb_driver__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8__long_double_t long double__INT_LEAST16_TYPE__ short int_RAND48_MULT_0 (0xe66d)LAST_DATA_IN__DBL_MAX__ ((double)1.7976931348623157e+308L)_REENT_WCRTOMB_STATE(ptr) ((ptr)->_new._reent._wcrtomb_state)short unsigned int__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1__thumb__ 1INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1__format_arg(fmtarg) __attribute__((__format_arg__ (fmtarg)))__compiler_membar() __asm __volatile(" " : : : "memory")__HQ_FBIT__ 15__bool_true_false_are_defined 1__datatype_type_tag(kind,type) __RCSID(s) struct __hack__lock_try_acquire_recursive(lock) ((void) 0)__SIZE_MAX__ 0xffffffffU__ARM_FEATURE_SAT__INT_LEAST16_MAX__ 0x7fffUSB_DT_STRING 3USB_ENDPOINT_ATTR_TYPE 0x03__DECONST(type,var) ((type)(__uintptr_t)(const void *)(var))__ARM_ARCH__DEFINED_ptrdiff_t _SYS_CDEFS_H_ BIT25 (1<<25)type_mask__nonnull(x) __attribute__((__nonnull__ x))_RAND48_ADD (0x000b)__printf0like(fmtarg,firstvararg) SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__INT_LEAST64_MINusb_standard_set_interfaceUSB_ENDPOINT_ATTR_USAGETYPE 0x30bInterfaceCount_REENT_ASCTIME_SIZE 26__LLFRACT_EPSILON__ 0x1P-63LLR__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53__ARM_ASM_SYNTAX_UNIFIED__WINT_MAX__INT16_C(c) cUSB_ENDPOINT_ADDR_IN(x) (0x80 | (x))INT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32__strftimelike(fmtarg,firstvararg) __attribute__((__format__ (__strftime__, fmtarg, firstvararg)))_ATEXIT_INIT {_NULL, 0, {_NULL}, {{_NULL}, {_NULL}, 0, 0}}USB_DT_ENDPOINT_SIZE 7__DEQUALIFY(type,var) ((type)(__uintptr_t)(const volatile void *)(var))usb_standard_get_descriptor__ATOMIC_ACQ_REL 4BIT4 (1<<4)__HQ_IBIT__ 0__packed __attribute__((__packed__))_WCHAR_T_DEFINED_ _usbd_driverUSB_REQ_SET_INTERFACE 11bEndpointAddress__asserts_shared(...) __lock_annotate(assert_shared_lock(__VA_ARGS__))__SYS_LOCK_H__ __FLT32_NORM_MAX__ 3.4028234663852886e+38F32found_indexSIG_ATOMIC_MAX __SIG_ATOMIC_MAX____UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0UINT64_MAX __UINT64_MAX__INT_FAST16_MAXuser_callback_suspend__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long int_REENT_INIT(var) { 0, _REENT_STDIO_STREAM(&(var), 0), _REENT_STDIO_STREAM(&(var), 1), _REENT_STDIO_STREAM(&(var), 2), 0, "", 0, _NULL, 0, _NULL, _NULL, 0, _NULL, _NULL, 0, _NULL, { { 0, _NULL, "", {0, 0, 0, 0, 0, 0, 0, 0, 0}, 0, 1, { {_RAND48_SEED_0, _RAND48_SEED_1, _RAND48_SEED_2}, {_RAND48_MULT_0, _RAND48_MULT_1, _RAND48_MULT_2}, _RAND48_ADD }, {0, {0}}, {0, {0}}, {0, {0}}, "", "", 0, {0, {0}}, {0, {0}}, {0, {0}}, {0, {0}}, {0, {0}} } }, _REENT_INIT_ATEXIT _NULL, {_NULL, 0, _NULL} }ctrl_buf__ARM_FEATURE_CDE_COPROCUSB_REQ_TYPE_CLASS 0x20__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xGCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| 6B„Ž¢Aƒ„…†‡Ž&B„Ž|B„…†ŽPA„…†Ž&A„ŽA„ŽA„ŽˆA„…†‡ŽAP*A„ŽHA„…†Ž0A„…†ŽLA„…†Ž8A„…†ŽA+aeabi!6S-MM ñÿ6,¢K& j| !!…P!"" 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9_REENT_INIT_PTR_ZEROED(var) { (var)->_stdin = _REENT_STDIO_STREAM(var, 0); (var)->_stdout = _REENT_STDIO_STREAM(var, 1); (var)->_stderr = _REENT_STDIO_STREAM(var, 2); (var)->_new._reent._rand_next = 1; (var)->_new._reent._r48._seed[0] = _RAND48_SEED_0; (var)->_new._reent._r48._seed[1] = _RAND48_SEED_1; (var)->_new._reent._r48._seed[2] = _RAND48_SEED_2; (var)->_new._reent._r48._mult[0] = _RAND48_MULT_0; (var)->_new._reent._r48._mult[1] = _RAND48_MULT_1; (var)->_new._reent._r48._mult[2] = _RAND48_MULT_2; (var)->_new._reent._r48._add = _RAND48_ADD; }__SFRACT_EPSILON__ 0x1P-7HR__CONCAT1(x,y) x ## ycur_altsetting_T_SIZE __INT32_C(c) c ## L__USQ_FBIT__ 32__ORDER_BIG_ENDIAN__ 4321SIZE_MAX__SQ_FBIT__ 31UINT32_C__UTA_FBIT__ 64ep_outnum_altsetting__P(protos) protos__DEFINED_ptrdiff_t __UHQ_FBIT__ 16doeptsiz__PTRDIFF_WIDTH__ 32user_callback_sof__FLT32_MAX_10_EXP__ 38INT8_C(c) __INT8_C(c)__UINT_FAST8_MAX__ 0xffffffffUusb_endpoint_descriptor__has_extension __has_featureUINT16_C(c) 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1.1754943508222875e-38F__need_size_t __HA_FBIT__ 7BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)__FDPIC__USB_DT_INTERFACE_SIZE 9USB_DT_OTHER_SPEED_CONFIGURATION 7__FLT32_IS_IEC_60559__ 2EVENT_NEED_STATUS__noinline __attribute__ ((__noinline__))INT_FAST64_MIN__USFRACT_IBIT__ 0lock__weak_symbol __attribute__((__weak__))USB_REQ_SET_DESCRIPTOR 7__USFRACT_MIN__ 0.0UHR__used __attribute__((__used__))CBWCB__ARM_NEON_REENT_EMERGENCY(ptr) ((ptr)->_emergency)__GNUCLIKE_CTOR_SECTION_HANDLING 1__UINT8_MAX__ 0xffvendor_id_REENT _impure_ptr__LDBL_MAX_EXP__ 1024USB_REQ_TYPE_VENDOR 0x40__SVID_VISIBLE 0__builtin_memcpy__exported __attribute__((__visibility__("default")))__SCCSID(s) struct __hackBIT7 (1<<7)__DBL_HAS_DENORM__ 1SBC_ASCQ_FORMAT_COMMAND_FAILED__CC_SUPPORTS___INLINE 1_MB_LEN_MAX 1extra_string_idxUSB_MSC_PROTOCOL_CBI_ALT 0x01__DA_FBIT__ 31__alloc_align(x) __attribute__((__alloc_align__(x)))BIT17 (1<<17)USB_ENDPOINT_ATTR_NOSYNC 0x00__GXX_ABI_VERSION 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USBD_REQ_HANDLEDusbd_ep_read_packetINT_FAST16_MAX __INT_FAST16_MAX____ARM_FEATURE_FP16_FML__containerof(x,s,m) ({ const volatile __typeof(((s *)0)->m) *__x = (x); __DEQUALIFY(s *, (const volatile char *)__x - __offsetof(s, m));})leftSCSI_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1E__restrict restrict__ATFILE_VISIBLE 0__USFRACT_EPSILON__ 0x1P-8UHRNULL ((void *)0)_Thread_local __thread__OPTIMIZE_SIZE__ 1__USFRACT_FBIT__ 8__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKSCSI_REPORT_LUNS 0xA0__need_NULLinterface__LLFRACT_MIN__ (-0.5LLR-0.5LLR)INT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX__USB_REQ_TYPE_STANDARD 0x00__UINT32_MAX__ 0xffffffffULiFunctionset_address_before_status_REENT_MBTOWC_STATE(ptr) ((ptr)->_new._reent._mbtowc_state)USB_REQ_CLEAR_FEATURE 1_REENT_MBLEN_STATE(ptr) ((ptr)->_new._reent._mblen_state)__trylocks_shared(...) __lock_annotate(shared_trylock_function(__VA_ARGS__))usbd_endpoint_callbackbDescriptorType__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEX__locks_shared(...) __lock_annotate(shared_lock_function(__VA_ARGS__))unsigned signedctrl_buf_len__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__bounded BIT21 (1<<21)__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)usb_setup_data__has_feature(x) 0__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1EXIT_FAILURE 1__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fUSB_REQ_GET_STATUS 0BIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__UINT_FAST16_TYPE__ unsigned int__GCC_DESTRUCTIVE_SIZE 64__GCC_IEC_559_COMPLEX 0__ARM_FEATURE_MVEbMaxPacketSize0__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intUSB_DT_DEVICE_QUALIFIER 6iSerialNumberUSB_MSC_PROTOCOL_CBI 0x00SBC_SENSE_KEY_RECOVERED_ERROR__attribute_format_strfmon__(a,b) __UINT64_MAX__ 0xffffffffffffffffULLINT_FAST32_MIN_T_SIZE_ __FLT_EVAL_METHOD_TS_18661_3__ 0__attribute_malloc__ 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8__SIZEOF_WCHAR_T__ 4_PTRDIFF_T set_address__predict_false(exp) __builtin_expect((exp), 0)__unused __attribute__((__unused__))__nonnull_all __attribute__((__nonnull__))_REENT_MBSRTOWCS_STATE(ptr) ((ptr)->_new._reent._mbsrtowcs_state)transMAX_USER_CONTROL_CALLBACK 4__lock_try_acquire(lock) ((void) 0)__UFRACT_MAX__ 0XFFFFP-16URUSB_MSC_REQ_CODES_GET 0xFC___int_least64_t_defined 1INT64_MAXiManufacturer__THROW user_control_callbackINT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0_REENT_L64A_BUF(ptr) ((ptr)->_new._reent._l64a_buf)___int_wchar_t_h ascqcomplete__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)__LLFRACT_EPSILON__ 0x1P-63LLR_NOTHROW _REENT_CHECK_ASCTIME_BUF(ptr) _ANSIDECL_H_ BBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)__USER_LABEL_PREFIX__ event__UFRACT_FBIT__ 16__UDQ_FBIT__ 64INT16_MIN (-INT16_MAX - 1)__GNUCLIKE_BUILTIN_MEMCPY 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15evpdINT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX___WINT_T __LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1USB_REQ_TYPE_OUT 0x0___int_least8_t_defined 1__SOFTFP__ 1__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__SCSI_WRITE_12 0xAA__UINT8_TYPE__ unsigned charUSB_FEAT_ENDPOINT_HALT 0__unlocks(...) __lock_annotate(unlock_function(__VA_ARGS__))__EXPORT __SIG_ATOMIC_TYPE__ intSBC_ASC_UNRECOVERED_READ_ERROR_Noreturn __dead2extralenset_sbc_statusCSW_STATUS_SUCCESS 0INT8_MINbRequestiface_assoc__IMPORT _RAND48_SEED_2 (0x1234)poll__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)_MACHINE__TYPES_H bmCBWFlags__IEEE_LITTLE_ENDIAN _REENT_SIGNAL_SIZE 24__LDBL_MIN_10_EXP__ (-307)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1msc_data_tx_cbcontrol_state___int_size_t_h __LFRACT_EPSILON__ 0x1P-31LR_BEGIN_STD_C __malloc_like __attribute__((__malloc__))bFunctionSubClasssbc_ascqBIT20 (1<<20)__ARM_SIZEOF_MINIMAL_ENUM 1__EXP(x) __ ##x ##___POINTER_INT long__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1sbc_sense_key_Alignas(x) __aligned(x)__FRACT_EPSILON__ 0x1P-15R__FLT32_MIN_10_EXP__ (-37)SBC_ASC_PERIPHERAL_DEVICE_WRITE_FAULT__RAND_MAX 0x7fffffff__lock_init_recursive(lock) ((void) 0)__STRING(x) #x_WCHAR_T __ARM_FEATURE_BF16_VECTOR_ARITHMETIC__ARM_FP16_FORMAT_ALTERNATIVE__FBSDID(s) struct __hack_usbd_deviceGNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sections_MACHINE__DEFAULT_TYPES_H __BIGGEST_ALIGNMENT__ 8DATA_IN_GCC_PTRDIFF_T __GNUCLIKE_BUILTIN_NEXT_ARG 1__TA_IBIT__ 64usbd_ep_write_packet__LOCK_INIT(class,lock) static int lock = 0;SCSI_SYNCHRONIZE_CACHE 0x35_SIZE_T _WCHAR_T_H SBC_SENSE_KEY_HARDWARE_ERROR_RAND48_MULT_2 (0x0005)__ARM_FEATURE_QRDMXdCSWDataResidue__ARM_ARCH_ISA_THUMB 1__ASMNAME(cname) __XSTRING (__USER_LABEL_PREFIX__) cname__LONG_LONG_MAX__ 0x7fffffffffffffffLL_FSEEK_OPTIMIZATION 1CSW_SIGNATURE 0x53425355__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX___MACHSTDLIB_H_ __USQ_IBIT__ 0_REENT_INIT_PTR(var) { memset((var), 0, sizeof(*(var))); _REENT_INIT_PTR_ZEROED(var); }BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0wTotalLength_REENT_MBRLEN_STATE(ptr) ((ptr)->_new._reent._mbrlen_state)_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0usbd_request_return_codes__SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__SIZE_T bFunctionClassUSB_DT_INTERFACE_ASSOCIATION 11INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1__FLT32_DIG__ 6_PTRDIFF_T_DECLARED SBC_ASCQ_INITIALIZING_COMMAND_REQUIREDbNumConfigurationsBIT15 (1<<15)UINT16_Cset_sbc_status_gooddisconnectSCSI_READ_10 0x28USB_REQ_TYPE_ENDPOINT 0x02num_strings___int64_t_defined 1__LDBL_HAS_DENORM__ 1__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)__BEGIN_DECLS __ACCUM_MIN__ (-0X1P15K-0X1P15K)SCSI_READ_FORMAT_CAPACITIES 0x23_GCC_WCHAR_T __ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intUSB_REQ_SET_ADDRESS 5_usbd_mass_storageBIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2SBC_SENSE_KEY_MISCOMPAREbLength__ORDER_LITTLE_ENDIAN__ 1234__size_t__FLT_NORM_MAX__ 3.4028234663852886e+38Fuser_callback_set_altsettinglong long unsigned int__arg_type_tag(arg_kind,arg_idx,type_tag_idx) __alloc_size(x) __attribute__((__alloc_size__(x)))BIT31 (1<<31)_spc3_inquiry_responsewIndex_Null_unspecified __SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__ULLACCUM_EPSILON__ 0x1P-32ULLK__APCS_32__ 1__DQ_FBIT__ 63dCBWSignatureINT_LEAST64_MAXuint16_t__PTRDIFF_T __UHQ_IBIT__ 0INT_LEAST8_MIN_REENT_WCTOMB_STATE(ptr) ((ptr)->_new._reent._wctomb_state)usbd_dev__INT_FAST16_TYPE__ intextra__USBD_H __SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__const const__UINT_LEAST16_TYPE__ short unsigned int__need_wint_t__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intSTATUS_INusbd_control_complete_callback__signed signedSCSI_READ_6 0x08STATUS_OUT__UTQ_FBIT__ 128_REENT_ASCTIME_BUF(ptr) ((ptr)->_new._reent._asctime_buf)__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffff__have_longlong64 1USB_MSC_REQ_CODES_GML 0xFEPTRDIFF_MAX __PTRDIFF_MAX____SIZEOF_SHORT__ 2USB_MSC_REQ_GET_MAX_LUN 0xFEbFunctionProtocolep_out_size_WCHAR_T_DEFINED idProduct__trylocks_exclusive(...) __lock_annotate(exclusive_trylock_function(__VA_ARGS__))USB_REQ_TYPE_TYPE 0x60UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRproduct_id__DQ_IBIT__ 0_REENT_WCRTOMB_STATE(ptr) ((ptr)->_new._reent._wcrtomb_state)__always_inline __inline__ __attribute__((__always_inline__))iConfiguration_UNBUF_STREAM_OPT 1USBD_REQ_NOTSUPPidVendor_BSD_SIZE_T_ WCHAR_MINSCSI_TEST_UNIT_READY 0x00__no_lock_analysis __lock_annotate(no_thread_safety_analysis)force_nakmemsetUINT_LEAST16_MAX __UINT_LEAST16_MAX__desc_T_WCHAR ___int_ptrdiff_t_h _ATEXIT_DYNAMIC_ALLOC 1usb_iface_assoc_descriptor_TIME_T_ __int_least64_t_CLOCKID_T_ unsigned longINT16_C(c) __INT16_C(c)usb_device_descriptor__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15iInterface__FLT32X_MAX__ 1.7976931348623157e+308F32x___int16_t_defined 1__GNUCLIKE_BUILTIN_VAALIST 1__ARM_EABI__ 1INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1USB_ENDPOINT_ATTR_SYNC 0x0C__QQ_IBIT__ 0_NEWLIB_VERSION_H__ 1_SYS_REENT_H_ __LLACCUM_FBIT__ 31USB_FEAT_DEVICE_REMOTE_WAKEUP 1bInterfaceSubClass__GNUC_MINOR__ 2USB_REQ_TYPE_DIRECTION 0x80__lock_release_recursive(lock) ((void) 0)__UINT_LEAST32_TYPE__ long unsigned intinit__ARM_FEATURE_NUMERIC_MAXMIN_RAND48_MULT_1 (0xdeec)__INTMAX_TYPE__ long long intusbd_register_control_callbackSTM32F0 1_RAND48_SEED_0 (0x330e)INTMAX_MAXbFirstInterface__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1UINT_FAST64_MAX __UINT_FAST64_MAX____FLT64_HAS_INFINITY__ 1__ptrvalue _NOINLINE_STATIC _NOINLINE static__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_C__COPYRIGHT(s) struct __hackINT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intMMIO64(addr) (*(volatile uint64_t *)(addr))bDeviceClass__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRdriverUSB_FEAT_TEST_MODE 2__SIZEOF_SIZE_T__ 4usbd_register_set_config_callbackUSB_ENDPOINT_ATTR_ADAPTIVE 0x08__UINT64_TYPE__ long long unsigned intusbd_set_altsetting_callback__INT64_C(c) c ## LLINT8_MAX __INT8_MAX__HAVE_INITFINI_ARRAY 1__lockable __lock_annotate(lockable)ep_reset__END_DECLS __ARM_32BIT_STATE__generic(expr,t,yes,no) __builtin_choose_expr( __builtin_types_compatible_p(__typeof(expr), t), yes, no)__LDBL_MIN__ 2.2250738585072014e-308LSBC_SENSE_KEY_UNIT_ATTENTION__ARM_FEATURE_CDEbInterfaceNumber__BSD_VISIBLE 0unsignedSCSI_START_STOP_UNIT 0x1B__DOTS , ...INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)_STRING_H_ short intscsi_read_10__pt_guarded_by(x) __lock_annotate(pt_guarded_by(x))__GNUCLIKE_MATH_BUILTIN_RELOPS _SYS_SIZE_T_H __UINT16_C(c) c__FLT64_MIN_EXP__ (-1021)_REENT_INIT_ATEXIT _NULL, _ATEXIT_INIT,__CC_SUPPORTS___INLINE__ 1__UDA_IBIT__ 32__printflike(fmtarg,firstvararg) __attribute__((__format__ (__printf__, fmtarg, firstvararg)))USB_MSC_SUBCLASS_IEEE1667 0x08UINT_LEAST32_MAXcurrent_address__lock_annotate(x) BIT2 (1<<2)INT64_C__ATOMIC_RELAXED 0_ATTRIBUTE(attrs) __attribute__ (attrs)__ARM_FEATURE_COPROC__ATTRIBUTE_IMPURE_PTR__ __DBL_HAS_INFINITY__ 1scsi_write_10__SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53BIT5 (1<<5)_Atomic(T) struct { T volatile __val; }BIT1 (1<<1)__rangeof(type,start,end) (__offsetof(type, end) - __offsetof(type, start))INT8_C__GNUCLIKE___OFFSETOF 1INT_LEAST32_MAXSCSI_MODE_SENSE_10 0x5A__SIZEOF_FLOAT__ 4USB_DEV_STATUS_SELF_POWERED 0x01__lock_init(lock) ((void) 0)__need_ptrdiff_tUSB_MSC_REQ_CODES_BOMSR 0xFF__DBL_DECIMAL_DIG__ 17_PTRDIFF_T_ SCSI_READ_12 0xA8_GLOBAL_REENT _global_impure_ptr__ULACCUM_FBIT__ 32__flexarr [0]ep_in_sizemsd_buf__INT16_MAX__ 0x7fff_WANT_REGISTER_FINI 1__DEVOLATILE(type,var) ((type)(__uintptr_t)(volatile void *)(var))DATA_OUT__WCHAR_T__ __INT_WIDTH__ 32__GNUCLIKE_BUILTIN_STDARG 1scsi_inquiry__XSI_VISIBLE 0_STDLIB_H_ SBC_ASC_WRITE_PROTECTED__QQ_FBIT__ 7otgfs_usb_driver stm32f107_usb_driver__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64unlock__GNUC_PREREQ__(ma,mi) __GNUC_PREREQ(ma, mi)scsi_mode_sense_6__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32__SHRT_WIDTH__ 16__strong_reference(sym,aliassym) extern __typeof (sym) aliassym __attribute__ ((__alias__ (#sym)))__LDBL_NORM_MAX__ 1.7976931348623157e+308L__ULLFRACT_EPSILON__ 0x1P-64ULLR__unreachable() __builtin_unreachable()_ATEXIT_SIZE 32__SIZEOF_WINT_T__ 4strlen__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17USB_REQ_TYPE_RECIPIENT 0x1FSBC_SENSE_KEY_BLANK_CHECK__GNUCLIKE_ASM 3__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1__scanflike(fmtarg,firstvararg) __attribute__((__format__ (__scanf__, fmtarg, firstvararg)))_WCHAR_T_ __DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)user_callback_reset__ULLACCUM_MIN__ 0.0ULLK_SYS__TYPES_H __INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1memcpy_NOINLINE __attribute__ ((__noinline__))_ELIDABLE_INLINE static __inline____sym_compat(sym,impl,verid) __asm__(".symver " #impl ", " #sym "@" #verid)__locks_exclusive(...) __lock_annotate(exclusive_lock_function(__VA_ARGS__))../../usb/usb_msc.cUSB_ENDPOINT_ATTR_BULK 0x02__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPROD__Long longSBC_ASC_NO_ADDITIONAL_SENSE_INFORMATIONCBW_STATUS_PHASE_ERROR 2__pure __attribute__((__pure__))_GCC_SIZE_T USB_MSC_SUBCLASS_LOCKABLE 0x07__CC_SUPPORTS_WARNING 1_REENT_CHECK_TM(ptr) __ULLFRACT_MIN__ 0.0ULLRUINT_FAST8_MAXBIT26 (1<<26)_REENT_MP_P5S(ptr) ((ptr)->_p5s)_REENT_CHECK_RAND48(ptr) __lock_release(lock) ((void) 0)__GCC_CONSTRUCTIVE_SIZE 64SIG_ATOMIC_MAX__LLFRACT_IBIT__ 0__CC_SUPPORTS_VARADIC_XXX 1uint32_tBIT12 (1<<12)__lock_acquire(lock) ((void) 0)__weak_reference(sym,alias) __asm__(".weak " #alias); __asm__(".equ " #alias ", " #sym)SCSI_INQUIRY 0x12__SACCUM_EPSILON__ 0x1P-7HKUSB_REQ_TYPE_OTHER 0x03_REENT_CHECK_VERIFY 1__need_wchar_tUSB_MSC_SUBCLASS_RBC 0x01user_callback_resumeusbd_control_callbackuser_callback_suspend__GNUC_STDC_INLINE__ 1ep_write_packetbMaxPower__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15EXIT_SUCCESS 0BIT16 (1<<16)UINT64_C__SIZE_WIDTH__ 32bConfigurationValuemsc_data_rx_cbotghs_usb_driver stm32f207_usb_driver__WINT_MIN__ 0UINT_LEAST16_MINUINT_LEAST64_MAX __UINT_LEAST64_MAX____FLT64_DIG__ 15__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8__long_double_t long double__INT_LEAST16_TYPE__ short int_RAND48_MULT_0 (0xe66d)LAST_DATA_IN__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1__thumb__ 1scsi_write_6usb_msc_initSBC_ASC_FORMAT_ERROR__ARMEL__ 1__format_arg(fmtarg) __attribute__((__format_arg__ (fmtarg)))__compiler_membar() __asm __volatile(" " : : : "memory")__HQ_FBIT__ 15__bool_true_false_are_defined 1__MSC_H __datatype_type_tag(kind,type) __RCSID(s) struct __hack__lock_try_acquire_recursive(lock) ((void) 0)__SIZE_MAX__ 0xffffffffU__need_wint_t __ARM_FEATURE_SAT__INT_LEAST16_MAX__ 0x7fffUSB_DT_STRING 3USB_ENDPOINT_ATTR_TYPE 0x03__DECONST(type,var) ((type)(__uintptr_t)(const void *)(var))__ARM_ARCH__LONG_MAX__ 0x7fffffffL__volatile volatile_SYS_CDEFS_H_ BIT25 (1<<25)___int8_t_defined 1type_maskbyte_count__nonnull(x) __attribute__((__nonnull__ x))_RAND48_ADD (0x000b)sbc_sense_info__printf0like(fmtarg,firstvararg) SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__INT_LEAST64_MINPTRDIFF_MAXUSB_ENDPOINT_ATTR_USAGETYPE 0x30bInterfaceCountscsi_format_unit__strfmonlike(fmtarg,firstvararg) __attribute__((__format__ (__strfmon__, fmtarg, firstvararg)))_STDDEF_H_ __ARM_ARCH_6M__ 1__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53__WCHAR_WIDTH__ 32SCSI_READ_TOC_PMA_ATIP 0x43WINT_MAX__INT16_C(c) cUSB_ENDPOINT_ADDR_IN(x) (0x80 | (x))INT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32__strftimelike(fmtarg,firstvararg) __attribute__((__format__ (__strftime__, fmtarg, firstvararg)))_ATEXIT_INIT {_NULL, 0, {_NULL}, {{_NULL}, {_NULL}, 0, 0}}USB_DT_ENDPOINT_SIZE 7__ISO_C_VISIBLE 1999__ATOMIC_ACQ_REL 4BIT4 (1<<4)__INT32_TYPE__ long int__packed __attribute__((__packed__))__DBL_MIN_10_EXP__ (-307)_usbd_driverUSB_REQ_SET_INTERFACE 11bEndpointAddress__asserts_shared(...) __lock_annotate(assert_shared_lock(__VA_ARGS__))__SYS_LOCK_H__ __SFRACT_FBIT__ 7__FLT32_NORM_MAX__ 3.4028234663852886e+38F32_REENT_ASCTIME_SIZE 26UINT64_C(c) __UINT64_C(c)PTRDIFF_MIN (-PTRDIFF_MAX - 1)__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53_REENT_SMALL_CHECK_INIT(ptr) __ULFRACT_IBIT__ 0USB_MSC_PROTOCOL_BBB 0x50dCSWTagUINT64_MAX __UINT64_MAX__INT_FAST16_MAXscsi_command__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long intusbd_mass_storage_REENT_INIT(var) { 0, _REENT_STDIO_STREAM(&(var), 0), _REENT_STDIO_STREAM(&(var), 1), _REENT_STDIO_STREAM(&(var), 2), 0, "", 0, _NULL, 0, _NULL, _NULL, 0, _NULL, _NULL, 0, _NULL, { { 0, _NULL, "", {0, 0, 0, 0, 0, 0, 0, 0, 0}, 0, 1, { {_RAND48_SEED_0, _RAND48_SEED_1, _RAND48_SEED_2}, {_RAND48_MULT_0, _RAND48_MULT_1, _RAND48_MULT_2}, _RAND48_ADD }, {0, {0}}, {0, {0}}, {0, {0}}, "", "", 0, {0, {0}}, {0, {0}}, {0, {0}}, {0, {0}}, {0, {0}} } }, _REENT_INIT_ATEXIT _NULL, {_NULL, 0, _NULL} }ctrl_buf__ARM_FEATURE_CDE_COPROCUSB_REQ_TYPE_CLASS 0x20__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xGCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| DA€‚„…ŽœA„…†ŽàAƒ„…†‡Ž|A„…†ŽlA„…†ŽA+aeabi!6S-MM ñÿ !!!"""D"14"4t,Bà&Q|($$`œ$1j$1X$&&1Ð&((1h(**1`*,1,-.01357su1u$v$9;=?ACEGIKMOQSUWY[]_acegikmoqwy Ñ;lŸÑ 2 d•Æ ø0b’Àð Q³äGx§Õvy 8NU\cxŒl*™usb_msc.c$tmsc_control_requestmsc_set_config$d_mass_storagemsc_data_tx_cbmsc_data_rx_cbscsi_command.constprop.0wm4.0.88d8b58fcc7cb03c549c2662f5adb422wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.ieeefp.h.77.f33a4dce62116f6f5175ff8bae57a54cwm4._newlib_version.h.4.1ef4e12f167f8b69d7c30054be56050dwm4.newlib.h.21.1ae2897bc09bbe4bc80ffb801fb02432wm4.features.h.22.0ca0b2e469d5b0fcf64dfa21c188c8f3wm4.config.h.224.c701144a7b0518c6ee9b9b5465b79f81wm4._ansi.h.31.de524f58584151836e90d8620a16f8e8wm4.stdlib.h.13.4ed386f5c1a80d71e72172885d946ef2wm4.stddef.h.185.882514a1a6169ceba9142f401cbe27c6wm4.stddef.h.39.d045698d061bdaf9245f5033b3abee66wm4._types.h.20.dd0d04dca3800a0d2a6129b87f3adbb2wm4.stddef.h.158.5f30652bb2ea05b142c1bbee9108c999wm4._default_types.h.6.959254cf5f09734ea7516c89e8bb21bdwm4._types.h.127.34941de1b2539d59d5cac00e0dd27a45wm4.reent.h.17.e292bf8b0bec6c96e131a54347145a30wm4.lock.h.2.c0958401bd0ce484d507ee19aacab817wm4.reent.h.77.dcd6129ff07fe81bd5636db29abe53b2wm4.cdefs.h.49.3d0fe8ea14e93bda8c589d4f684b21b8wm4.stdlib.h.56.b4ddaf162082f284ba35b4444af99a9awm4.string.h.8.c4b8571ce60dff2817f43fec8b86aecdwm4.stddef.h.158.bfed30416c9480cd13bc4a25427d538fwm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.usbstd.h.44.4afe4d1bc74038b0efb850274c9ca72fwm4.usbd.h.59.36297d267a452a295a2169d9133104f5wm4.msc.h.41.483b412c4db1d0ff8a618ca272a05a7awm4.usb_private.h.39.0319c55b21f25116dad040a5212d0c5dusbd_ep_setupusbd_register_control_callback__gnu_thumb1_case_uqimemsetmemcpystrlenusbd_ep_write_packetusbd_ep_read_packetusb_msc_initusbd_register_set_config_callback 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"'..>/z ! Ó0"5y 4#YK’. ..‘Y@K.-/ <J < < É 0$"< 2 JX=!K! .. x.Ú" " . " 2 fXJ=t /h =<J. t.ì!!"////5N / 3! "L $/ e !t/.// /$// /$ ,///$= 0].ˆ f iProductRCC_APB2ENR_SYSCFGCOMPEN (1 << 0)bAlternateSetting__DECIMAL_DIG__ 17__UHA_FBIT__ 8USB_LPMCSR_LPMACK (1 << 1)RCC_APB1ENR_CECEN (1 << 30)RCC_CIR_LSERDYIE (1 << 9)__INTMAX_C(c) c ## LL__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64RCC_CFGR3 MMIO32(RCC_BASE + 0x30)ep_setupRCC_CIR_LSIRDYF (1 << 0)__CHAR_UNSIGNED__ 1RCC_CSR_LSION (1 << 0)USB_EP_REG(EP) (&MMIO32(USB_DEV_FS_BASE) + (EP))__SFRACT_FBIT__ 7USB_EP_RX_STAT_NAK 0x2000RCC_BDCR_LSEDRV_MEDHI (2 << RCC_BDCR_LSEDRV_SHIFT)RCC_CSR_LPWRRSTF (1 << 31)__FLT64_HAS_INFINITY__ 1RCC_CFGR_PLLMUL_MUL4 (0x02 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB1ENR MMIO32(RCC_BASE + 0x1c)__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LKUSB_SET_EP_TX_ADDR(EP,ADDR) SET_REG(USB_EP_TX_ADDR(EP), ADDR)__PTRDIFF_MAX__ 0x7fffffffUSB_DT_DEVICE 1USB_DADDR_EF (1 << 7)__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)TIM1_BASE (PERIPH_BASE_APB + 0x12C00)__INTMAX_MAX__ 0x7fffffffffffffffLLRCC_APB1ENR_TIM6EN (1 << 4)__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17RCC_CSR_RMVF (1 << 24)WINT_MIN __WINT_MIN__INT_FAST64_MAX__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffUSET_REG(REG,VAL) (*(REG) = (uint16_t)(VAL))__ARM_FEATURE_QBITRCC_CFGR2_PREDIV_DIV14 0xdrx_fifo_sizefifo_mem_topRCC_CR2_HSI48CAL_SHIFT 24rxbcntINT64_MAX __INT64_MAX__INTMAX_MINbDeviceSubClassUSB_EP_RX_STAT 0x3000__DBL_MAX_10_EXP__ 308__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLKst_usbfs_copy_to_pmusbd_set_config_callback__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned intRCC_APB1RSTR_USART2RST (1 << 17)RCC_CIR_PLLRDYIE (1 << 12)__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__ARM_ARCH_PROFILE 77USB_CNTR_RESUME 0x0010USB_SET_EP_STAT_OUT(EP) USB_SET_EP_KIND(EP)__USACCUM_MIN__ 0.0UHKGPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)__FLT32_DECIMAL_DIG__ 9USB_REQ_TYPE_INTERFACE 0x01RCC_APB2RSTR_TIM1RST (1 << 11)__LDBL_MIN_EXP__ (-1021)__LDBL_MANT_DIG__ 53st_usbfs_set_addressINT64_MIN (-INT64_MAX - 1)WWDG_BASE (PERIPH_BASE_APB + 0x2c00)PERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)__UINT8_C(c) c__INT16_TYPE__ short intUSB_BCDR_BCDEN (1 << 0)wLength__FLT64_MAX__ 1.7976931348623157e+308F64RCC_CFGR3_USART2SW_SYSCLK (1 << RCC_CFGR3_USART2SW_SHIFT)user_callback_ctrRCC_CIR_HSI48RDYIE (1 << 14)USB_CLR_EP_TX_DTOG(EP) SET_REG(USB_EP_REG(EP), GET_REG(USB_EP_REG(EP)) & (USB_EP_NTOGGLE_MSK | USB_EP_TX_DTOG))USB_ISTR_L1REQ (1 << 7)base_addressINT_FAST64_MAX __INT_FAST64_MAX__RCC_APB2RSTR_DBGMCURST (1 << 22)RCC_CR2_HSI14TRIM_SHIFT 3USB_DT_INTERFACE_POWER 8bMaxPower__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64ep_nak_setUSB_REQ_TYPE_IN 0x80RCC_CSR_SFTRSTF (1 << 28)configstateUSART5_BASE (PERIPH_BASE_APB + 0x5000)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intGPIO_PORT_C_BASE (PERIPH_BASE_AHB2 + 0x0800)USB_REQ_GET_STATUS 0USB_ISTR_SOF 0x0200toggle_maskINT32_MIN (-INT32_MAX - 1)RCC_AHBENR_SRAMEN (1 << 2)__FLT32_MAX_10_EXP__ 38USB_EP5 5needs_zlpRCC_CIR MMIO32(RCC_BASE + 0x08)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZRCC_APB1RSTR_TIM3RST (1 << 1)__UINTPTR_MAX__ 0xffffffffUaltsetting__FLT32_MIN_EXP__ (-125)RCC_CIR_HSIRDYC (1 << 18)USB_EP_SETUP 0x0800USB_BCDR_SDEN (1 << 3)RCC_CFGR2_PREDIV_DIV7 0x6typeUINT32_MAX __UINT32_MAX__TIM3_BASE (PERIPH_BASE_APB + 0x0400)USB_EP_TX_STAT_STALL 0x0010__WCHAR_WIDTH__ 32__ULFRACT_FBIT__ 32RCC_APB2ENR_USART1EN (1 << 14)__FLT64_MIN_10_EXP__ (-307)RCC_APB1ENR_TIM14EN (1 << 8)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"bcdUSBBIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__RCC_CFGR_HPRE_DIV16 (0xb << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_HPRE_DIV4 (0x9 << RCC_CFGR_HPRE_SHIFT)st_usbfs_ep_stall_getUSB_REQ_CLEAR_FEATURE 1USB_GET_EP_RX_BUFF(ep) (USB_PMA_BASE + (uint8_t *)(USB_GET_EP_RX_ADDR(ep) * 1))__SFRACT_EPSILON__ 0x1P-7HRcur_altsettingusbd_endpoint_callback__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAXst_usbfs_ep_nak_set__SQ_FBIT__ 31RCC_CFGR_PLLMUL_MUL13 (0x0B << RCC_CFGR_PLLMUL_SHIFT)UINT32_Cst_usbfs_force_naknum_altsetting__UHQ_FBIT__ 16doeptsiz__PTRDIFF_WIDTH__ 32RCC_CR2_HSI14DIS (1 << 2)user_callback_sof__UINT_FAST8_MAX__ 0xffffffffUst_usbfs_ep_read_packetusb_endpoint_descriptorUINT16_C(c) __UINT16_C(c)RCC_APB2ENR_ADCEN (1 << 9)__LACCUM_IBIT__ 32USB_ENDPOINT_ATTR_INTERRUPT 0x03USB_ENDPOINT_ATTR_SYNCTYPE 0x0CRCC_BDCR_LSEDRV_SHIFT 3__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1st_usbfs_copy_from_pmINT_FAST8_MAXRCC_CIR_HSERDYC (1 << 19)__UINT_FAST16_MAX__ 0xffffffffUNVIC_BASE (SCS_BASE + 0x0100)__INTPTR_MAX__ 0x7fffffffINT64_C(c) __INT64_C(c)RCC_CFGR2_PREDIV_DIV12 0xbUSB_ISTR_REG (&MMIO32(USB_DEV_FS_BASE + 0x44))RCC_CFGR3_USART2SW_SHIFT 16USB_FNR_RXDP (1 << 15)RCC_CFGR_PLLMUL_MUL7 (0x05 << RCC_CFGR_PLLMUL_SHIFT)RCC_CFGR2_PREDIV_DIV15 0xe__UFRACT_MIN__ 0.0UR__THUMB_INTERWORK__ 1RCC_CFGR_MCO_SHIFT 24WCHAR_MAX __WCHAR_MAX__istr__FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__strings__UINT_LEAST8_TYPE__ unsigned charbDeviceProtocol__ACCUM_FBIT__ 15USBD_REQ_NEXT_CALLBACK__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1ep_stall_get__FLT32X_EPSILON__ 2.2204460492503131e-16F32xUSB_ISTR_ERR 0x2000extra_stringbInterval__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32__LFRACT_MIN__ (-0.5LR-0.5LR)USB_DT_DEVICE_QUALIFIER 6__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 1IDLEUINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON__RCC_CFGR_PPRE_MASK 0x7__FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____UINTMAX_TYPE__ long long unsigned int__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRUSB_GET_EP_TX_COUNT(EP) GET_REG(USB_EP_TX_COUNT(EP))/build/libopencm3/lib/stm32/f0short unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)__GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"UINT_FAST8_MAX __UINT_FAST8_MAX____FLT32X_MIN_10_EXP__ (-307)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__DBL_IS_IEC_60559__ 2__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4RCC_APB2RSTR_TIM15RST (1 << 16)USB_EP_TYPE_ISO 0x0400RCC_APB2RSTR_USART8RST (1 << 7)RCC_CFGR2_PREDIV_DIV13 0xc__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32RCC_APB1RSTR_USART3RST (1 << 18)USB_LPMCSR_LPMEN (1 << 0)INFO_BASE (0x1ffff000U)TIM17_BASE (PERIPH_BASE_APB + 0x14800)USB_EP_TX_STAT_VALID 0x0030BIT27 (1<<27)TIM7_BASE (PERIPH_BASE_APB + 0x1400)RCC_CFGR_MCO_LSE 3bInterfaceProtocol__UTA_FBIT__ 64INTMAX_C(c) __INTMAX_C(c)RCC_CIR_LSERDYC (1 << 17)__FLT_DECIMAL_DIG__ 9__thumb__ 1LIBOPENCM3_MEMORYMAP_COMMON_H signed charfifo_mem_top_ep0uint8_tINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)USB_ISTR_SUSP 0x0800__GNUC_STDC_INLINE__ 1SPI2_BASE (PERIPH_BASE_APB + 0x3800)__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLKRCC_CFGR2_PREDIV_DIV8 0x7__GNUC_PATCHLEVEL__ 1USB_SET_EP_ADDR(EP,ADDR) SET_REG(USB_EP_REG(EP), ((GET_REG(USB_EP_REG(EP)) & (USB_EP_NTOGGLE_MSK & (~USB_EP_ADDR))) | ADDR))PTRDIFF_MIN__UINT_LEAST16_MAX__ 0xffffRCC_AHBENR_DMA1EN (1 << 0)USB_CLR_ISTR_ERR() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_ERR)UINTPTR_MAX __UINTPTR_MAX__RCC_BDCR_RTCEN (1 << 15)RCC_CR2_HSI48ON (1 << 16)RCC_AHBRSTR_IOPBRST (1 << 18)INT32_MAXUSB_BCDR_PS2DET (1 << 7)GPIO_PORT_E_BASE (PERIPH_BASE_AHB2 + 0x1000)USB_CONFIG_ATTR_SELF_POWERED 0x40__FLT64_MAX_10_EXP__ 308GPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINbcdDeviceRCC_APB1RSTR_CECRST (1 << 30)USB_REQ_TYPE_CLASS 0x20__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__SACCUM_IBIT__ 8UINT64_MAX__FLT_MAX_10_EXP__ 38USB_REQ_GET_INTERFACE 10__FRACT_MAX__ 0X7FFFP-15R__GCC_IEC_559 0INT_LEAST32_MAX __INT_LEAST32_MAX__RCC_CFGR_MCO_SYSCLK 4__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5RCC_APB2ENR_USART8EN (1 << 7)__ARM_ARCH_EXT_IDIV__USB_GET_EP_RX_ADDR(EP) GET_REG(USB_EP_RX_ADDR(EP))wValueRCC_CFGR2_PREDIV_DIV3 0x2RCC_AHBENR_GPIODEN (1 << 20)RCC_CIR_PLLRDYF (1 << 4)RCC_CFGR2_PREDIV_DIV6 0x5__UINT16_MAX__ 0xffffusb_config_descriptormax_sizeRCC_CFGR_MCO_HSI 5USB_EP4 4TIM14_BASE (PERIPH_BASE_APB + 0x2000)__USQ_FBIT__ 32INT_FAST16_MINRCC_CSR_IWDGRSTF (1 << 29)__SIZEOF_SHORT__ 2../common/st_usbfs_core.cRCC_APB1ENR_TIM2EN (1 << 0)_BoolRCC_APB1ENR_TIM7EN (1 << 5)USB_CNTR_LP_MODE 0x0004SPI1_BASE (PERIPH_BASE_APB + 0x13000)INT_FAST32_MIN (-INT_FAST32_MAX - 1)RCC_CFGR_MCO_MASK 0xf__STRICT_ANSI__ 1bConfigurationValueRCC_CFGR2_PREDIV_DIV9 0x8USART8_BASE (PERIPH_BASE_APB + 0x11C00)user_callback_set_configUINT_LEAST8_MAXRCC_CFGR_SW_HSI48 (3 << RCC_CFGR_SW_SHIFT)RCC_APB1ENR_PWREN (1 << 28)UINT8_C(c) __UINT8_C(c)RCC_CIR_HSIRDYIE (1 << 10)__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__LAST_DATA_OUTchar__USA_IBIT__ 16RCC_CFGR_MCO_HSI48 8PTRDIFF_MIN (-PTRDIFF_MAX - 1)RCC_CSR_V18PWRRSTF (1 << 23)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__UINT_FAST64_TYPE__ long long unsigned intTIM2_BASE (PERIPH_BASE_APB + 0x0000)RCC_CFGR_PLLMUL_MUL9 (0x07 << RCC_CFGR_PLLMUL_SHIFT)RCC_CIR_HSI48RDYC (1 << 22)__FLT_MIN__ 1.1754943508222875e-38FUSB_GET_EP_TX_BUFF(ep) (USB_PMA_BASE + (uint8_t *)(USB_GET_EP_TX_ADDR(ep) * 1))__HA_FBIT__ 7__FDPIC__LIBOPENCM3_ST_USBFS_COMMON_H RCC_CIR_HSI14RDYIE (1 << 13)USART1_BASE (PERIPH_BASE_APB + 0x13800)__FLT32_IS_IEC_60559__ 2RCC_CFGR_HPRE_DIV64 (0xc << RCC_CFGR_HPRE_SHIFT)INT_FAST64_MIN__USFRACT_IBIT__ 0USB_REQ_SET_DESCRIPTOR 7__USFRACT_MIN__ 0.0UHRTSC_BASE (PERIPH_BASE_AHB1 + 0x4000)RCC_CFGR_PLLMUL_MUL8 (0x06 << RCC_CFGR_PLLMUL_SHIFT)__ARM_NEONRCC_BDCR_RTCSEL_LSI (2 << RCC_BDCR_RTCSEL_SHIFT)RCC_AHBRSTR_IOPERST (1 << 21)__UINT8_MAX__ 0xffRCC_CR2_HSI14ON (1 << 0)RCC_CFGR_HPRE_DIV8 (0xa << RCC_CFGR_HPRE_SHIFT)__LDBL_MAX_EXP__ 1024USB_ENDPOINT_ATTR_ISOCHRONOUS 0x01RCC_CIR_PLLRDYC (1 << 20)LIBOPENCM3_MEMORYMAP_H RCC_CFGR_HPRE_MASK 0xfUSB_DADDR_REG (&MMIO32(USB_DEV_FS_BASE + 0x4C))RCC_APB1ENR_USBEN (1 << 23)BIT7 (1<<7)__DBL_HAS_DENORM__ 1DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)st_usbfs_devextra_string_idxUSB_CLR_ISTR_WKUP() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_WKUP)USB_ENDPOINT_ATTR_USAGETYPE 0x30RCC_APB1RSTR_USBRST (1 << 23)UINT_FAST32_MAXBIT17 (1<<17)USB_ENDPOINT_ATTR_NOSYNC 0x00__GXX_ABI_VERSION 1017RCC_CFGR_PPRE_DIV16 (7 << RCC_CFGR_PPRE_SHIFT)__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LRCC_CFGR3_USART1SW_PCLK (0 << RCC_CFGR3_USART1SW_SHIFT)USB_ISTR_CTR 0x8000USB_BCDR_DCDEN (1 << 1)RCC_BDCR_LSEDRV_HIGH (3 << RCC_BDCR_LSEDRV_SHIFT)INT_LEAST8_MAX __INT_LEAST8_MAX____UINT32_C(c) c ## ULRCC_CFGR_PLLXTPRE_HSE_CLK_DIV2 0x1RCC_CSR_RESET_FLAGS (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF | RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF | RCC_CSR_PINRSTF | RCC_CSR_OBLRSTF)USB_CNTR_FRES 0x0001__UACCUM_MIN__ 0.0UKRCC_CFGR3_USART3SW (3 << RCC_CFGR3_USART2SW_SHIFT)USB_ENDPOINT_ATTR_TYPE 0x03__FLT_EPSILON__ 1.1920928955078125e-7FUSB_CNTR_SOFM 0x0200USB_EP_RX_STAT_STALL 0x1000RCC_CFGR3_USART3SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)__ACCUM_IBIT__ 16USB_ENDPOINT_ATTR_DATA 0x00__PTRDIFF_TYPE__ intUSB_EP_KIND 0x0100__ARM_ARCH_ISA_THUMBRCC_CR_HSEON (1 << 16)RCC_CFGR_MCO_HSE 6USB_CLR_EP_KIND(EP) SET_REG(USB_EP_REG(EP), (GET_REG(USB_EP_REG(EP)) & (USB_EP_NTOGGLE_MSK & (~USB_EP_KIND))))__UACCUM_EPSILON__ 0x1P-16UK__ARM_FEATURE_MATMUL_INT8RCC_CFGR_PLLSRC_HSI_CLK_DIV2 0x0__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0RCC_APB1RSTR_USART5RST (1 << 20)__LLFRACT_EPSILON__ 0x1P-63LLRST_USBFS_CORE DBGMCU_BASE (PERIPH_BASE_APB + 0x15800)__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1USB_ENDPOINT_ATTR_BULK 0x02__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)TIM16_BASE (PERIPH_BASE_APB + 0x14400)RCC_APB2RSTR_USART1RST (1 << 14)__FLT32_MIN__ 1.1754943508222875e-38F32__FLT32_HAS_QUIET_NAN__ 1RCC_CFGR2_PREDIV_DIV11 0xaRCC_CSR_OBLRSTF (1 << 25)RCC_CFGR_MCOPRE_DIV4 (2 << RCC_CFGR_MCOPRE_SHIFT)__LDBL_HAS_INFINITY__ 1RCC_CFGR_MCOPRE_DIV1 (0 << RCC_CFGR_MCOPRE_SHIFT)__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))USB_ISTR_PMAOVR 0x4000GET_REG(REG) ((uint16_t) *(REG))__FLT32X_MAX_10_EXP__ 308USB_TRANSACTION_OUTUSB_DT_DEVICE_SIZE sizeof(struct usb_device_descriptor)__ARM_PCS 1RCC_CFGR_MCOPRE_DIV8 (3 << RCC_CFGR_MCOPRE_SHIFT)bool _BoolUSB_CNTR_SUSPM 0x0800RCC_APB2ENR_TIM15EN (1 << 16)UINTMAX_MAX __UINTMAX_MAX__RCC_CFGR_PLLMUL_MUL12 (0x0A << RCC_CFGR_PLLMUL_SHIFT)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)CLR_REG_BIT_MSK_AND_SET(REG,MSK,BIT,EXTRA_BITS) SET_REG((REG), (GET_REG((REG)) & (MSK) & (~(BIT))) | (EXTRA_BITS))__UINT_LEAST8_MAX__ 0xffRCC_CFGR_PLLMUL_MUL15 (0x0D << RCC_CFGR_PLLMUL_SHIFT)BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)RCC_CR_HSIRDY (1 << 1)INT16_MAX __INT16_MAX__USB_REQ_SET_ADDRESS 5__FLT32X_IS_IEC_60559__ 2endpointUSB_CONFIG_ATTR_REMOTE_WAKEUP 0x20USB_EP_RX_CTR 0x8000SYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXRCC_CFGR_SW_HSE (1 << RCC_CFGR_SW_SHIFT)USB_FNR_REG (&MMIO32(USB_DEV_FS_BASE + 0x48))PERIPH_BASE_AHB1 (PERIPH_BASE + 0x00020000)__INT_LEAST16_WIDTH__ 16RCC_CR_HSITRIM (0x1F << RCC_CR_HSITRIM_SHIFT)RCC_APB1RSTR_TIM14RST (1 << 8)USB_LPMCSR_BESL (15 << USB_LPMCSR_BESL_SHIFT)__ARM_FEATURE_FP16_FML__TQ_FBIT__ 127RCC_BDCR_LSERDY (1 << 1)USB_EP_RX_STAT_VALID 0x3000_REG_BIT__USFRACT_EPSILON__ 0x1P-8UHRUSB_REQ_SET_SYNCH_FRAME 12__OPTIMIZE_SIZE__ 1__USFRACT_FBIT__ 8USB_CLR_EP_TX_CTR(EP) USB_CLR_EP_NTOGGLE_BIT_AND_SET(EP, USB_EP_TX_CTR, USB_EP_RX_CTR)__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKUSB_DT_OTG 9RCC_CR2_HSI48RDY (1 << 17)RCC_AHBRSTR_IOPDRST (1 << 20)interface__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX__USB_REQ_TYPE_STANDARD 0x00USART2_BASE (PERIPH_BASE_APB + 0x4400)__UINT32_MAX__ 0xffffffffULst_usbfs_endpoints_resetset_address_before_statusRCC_CFGR_SW_PLL (2 << RCC_CFGR_SW_SHIFT)__INT_LEAST8_MAX__ 0x7fUSB_EP_RX_STAT_TOG_MSK (USB_EP_RX_STAT | USB_EP_NTOGGLE_MSK)RCC_CFGR3_CECSW (1 << 6)bDescriptorType__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXDAC_BASE (PERIPH_BASE_APB + 0x7400)CEC_BASE (PERIPH_BASE_APB + 0x7800)RCC_CFGR2_PREDIV_DIV5 0x4CLR_REG_BIT(REG,BIT) SET_REG((REG), (~(BIT)))ctrl_buf_len__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024USB_FEAT_ENDPOINT_HALT 0BIT21 (1<<21)__UINT_LEAST32_MAX__ 0xffffffffULUSB_ISTR_WKUP 0x1000__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)usb_setup_dataUSB_DEV_STATUS_REMOTE_WAKEUP 0x02__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1USB_SET_EP_KIND(EP) SET_REG(USB_EP_REG(EP), (GET_REG(USB_EP_REG(EP)) & (USB_EP_NTOGGLE_MSK & (~USB_EP_KIND))) | USB_EP_KIND)__ACCUM_MAX__ 0X7FFFFFFFP-15KRCC_CFGR MMIO32(RCC_BASE + 0x04)__INT8_MAX__ 0x7fBIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__UINT_FAST16_TYPE__ unsigned int__SHRT_WIDTH__ 16__GCC_IEC_559_COMPLEX 0__ARM_FEATURE_MVEbMaxPacketSize0__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intRCC_AHBRSTR_IOPARST (1 << 17)iSerialNumberRCC_CR2_HSI14TRIM (31 << RCC_CR2_HSI14TRIM_SHIFT)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0ST_VREFINT_CAL MMIO16(0x1FFFF7BA)__SCHAR_WIDTH__ 8INT_LEAST16_MAXBIT18 (1<<18)UINT_FAST16_MAX__UINT_FAST8_TYPE__ unsigned intLIBOPENCM3_ST_USBFS_H __LLACCUM_IBIT__ 32RCC_BDCR_RTCSEL_LSE (1 << RCC_BDCR_RTCSEL_SHIFT)bNumEndpointsusbd_deviceBIT24 (1<<24)__UTQ_FBIT__ 128RCC_CFGR_HPRE_NODIV (0x0 << RCC_CFGR_HPRE_SHIFT)__INT32_MAX__ 0x7fffffffLLIBOPENCM3_TOOLS_H ST_TSENSE_CAL2_110C MMIO16(0x1FFFF7C2)__GXX_TYPEINFO_EQUALITY_INLINE 0USB_REQ_TYPE_VENDOR 0x40UINTMAX_MAXEXTI_BASE (PERIPH_BASE_APB + 0x10400)BIT30 (1<<30)ep_resetRCC_CIR_CSSC (1 << 23)__ARM_FEATURE_BF16_VECTOR_ARITHMETIC__ARM_FEATURE_UNALIGNEDUSB_EP2 2LIBOPENCM3_RCC_H PPBI_BASE (0xE0000000U)RCC_APB1ENR_CRSEN (1 << 27)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__usb_interfaceRCC_CFGR_PLLMUL_MUL6 (0x04 << RCC_CFGR_PLLMUL_SHIFT)__LDBL_EPSILON__ 2.2204460492503131e-16LRCC_CSR_LSIRDY (1 << 1)BIT28 (1<<28)USB_EP3 3__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1USB_DT_INTERFACE 4ADC_BASE (PERIPH_BASE_APB + 0x12400)st_usbfs_ep_write_packet__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3callbackUINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0USB_CNTR_PWDN 0x0002USB_ENDPOINT_ATTR_IMPLICIT_FEEDBACK_DATA 0x20RCC_CR_HSERDY (1 << 17)ep_read_packet__OPTIMIZE__ 1USB_GET_EP_RX_COUNT(EP) GET_REG(USB_EP_RX_COUNT(EP))USB_CONFIG_ATTR_DEFAULT 0x80USB_DT_ENDPOINT 5__FLT64_NORM_MAX__ 1.7976931348623157e+308F64RCC_BDCR MMIO32(RCC_BASE + 0x20)USB_ENDPOINT_ATTR_SYNC 0x0CUINTPTR_MAXUSB_CNTR_ESOFM 0x0100USB_ISTR_DIR 0x0010USB_DADDR_ADDR 0x007F__LDBL_DENORM_MIN__ 4.9406564584124654e-324LRCC_APB1RSTR_WWDGRST (1 << 11)__INT64_MAX__ 0x7fffffffffffffffLL__ULLFRACT_IBIT__ 0RCC_CFGR_HPRE (0xf << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_MCOPRE_DIV2 (1 << RCC_CFGR_MCOPRE_SHIFT)CLR_REG_BIT_MSK(REG,MSK,BIT) CLR_REG_BIT_MSK_AND_SET((REG), (MSK), (BIT), 0)MMIO16(addr) (*(volatile uint16_t *)(addr))USB_ENDPOINT_ADDR_OUT(x) (x)RCC_APB2ENR_SPI1EN (1 << 12)STALLEDcurrent_config__GNUC__ 12RCC_CFGR_SW (3 << RCC_CFGR_SW_SHIFT)bmAttributesWCHAR_MAXRCC_CFGR3_USBSW (1 << 7)USB_EP_TYPE_BULK 0x0000__LONG_WIDTH__ 32RCC_CFGR_PLLXTPRE (1<<17)__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16st_usbfs_poll__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0UUSB_LPMCSR_REMWAKE (1 << 3)__UQQ_IBIT__ 0RCC_CFGR_SWS_SHIFT 2CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1MIN(a,b) ((a) < (b) ? (a) : (b))__ULACCUM_MIN__ 0.0ULKctrl_lenRCC_CIR_HSIRDYF (1 << 2)__ARM_ARCH 6st_usbfs_ep_setupUSB_REQ_SET_FEATURE 3__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXRCC_CIR_HSI48RDYF (1 << 6)__LDBL_HAS_QUIET_NAN__ 1GET_REG_BIT(REG,BIT) (GET_REG(REG) & (BIT))USB_CLR_EP_STAT_OUT(EP) USB_CLR_EP_KIND(EP)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)RCC_CFGR_PPRE_DIV4 (5 << RCC_CFGR_PPRE_SHIFT)RCC_CFGR_MCOPRE_SHIFT 28__UINT_FAST64_MAX__ 0xffffffffffffffffULLRCC_APB2RSTR MMIO32(RCC_BASE + 0x0c)__ARM_FPUSB_BTABLE_BTABLE 0xFFF8__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1RCC_CIR_LSIRDYC (1 << 16)RCC_CFGR_MCO_LSI 2BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xUSB_CLR_ISTR_RESET() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_RESET)INTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024RCC_CFGR2_PREDIV_NODIV 0x0UINT16_MAXBIT20 (1<<20)RCC_APB1ENR_USART5EN (1 << 20)__FLT64_MIN__ 2.2250738585072014e-308F64RCC_APB1RSTR_USART4RST (1 << 19)wMaxPacketSizeRCC_CFGR3_USART2SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)st_usbfs_ep_stall_setRCC_APB1ENR_CANEN (1 << 25)__ARM_ARCH_PROFILE__INT64_TYPE__ long long intUSB_REQ_GET_DESCRIPTOR 6__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4RCC_CFGR_SWS_HSE (1 << RCC_CFGR_SWS_SHIFT)set_addressUSB_SET_EP_RX_STAT(EP,STAT) TOG_SET_REG_BIT_MSK_AND_SET(USB_EP_REG(EP), USB_EP_RX_STAT_TOG_MSK, STAT, USB_EP_RX_CTR | USB_EP_TX_CTR)RCC_CFGR_PPRE_SHIFT 8RCC_CSR_PINRSTF (1 << 26)LIBOPENCM3_ST_USBFS_V2_H RCC_CFGR3_USART3SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)MAX_USER_CONTROL_CALLBACK 4RCC_BDCR_RTCSEL_NOCLK (0 << RCC_BDCR_RTCSEL_SHIFT)RCC_CR_HSION (1 << 0)__UFRACT_MAX__ 0XFFFFP-16URUSB_CNTR_RESETM 0x0400RCC_APB1RSTR_TIM7RST (1 << 5)INT64_MAXiManufacturerUSB_CNTR_L1RESUME (1 << 5)PERIPH_BASE_APB (PERIPH_BASE + 0x00000000)user_control_callbackINT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0__ULACCUM_IBIT__ 32complete__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX____USACCUM_MAX__ 0XFFFFP-8UHKRCC_CFGR3_USARTxSW_MASK 3USB_CLR_ISTR_ESOF() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_ESOF)SYS_TICK_BASE (SCS_BASE + 0x0010)USB_REQ_SET_CONFIGURATION 9__USER_LABEL_PREFIX__ __ARM_32BIT_STATE__UFRACT_FBIT__ 16addr__UDQ_FBIT__ 64INT16_MIN (-INT16_MAX - 1)RCC_CFGR_PPRE_DIV2 (4 << RCC_CFGR_PPRE_SHIFT)__LDBL_MAX_10_EXP__ 308USB_EP_NTOGGLE_MSK (USB_EP_RX_CTR | USB_EP_SETUP | USB_EP_TYPE | USB_EP_KIND | USB_EP_TX_CTR | USB_EP_ADDR)USBD_PM_TOP 0x40USB_CNTR_WKUPM 0x1000__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)USB_CLASS_VENDOR 0xFF__INT_FAST32_TYPE__ int__SIZEOF_LONG_LONG__ 8CRS_BASE (PERIPH_BASE_APB + 0x6C00)unsigned intUSB_SET_EP_TYPE(EP,TYPE) SET_REG(USB_EP_REG(EP), (GET_REG(USB_EP_REG(EP)) & (USB_EP_NTOGGLE_MSK & (~USB_EP_TYPE))) | TYPE)__GCC_ASM_FLAG_OUTPUTS__USB_DT_INTERFACE_ASSOCIATION_SIZE sizeof(struct usb_iface_assoc_descriptor)usb_control_state__FLT_MIN_EXP__ (-125)__DEC_EVAL_METHOD__ 2RCC_APB1RSTR_DACRST (1 << 29)RCC_CIR_HSI14RDYF (1 << 5)RCC_CFGR_MCOPRE_DIV64 (6 << RCC_CFGR_MCOPRE_SHIFT)__USACCUM_IBIT__ 8RCC_CFGR3_USART3SW_SHIFT 18USB_EP_RX_ADDR(ep) ((uint16_t *)(USB_PMA_BASE + (USB_GET_BTABLE + (ep) * 8 + 4) * 1))__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6_STDBOOL_H RCC_BDCR_RTCSEL_SHIFT 8bNumInterfacesep_stall_setRCC_CFGR3_USART1SW (3 << RCC_CFGR3_USART1SW_SHIFT)SCB_BASE (SCS_BASE + 0x0D00)__FLT_EVAL_METHOD__ 0bInterfaceClass__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__thumb2__LIBOPENCM3_RCC_COMMON_ALL_H RCC_BASE (PERIPH_BASE_AHB1 + 0x1000)__ARM_FEATURE_LDREXUSB_CNTR_REG (&MMIO32(USB_DEV_FS_BASE + 0x40))__UQQ_FBIT__ 8RCC_CFGR_HPRE_SHIFT 4INT16_C__ARM_FP16_ARGS__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT32X_DIG__ 15INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX__RCC_CFGR_PLLMUL (0x0F << RCC_CFGR_PLLMUL_SHIFT)__LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4USB_FNR_RXDM (1 << 14)__STDC__ 1USB_REQ_TYPE_OUT 0x0RCC_APB2RSTR_SYSCFGRST (1 << 0)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__RTC_BASE (PERIPH_BASE_APB + 0x2800)__UINT8_TYPE__ unsigned charRCC_AHBRSTR_TSCRST (1 << 24)iFunctionRCC_AHBENR_GPIOCEN (1 << 19)__SIG_ATOMIC_TYPE__ intRCC_AHBENR_FLTFEN (1 << 4)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLextralenINT8_MINRCC_CFGR_HPRE_DIV512 (0xf << RCC_CFGR_HPRE_SHIFT)bRequestiface_assocPERIPH_BASE (0x40000000U)true 1poll__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)RCC_APB2ENR MMIO32(RCC_BASE + 0x18)USB_CNTR_L1REQM (1 << 7)__FLT32X_MIN_EXP__ (-1021)RCC_BDCR_LSEON (1 << 0)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1control_stateUSB_DT_DEBUG 10__LFRACT_EPSILON__ 0x1P-31LRUSB_EP_ADDR 0x000FRCC_APB1ENR_I2C1EN (1 << 21)bFunctionSubClass__ARM_SIZEOF_MINIMAL_ENUM 1USB_REQ_TYPE_OTHER 0x03USB_DT_CONFIGURATION 2__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32xUSB_CLR_ISTR_SUSP() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_SUSP)__arm__ 1RCC_CR MMIO32(RCC_BASE + 0x00)RCC_CFGR_PLLMUL_MUL3 (0x01 << RCC_CFGR_PLLMUL_SHIFT)__FRACT_EPSILON__ 0x1P-15R__FLT32_MIN_10_EXP__ (-37)USB_DT_INTERFACE_SIZE 9MMIO64(addr) (*(volatile uint64_t *)(addr))INT8_MAX __INT8_MAX____ARM_FP16_FORMAT_ALTERNATIVE_usbd_deviceRCC_APB1RSTR_CANRST (1 << 25)INTPTR_MIN__DA_FBIT__ 31DESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)__USBD_H RCC_APB1RSTR_TIM2RST (1 << 0)RCC_CFGR_PLLMUL_MUL10 (0x08 << RCC_CFGR_PLLMUL_SHIFT)RCC_CIR_LSERDYF (1 << 1)__TA_IBIT__ 64RCC_CR2_HSI14RDY (1 << 1)RCC_CFGR2_PREDIV_DIV4 0x3USART3_BASE (PERIPH_BASE_APB + 0x4800)USB_BCDR_DCDET (1 << 4)USB_CLR_ISTR_SOF() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_SOF)USB_SET_EP_TX_STAT(EP,STAT) TOG_SET_REG_BIT_MSK_AND_SET(USB_EP_REG(EP), USB_EP_TX_STAT_TOG_MSK, STAT, USB_EP_RX_CTR | USB_EP_TX_CTR)__ARM_FEATURE_QRDMXUSB_EP1 1__ARM_ARCH_ISA_THUMB 1DESIG_FLASH_SIZE_BASE (0x1FFFF7CCU)USB_BCDR_REG (&MMIO32(USB_DEV_FS_BASE + 0x58))__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__RCC_CFGR_MCOPRE_DIV16 (4 << RCC_CFGR_MCOPRE_SHIFT)RCC_CFGR2_PREDIV 0xfBIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0wTotalLength__ARM_FEATURE_FMA_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)bFunctionClassRCC_CIR_LSIRDYIE (1 << 8)INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1__FLT32_DIG__ 6DATA_INUSB_BCDR_PDET (1 << 5)TIM6_BASE (PERIPH_BASE_APB + 0x1000)BIT15 (1<<15)disconnectRCC_CIR_CSSF (1 << 7)__USBSTD_H num_strings__LDBL_HAS_DENORM__ 1__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)USB_BCDR_DPPU (1 << 15)RCC_BDCR_BDRST (1 << 16)__ACCUM_MIN__ (-0X1P15K-0X1P15K)RCC_CFGR3_USART1SW_HSI (3 << RCC_CFGR3_USART1SW_SHIFT)__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intRCC_CFGR_PLLNODIV (1 << 31)USB_EP_TX_ADDR(ep) ((uint16_t *)(USB_PMA_BASE + (USB_GET_BTABLE + (ep) * 8 + 0) * 1))RCC_CFGR_PLLSRC (1<<16)RCC_AHBENR_DMA2EN (1 << 1)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2bLength__ORDER_LITTLE_ENDIAN__ 1234sizeBX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)__FLT_NORM_MAX__ 3.4028234663852886e+38Fuser_callback_set_altsettingRCC_CFGR3_USART1SW_LSE (2 << RCC_CFGR3_USART1SW_SHIFT)long long unsigned intRCC_BDCR_RTCSEL_HSE (3 << RCC_BDCR_RTCSEL_SHIFT)__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)RCC_CFGR_MCOPRE_DIV32 (5 << RCC_CFGR_MCOPRE_SHIFT)wIndexRCC_AHBENR_GPIOEEN (1 << 21)__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__ULLACCUM_EPSILON__ 0x1P-32ULLKRCC_CFGR_PPRE_NODIV (0 << RCC_CFGR_PPRE_SHIFT)__APCS_32__ 1__DQ_FBIT__ 63INT_LEAST64_MAXuint16_tRCC_CR_HSITRIM_SHIFT 3__UHQ_IBIT__ 0INT_LEAST8_MINRCC_CR2_HSI14CAL_SHIFT 8BIT29 (1<<29)RCC_CFGR_SWS (3 << RCC_CFGR_SWS_SHIFT)__INT_FAST16_TYPE__ intextraUSART7_BASE (PERIPH_BASE_APB + 0x11800)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRRCC_AHBRSTR_IOPCRST (1 << 19)__UINT_LEAST16_TYPE__ short unsigned intrealsizeUSBD_REQ_HANDLED__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intSTATUS_INRCC_CIR_HSERDYIE (1 << 11)usbd_control_complete_callbackRCC_CFGR_HPRE_DIV128 (0xd << RCC_CFGR_HPRE_SHIFT)STATUS_OUTRCC_APB1RSTR_CRSRST (1 << 27)bNumConfigurationsRCC_APB2ENR_TIM17EN (1 << 18)RCC_CR2_HSI14CAL (0xFF << RCC_CR2_HSI14CAL_SHIFT)__FINITE_MATH_ONLY__ 0USB_EP_TX_COUNT(ep) ((uint16_t *)(USB_PMA_BASE + (USB_GET_BTABLE + (ep) * 8 + 2) * 1))__INT_FAST16_MAX__ 0x7fffffffUSB_ENDPOINT_ATTR_FEEDBACK 0x10RCC_APB1ENR_TIM3EN (1 << 1)DMA2_BASE (PERIPH_BASE_AHB1 + 0x0400)PTRDIFF_MAX __PTRDIFF_MAX__bFunctionProtocolRCC_CFGR2_PREDIV_DIV16 0xfRCC_CFGR_PLLMUL_MUL14 (0x0C << RCC_CFGR_PLLMUL_SHIFT)RCC_CR_PLLRDY (1 << 25)I2C2_BASE (PERIPH_BASE_APB + 0x5800)USB_CLR_EP_RX_CTR(EP) USB_CLR_EP_NTOGGLE_BIT_AND_SET(EP, USB_EP_RX_CTR, USB_EP_TX_CTR)idProductRCC_CFGR3_USART2SW (3 << RCC_CFGR3_USART2SW_SHIFT)USB_REQ_TYPE_TYPE 0x60UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRUSB_EP_RX_DTOG 0x4000RCC_CFGR_PLLMUL_MUL5 (0x03 << RCC_CFGR_PLLMUL_SHIFT)RCC_AHBRSTR MMIO32(RCC_BASE + 0x28)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intRCC_APB2RSTR_USART7RST (1 << 6)iConfigurationUSBD_REQ_NOTSUPPRCC_CFGR_SW_HSI (0 << RCC_CFGR_SW_SHIFT)idVendorRCC_CFGR3_I2C1SW (1 << 4)WCHAR_MINDMA1_BASE DMA_BASEforce_nakRCC_CFGR3_ADCSW (1 << 8)BEGIN_DECLS descUSB_FNR_FN (0x7FF << 0)_REG_BIT(base,bit) (((base) << 5) + (bit))RCC_APB2RSTR_SPI1RST (1 << 12)USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)USB_ISTR_ESOF 0x0100usb_iface_assoc_descriptorCORESIGHT_LSR_SLK (1<<1)USB_FNR_LSOF_SHIFT 11RCC_CSR MMIO32(RCC_BASE + 0x24)usb_device_descriptor__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15iInterface__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)_usbd_resetRCC_CR2 MMIO32(RCC_BASE + 0x34)USB_EP_TYPE_INTERRUPT 0x0600__ARM_EABI__ 1USB_DT_STRING 3INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1USB_EP_RX_COUNT(ep) ((uint16_t *)(USB_PMA_BASE + (USB_GET_BTABLE + (ep) * 8 + 6) * 1))RCC_CR_HSICAL (0xFF << RCC_CR_HSICAL_SHIFT)RCC_CIR_HSERDYF (1 << 3)RCC_APB1RSTR_TIM6RST (1 << 4)USART6_BASE (PERIPH_BASE_APB + 0x11400)USB_REQ_TYPE_DEVICE 0x00RCC_CFGR_SWS_HSI48 (3 << RCC_CFGR_SWS_SHIFT)__QQ_IBIT__ 0RCC_CR_PLLON (1 << 24)DESIG_UNIQUE_ID_BASE (0x1FFFF7ACU)__LLACCUM_FBIT__ 31RCC_APB2ENR_USART6EN (1 << 5)USB_FEAT_DEVICE_REMOTE_WAKEUP 1bInterfaceSubClass__USQ_IBIT__ 0USB_REQ_TYPE_DIRECTION 0x80__UINT_LEAST32_TYPE__ long unsigned intinitRCC_APB2ENR_USART7EN (1 << 6)__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 1RCC_APB2RSTR_TIM17RST (1 << 18)STM32F0 1USB_EP_TX_STAT_DISABLED 0x0000RCC_CFGR_ADCPRE (1<<14)INTMAX_MAXDEBUG_BASE (SCS_BASE + 0x0DF0)RCC_APB1ENR_SPI2EN (1 << 14)bFirstInterface__ARM_FEATURE_FP16_SCALAR_ARITHMETICUSB_TRANSACTION_SETUP__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1__FLT64_HAS_QUIET_NAN__ 1USB_EP_TX_STAT_TOG_MSK (USB_EP_TX_STAT | USB_EP_NTOGGLE_MSK)__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CUSB_BCDR_SDET (1 << 6)USB_REQ_TYPE_ENDPOINT 0x02RCC_CFGR3_USART2SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)RCC_APB1ENR_WWDGEN (1 << 11)INT64_MINUSB_CNTR_CTRM 0x8000__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intUINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRdriverUSB_FNR_LCK (1 << 13)USB_FEAT_TEST_MODE 2USB_GET_EP_TX_ADDR(EP) GET_REG(USB_EP_TX_ADDR(EP))__SIZEOF_SIZE_T__ 4USB_ENDPOINT_ATTR_ASYNC 0x04USB_ENDPOINT_ATTR_ADAPTIVE 0x08__UINT64_TYPE__ long long unsigned intusbd_set_altsetting_callback__INT64_C(c) c ## LLUSB_LPMCSR_REG (&MMIO32(USB_DEV_FS_BASE + 0x54))GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sections__LDBL_MIN_10_EXP__ (-307)RCC_CFGR3_USART1SW_SHIFT 0usb_interface_descriptorRCC_APB2ENR_TIM16EN (1 << 17)RCC_APB1RSTR_I2C1RST (1 << 21)__LDBL_MIN__ 2.2250738585072014e-308LTIM15_BASE (PERIPH_BASE_APB + 0x14000)__ARM_FEATURE_CDEbInterfaceNumberUSB_BTABLE_REG (&MMIO32(USB_DEV_FS_BASE + 0x50))RCC_CFGR_PLLSRC_HSE_CLK 0x1MAX_USER_SET_CONFIG_CALLBACK 4FLASH_BASE (0x08000000U)CORESIGHT_LAR_OFFSET 0xfb0RCC_APB1ENR_I2C2EN (1 << 22)stallUSB_EP_TX_DTOG 0x0040INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)USB_CLR_ISTR_PMAOVR() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_PMAOVR)FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x2000)short intRCC_AHBENR_GPIOBEN (1 << 18)USB_EP0 0typelookupUSB_FNR_LSOF (3 << USB_FNR_LSOF_SHIFT)__UINT16_C(c) c__FLT64_MIN_EXP__ (-1021)USB_EP_RX_STAT_DISABLED 0x0000__UDA_IBIT__ 32__USB_PRIVATE_H RCC_APB1RSTR_I2C2RST (1 << 22)UINT_LEAST32_MAXcurrent_addressBIT2 (1<<2)RCC_CFGR_MCOPRE_DIV128 (7 << RCC_CFGR_MCOPRE_SHIFT)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCRCC_APB1ENR_DACEN (1 << 29)USB_SET_EP_TX_COUNT(EP,COUNT) SET_REG(USB_EP_TX_COUNT(EP), COUNT)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53RCC_BDCR_LSEBYP (1 << 2)RCC_APB1RSTR_SPI2RST (1 << 14)CORESIGHT_LSR_SLI (1<<0)BIT5 (1<<5)BIT1 (1<<1)USART4_BASE (PERIPH_BASE_APB + 0x4C00)INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1USB_DEV_STATUS_SELF_POWERED 0x01__DBL_DECIMAL_DIG__ 17RCC_BDCR_LSEDRV_LOW (0 << RCC_BDCR_LSEDRV_SHIFT)USB_EP_TX_STAT 0x0030BIT8 (1<<8)RCC_CFGR3_USART3SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)INT16_C(c) __INT16_C(c)usbd_request_return_codesRCC_CFGR2 MMIO32(RCC_BASE + 0x2c)USB_REQ_GET_CONFIGURATION 8__INT16_MAX__ 0x7fffUSB_CNTR_ERRM 0x2000DMA_BASE (PERIPH_BASE_AHB1 + 0x0000)DATA_OUTRCC_APB2ENR_DBGMCUEN (1 << 22)__INT_WIDTH__ 32USB_ENDPOINT_ADDR_IN(x) (0x80 | (x))USB_EP7 7RCC_CR_HSEBYP (1 << 18)__QQ_FBIT__ 7otgfs_usb_driver stm32f107_usb_driverPOWER_CONTROL_BASE (PERIPH_BASE_APB + 0x7000)__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64USB_TRANSACTION_INRCC_CFGR2_PREDIV_DIV2 0x1__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32__LDBL_NORM_MAX__ 1.7976931348623157e+308L__ULLFRACT_EPSILON__ 0x1P-64ULLRpm_topRCC_CR2_HSI48CAL (0xFF << RCC_CR2_HSI48CAL_SHIFT)__SIZEOF_WINT_T__ 4__INT_LEAST32_MAX__ 0x7fffffffL__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__LDBL_DECIMAL_DIG__ 17USB_REQ_TYPE_RECIPIENT 0x1FRCC_AHBENR_CRCEN (1 << 6)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1RCC_BDCR_LSEDRV (3 << RCC_BDCR_LSEDRV_SHIFT)__FLT32X_HAS_DENORM__ 1user_callback_reset__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1TOG_SET_REG_BIT_MSK(REG,MSK,BIT) TOG_SET_REG_BIT_MSK_AND_SET((REG), (MSK), (BIT), 0)RCC_CFGR_PPRE (7 << RCC_CFGR_PPRE_SHIFT)USB_ENDPOINT_ATTR_CONTROL 0x00RCC_CFGR_MCOPRE (7 << RCC_CFGR_MCOPRE_SHIFT)RCC_CFGR_PLLMUL_MUL11 (0x09 << RCC_CFGR_PLLMUL_SHIFT)USB_EP_TX_STAT_NAK 0x0020USB_ISTR_EP_ID 0x000FbDeviceClass__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODRCC_APB2RSTR_ADCRST (1 << 9)USB_SET_EP_RX_ADDR(EP,ADDR) SET_REG(USB_EP_RX_ADDR(EP), ADDR)USB_SET_EP_RX_COUNT(EP,COUNT) SET_REG(USB_EP_RX_COUNT(EP), COUNT)USB_EP6 6__ULLFRACT_MIN__ 0.0ULLRRCC_CFGR_SWS_PLL (2 << RCC_CFGR_SWS_SHIFT)USB_DT_OTHER_SPEED_CONFIGURATION 7RCC_CFGR_PLLMUL_MUL16 (0x0E << RCC_CFGR_PLLMUL_SHIFT)__GCC_CONSTRUCTIVE_SIZE 64RCC_CSR_PORRSTF (1 << 27)__LLFRACT_IBIT__ 0RCC_BDCR_LSEDRV_MEDLO (1 << RCC_BDCR_LSEDRV_SHIFT)uint32_tUSB_CNTR_PMAOVRM 0x4000BIT12 (1<<12)RCC_CFGR_PLLMUL_MUL2 (0x00 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB1ENR_USART4EN (1 << 19)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HKRCC_CIR_HSI14RDYC (1 << 21)RCC_CFGR_SW_SHIFT 0RCC_CFGR2_PREDIV_DIV10 0x9rcc_apb2_frequency rcc_apb1_frequencyuser_callback_resumeusbd_control_callback__UHA_IBIT__ 8RCC_CSR_WWDGRSTF (1 << 30)ep_write_packet__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15bmRequestTypeUINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXLIBOPENCM3_CM3_MEMORYMAP_H BIT16 (1<<16)otghs_usb_driver stm32f207_usb_driver__WINT_MIN__ 0UINT_LEAST16_MINRCC_APB1RSTR_PWRRST (1 << 28)__FLT64_DIG__ 15USB_EP_TYPE_CONTROL 0x0200RCC_APB2ENR_TIM1EN (1 << 11)__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8RCC_CFGR3_USART1SW_SYSCLK (1 << RCC_CFGR3_USART1SW_SHIFT)__INT_LEAST16_TYPE__ short intRCC_AHBENR_TSCEN (1 << 24)LAST_DATA_IN__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_CRCC_CFGR3_USART3SW_SYSCLK (1 << RCC_CFGR3_USART2SW_SHIFT)RCC_CFGR_PLLXTPRE_HSE_CLK 0x0RCC_CFGR_PPRE_DIV8 (6 << RCC_CFGR_PPRE_SHIFT)INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1GPIO_PORT_D_BASE (PERIPH_BASE_AHB2 + 0x0C00)RCC_CFGR_HPRE_DIV2 (0x8 << RCC_CFGR_HPRE_SHIFT)USB_CLR_EP_RX_DTOG(EP) SET_REG(USB_EP_REG(EP), GET_REG(USB_EP_REG(EP)) & (USB_EP_NTOGGLE_MSK | USB_EP_RX_DTOG))__HQ_FBIT__ 15__bool_true_false_are_defined 1RCC_APB1ENR_USART3EN (1 << 18)RCC_APB1RSTR MMIO32(RCC_BASE + 0x10)BIT26 (1<<26)__SIZE_MAX__ 0xffffffffURCC_CFGR_MCO_HSI14 1__ARM_FEATURE_SATRCC_AHBENR_GPIOFEN (1 << 22)RCC_BDCR_RTCSEL (3 << RCC_BDCR_RTCSEL_SHIFT)__ULLACCUM_FBIT__ 32__ARM_ARCH__LONG_MAX__ 0x7fffffffLUSB_LPMCSR_BESL_SHIFT 4TOG_SET_REG_BIT_MSK_AND_SET(REG,MSK,BIT,EXTRA_BITS) do { register uint16_t toggle_mask = GET_REG(REG) & (MSK); toggle_mask ^= BIT; SET_REG((REG), toggle_mask | (EXTRA_BITS)); } while (0)BIT25 (1<<25)type_maskUSB_CNTR_FSUSP 0x0008RCC_CFGR_SWS_HSI (0 << RCC_CFGR_SWS_SHIFT)INT_LEAST64_MINPTRDIFF_MAXUSB_EP_TX_CTR 0x0080RCC_CFGR_PLLMUL_SHIFT 18bInterfaceCountST_TSENSE_CAL1_30C MMIO16(0x1FFFF7B8)__ARM_ARCH_6M__ 1RCC_APB2RSTR_USART6RST (1 << 5)__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53RCC_CFGR_MCO_PLL 7USB_GET_BTABLE GET_REG(USB_BTABLE_REG)__ARM_ASM_SYNTAX_UNIFIED__st_usbfs_set_ep_rx_bufsizeWINT_MAX__INT16_C(c) cRCC_APB1ENR_USART2EN (1 << 17)RCC_AHBENR_DMAEN RCC_AHBENR_DMA1ENINT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32RCC_AHBENR MMIO32(RCC_BASE + 0x14)USB_DT_ENDPOINT_SIZE 7RCC_CR_HSICAL_SHIFT 8__ATOMIC_ACQ_REL 4BIT4 (1<<4)RCC_CFGR_PLLSRC0 (1<<15)__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)_usbd_driverUSB_REQ_SET_INTERFACE 11USB_BCDR_PDEN (1 << 2)bEndpointAddressRCC_CR_CSSON (1 << 19)USB_ISTR_RESET 0x0400RCC_CFGR_MCO_NOCLK 0__FLT32_NORM_MAX__ 3.4028234663852886e+38F32USB_DT_CONFIGURATION_SIZE 9I2C1_BASE (PERIPH_BASE_APB + 0x5400)UINT64_C(c) __UINT64_C(c)RCC_CFGR3_USART2SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)RCC_APB2RSTR_TIM16RST (1 << 17)RCC_CFGR_HPRE_DIV256 (0xe << RCC_CFGR_HPRE_SHIFT)__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0USB_EP_TYPE 0x0600UINT64_MAX __UINT64_MAX__INT_FAST16_MAXRCC_AHBRSTR_IOPFRST (1 << 22)user_callback_suspend__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long int_usbd_transactionIWDG_BASE (PERIPH_BASE_APB + 0x3000)ctrl_buf__ARM_FEATURE_CDE_COPROCUSB_CLR_EP_NTOGGLE_BIT_AND_SET(EP,BIT,EXTRA_BITS) CLR_REG_BIT_MSK_AND_SET(USB_EP_REG(EP), USB_EP_NTOGGLE_MSK, BIT, EXTRA_BITS)USB_DT_INTERFACE_ASSOCIATION 11__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xRCC_AHBENR_GPIOAEN (1 << 17)GCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| 8A„…†‡ŽC(DA„…†Ž¬A„…Ž<TB„ŽtAƒ„…†‡Ž¨Cƒ„…†‡Ž ðA €‚„…†‡ŽA+aeabi!6S-MM ñÿ0ä0”4D\„ Ì ""##$&')+-MO/13579;=?ACEGIKQ>o Ò7k™ É 9j ™ÏPS 87IDb¬x<ŽT¢#µtÎâ¨úð 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" !!! .</ "m "iProductRCC_APB2ENR_SYSCFGCOMPEN (1 << 0)bAlternateSetting__DECIMAL_DIG__ 17__UHA_FBIT__ 8USB_LPMCSR_LPMACK (1 << 1)RCC_APB1ENR_CECEN (1 << 30)RCC_CIR_LSERDYIE (1 << 9)RCC_CFGR2_PREDIV_DIV15 0xe__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64RCC_CFGR3 MMIO32(RCC_BASE + 0x30)ep_setupRCC_CIR_LSIRDYF (1 << 0)__CHAR_UNSIGNED__ 1RCC_CSR_LSION (1 << 0)USB_EP_REG(EP) (&MMIO32(USB_DEV_FS_BASE) + (EP))USB_EP_ADDR 0x000FbEndpointAddressUSB_EP_RX_STAT_NAK 0x2000RCC_BDCR_LSEDRV_MEDHI (2 << RCC_BDCR_LSEDRV_SHIFT)RCC_USB__FLT64_HAS_INFINITY__ 1RCC_CFGR_PLLMUL_MUL4 (0x02 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB1ENR MMIO32(RCC_BASE + 0x1c)__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LKUSB_SET_EP_TX_ADDR(EP,ADDR) SET_REG(USB_EP_TX_ADDR(EP), ADDR)__PTRDIFF_MAX__ 0x7fffffffUSB_DT_DEVICE 1USB_DADDR_EF (1 << 7)__INTMAX_C(c) c ## LLTIM1_BASE (PERIPH_BASE_APB + 0x12C00)__INTMAX_MAX__ 0x7fffffffffffffffLLRCC_APB1ENR_TIM6EN (1 << 4)__TQ_IBIT__ 0rcc_periph_clken__FLT64_DECIMAL_DIG__ 17RCC_CSR_RMVF (1 << 24)WINT_MIN __WINT_MIN__INT_FAST64_MAX__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffUSET_REG(REG,VAL) (*(REG) = (uint16_t)(VAL))__ARM_FEATURE_QBITRCC_CFGR2_PREDIV_DIV14 0xdrx_fifo_sizefifo_mem_topRCC_CR2_HSI48CAL_SHIFT 24rxbcntINT64_MAX __INT64_MAX__INTMAX_MINbDeviceSubClassUSB_EP_RX_STAT 0x3000__DBL_MAX_10_EXP__ 308__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLKst_usbfs_copy_to_pmusbd_set_config_callback__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned intRCC_APB1RSTR_USART2RST (1 << 17)RCC_CIR_PLLRDYIE (1 << 12)__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__FLT32_MIN__ 1.1754943508222875e-38F32USB_SET_EP_STAT_OUT(EP) USB_SET_EP_KIND(EP)__USACCUM_MIN__ 0.0UHKGPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)__FLT32_DECIMAL_DIG__ 9USB_REQ_TYPE_INTERFACE 0x01RCC_APB2RSTR_TIM1RST (1 << 11)__LDBL_MIN_EXP__ (-1021)UINTPTR_MAX __UINTPTR_MAX____LDBL_MANT_DIG__ 53st_usbfs_set_addressINT64_MIN (-INT64_MAX - 1)WWDG_BASE (PERIPH_BASE_APB + 0x2c00)PERIPH_BASE_AHB2 (PERIPH_BASE + 0x08000000)__UINT8_C(c) c__INT16_TYPE__ short intUSB_BCDR_BCDEN (1 << 0)wLength__FLT64_MAX__ 1.7976931348623157e+308F64RCC_CFGR3_USART2SW_SYSCLK (1 << RCC_CFGR3_USART2SW_SHIFT)UINT_FAST32_MAXuser_callback_ctrRCC_CIR_HSI48RDYIE (1 << 14)USB_CLR_EP_TX_DTOG(EP) SET_REG(USB_EP_REG(EP), GET_REG(USB_EP_REG(EP)) & (USB_EP_NTOGGLE_MSK | USB_EP_TX_DTOG))USB_ISTR_L1REQ (1 << 7)base_addressINT_FAST64_MAX __INT_FAST64_MAX__RCC_APB2RSTR_DBGMCURST (1 << 22)RCC_CR2_HSI14TRIM_SHIFT 3USB_DT_INTERFACE_POWER 8st_usbfs_ep_write_packet__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64ep_nak_setUSB_REQ_TYPE_IN 0x80RCC_CSR_SFTRSTF (1 << 28)configstateUSART5_BASE (PERIPH_BASE_APB + 0x5000)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intGPIO_PORT_C_BASE (PERIPH_BASE_AHB2 + 0x0800)USART1_BASE (PERIPH_BASE_APB + 0x13800)USB_REQ_GET_STATUS 0USB_ISTR_SOF 0x0200INT32_MIN (-INT32_MAX - 1)RCC_AHBENR_SRAMEN (1 << 2)__FLT32_MAX_10_EXP__ 38USB_EP5 5needs_zlpRCC_CIR MMIO32(RCC_BASE + 0x08)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZRCC_APB1RSTR_TIM3RST (1 << 1)__UINTPTR_MAX__ 0xffffffffUST_USBFS_CORE altsetting__FLT32_MIN_EXP__ (-125)RCC_CSR_LPWRRSTF (1 << 31)RCC_CIR_HSIRDYC (1 << 18)USB_EP_SETUP 0x0800USB_BCDR_SDEN (1 << 3)RCC_CFGR2_PREDIV_DIV7 0x6typeUINT32_MAX __UINT32_MAX__TIM3_BASE (PERIPH_BASE_APB + 0x0400)USB_EP_TX_STAT_STALL 0x0010__WCHAR_WIDTH__ 32__ULFRACT_FBIT__ 32RCC_APB2ENR_USART1EN (1 << 14)__FLT64_MIN_10_EXP__ (-307)RCC_APB1ENR_TIM14EN (1 << 8)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"bcdUSBBIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__RCC_CFGR_HPRE_SHIFT 4RCC_CFGR_HPRE_DIV16 (0xb << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_HPRE_DIV4 (0x9 << RCC_CFGR_HPRE_SHIFT)st_usbfs_ep_stall_getMPU_BASE (SCS_BASE + 0x0D90)USB_GET_EP_RX_BUFF(ep) (USB_PMA_BASE + (uint8_t *)(USB_GET_EP_RX_ADDR(ep) * 1))__SFRACT_EPSILON__ 0x1P-7HRcur_altsettingusbd_endpoint_callback__INT32_C(c) c ## L__USQ_FBIT__ 32__ORDER_BIG_ENDIAN__ 4321SIZE_MAXst_usbfs_ep_nak_set__SQ_FBIT__ 31RCC_CFGR_PLLMUL_MUL13 (0x0B << RCC_CFGR_PLLMUL_SHIFT)UINT32_CINT_LEAST32_MIN (-INT_LEAST32_MAX - 1)num_altsetting__UHQ_FBIT__ 16doeptsiz__PTRDIFF_WIDTH__ 32RCC_BDCR_RTCSEL_HSE (3 << RCC_BDCR_RTCSEL_SHIFT)user_callback_sof__UINT_FAST8_MAX__ 0xffffffffUst_usbfs_ep_read_packetusb_endpoint_descriptorUINT16_C(c) __UINT16_C(c)RCC_APB2ENR_ADCEN (1 << 9)__LACCUM_IBIT__ 32USB_ENDPOINT_ATTR_INTERRUPT 0x03USB_ENDPOINT_ATTR_SYNCTYPE 0x0CRCC_BDCR_LSEDRV_SHIFT 3__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1st_usbfs_copy_from_pmINT_FAST8_MAXRCC_CIR_HSERDYC (1 << 19)__UINT_FAST16_MAX__ 0xffffffffU__INTPTR_MAX__ 0x7fffffffINT64_C(c) __INT64_C(c)RCC_CFGR2_PREDIV_DIV12 0xbUSB_ISTR_REG (&MMIO32(USB_DEV_FS_BASE + 0x44))RCC_CFGR3_USART2SW_SHIFT 16USB_FNR_RXDP (1 << 15)RCC_CFGR_PLLMUL_MUL7 (0x05 << RCC_CFGR_PLLMUL_SHIFT)__UFRACT_MIN__ 0.0URRCC_CFGR_MCO_SHIFT 24WCHAR_MAX __WCHAR_MAX__NVIC_BASE (SCS_BASE + 0x0100)__FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__strings__UINT_LEAST8_TYPE__ unsigned charbDeviceProtocolRCC_PWR__ACCUM_FBIT__ 15USBD_REQ_NEXT_CALLBACK__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX__USB_REQ_SET_ADDRESS 5__INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1ep_stall_get__FLT32X_EPSILON__ 2.2204460492503131e-16F32xst_usbfs_v2_usbd_initextra_stringbInterval__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32CLR_REG_BIT_MSK_AND_SET(REG,MSK,BIT,EXTRA_BITS) SET_REG((REG), (GET_REG((REG)) & (MSK) & (~(BIT))) | (EXTRA_BITS))__FLT64_MAX_10_EXP__ 308USB_DT_DEVICE_QUALIFIER 6__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 1IDLEUINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON__RCC_CFGR_PPRE_MASK 0x7__FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRUSB_GET_EP_TX_COUNT(EP) GET_REG(USB_EP_TX_COUNT(EP))/build/libopencm3/lib/stm32/f0short unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)__GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"UINT_FAST8_MAX __UINT_FAST8_MAX____FLT32X_MIN_10_EXP__ (-307)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MINRCC_SPI1RCC_SPI2LIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__DBL_IS_IEC_60559__ 2__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4RCC_APB2RSTR_TIM15RST (1 << 16)USB_EP_TYPE_ISO 0x0400RCC_APB2RSTR_USART8RST (1 << 7)RCC_CFGR2_PREDIV_DIV13 0xc__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32RCC_APB1RSTR_USART3RST (1 << 18)__FLT32X_MIN_EXP__ (-1021)USB_LPMCSR_LPMEN (1 << 0)INFO_BASE (0x1ffff000U)TIM17_BASE (PERIPH_BASE_APB + 0x14800)USB_EP_TX_STAT_VALID 0x0030BIT27 (1<<27)TIM7_BASE (PERIPH_BASE_APB + 0x1400)RCC_CFGR_MCO_LSE 3MAX_USER_SET_CONFIG_CALLBACK 4bInterfaceProtocolRCC_CFGR3_USARTxSW_MASK 3__UTA_FBIT__ 64INTMAX_C(c) __INTMAX_C(c)RCC_CIR_LSERDYC (1 << 17)__FLT_DECIMAL_DIG__ 9LIBOPENCM3_MEMORYMAP_COMMON_H signed charfifo_mem_top_ep0uint8_tINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)USB_ISTR_SUSP 0x0800__GNUC_STDC_INLINE__ 1SPI2_BASE (PERIPH_BASE_APB + 0x3800)__INT64_C(c) c ## LL__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLKRCC_CFGR2_PREDIV_DIV8 0x7__GNUC_PATCHLEVEL__ 1USB_SET_EP_ADDR(EP,ADDR) SET_REG(USB_EP_REG(EP), ((GET_REG(USB_EP_REG(EP)) & (USB_EP_NTOGGLE_MSK & (~USB_EP_ADDR))) | ADDR))PTRDIFF_MIN__UINT_LEAST16_MAX__ 0xffffRCC_TIM6RCC_AHBENR_DMA1EN (1 << 0)__FLT32_HAS_QUIET_NAN__ 1__DA_IBIT__ 32RCC_BDCR_RTCEN (1 << 15)RCC_CR2_HSI48ON (1 << 16)RCC_AHBRSTR_IOPBRST (1 << 18)INT32_MAXUSB_BCDR_PS2DET (1 << 7)GPIO_PORT_E_BASE (PERIPH_BASE_AHB2 + 0x1000)USB_ISTR_WKUP 0x1000__FLT_DIG__ 6GPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINbcdDeviceusb_interface_descriptorUSB_REQ_TYPE_CLASS 0x20__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__SACCUM_IBIT__ 8UINT64_MAX__FLT_MAX_10_EXP__ 38USB_REQ_GET_INTERFACE 10__FRACT_MAX__ 0X7FFFP-15R__GCC_IEC_559 0__ACCUM_EPSILON__ 0x1P-15KINT_LEAST32_MAX __INT_LEAST32_MAX__UINTMAX_CRCC_CFGR_MCO_SYSCLK 4__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5RCC_APB2ENR_USART8EN (1 << 7)__ARM_ARCH_EXT_IDIV__USB_DT_INTERFACE 4USB_GET_EP_RX_ADDR(EP) GET_REG(USB_EP_RX_ADDR(EP))wValueRCC_CFGR2_PREDIV_DIV3 0x2RCC_AHBENR_GPIODEN (1 << 20)RCC_CIR_PLLRDYF (1 << 4)RCC_CFGR2_PREDIV_DIV6 0x5__UINT16_MAX__ 0xffff__TQ_FBIT__ 127RCC_CFGR_MCO_HSI 5USB_EP4 4TIM14_BASE (PERIPH_BASE_APB + 0x2000)INT_FAST16_MINRCC_CSR_IWDGRSTF (1 << 29)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32RCC_APB1ENR_TIM2EN (1 << 0)_BoollbufUSB_CNTR_LP_MODE 0x0004__TA_IBIT__ 64INT_FAST32_MIN (-INT_FAST32_MAX - 1)RCC_CFGR_MCO_MASK 0xf__STRICT_ANSI__ 1bConfigurationValueRCC_CFGR2_PREDIV_DIV9 0x8USART8_BASE (PERIPH_BASE_APB + 0x11C00)user_callback_set_configvalueRCC_CFGR_SW_HSI48 (3 << RCC_CFGR_SW_SHIFT)RCC_APB1ENR_PWREN (1 << 28)UINT8_C(c) __UINT8_C(c)RCC_CIR_HSIRDYIE (1 << 10)__SIZEOF_LONG_DOUBLE__ 8CRC_BASE (PERIPH_BASE_AHB1 + 0x3000)USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)USB_DT_ENDPOINT_SIZE 7__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__LAST_DATA_OUTchar__USA_IBIT__ 16RCC_CFGR_MCO_HSI48 8PTRDIFF_MIN (-PTRDIFF_MAX - 1)RCC_CSR_V18PWRRSTF (1 << 23)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__UINT_FAST64_TYPE__ long long unsigned intTIM2_BASE (PERIPH_BASE_APB + 0x0000)RCC_CFGR_PLLMUL_MUL9 (0x07 << RCC_CFGR_PLLMUL_SHIFT)RCC_CIR_HSI48RDYC (1 << 22)__FLT_MIN__ 1.1754943508222875e-38FUSB_GET_EP_TX_BUFF(ep) (USB_PMA_BASE + (uint8_t *)(USB_GET_EP_TX_ADDR(ep) * 1))__HA_FBIT__ 7__FDPIC__LIBOPENCM3_ST_USBFS_COMMON_H RCC_GPIOARCC_GPIOBRCC_GPIOCRCC_GPIODRCC_GPIOERCC_GPIOFRCC_CFGR_HPRE_DIV64 (0xc << RCC_CFGR_HPRE_SHIFT)RCC_CSR_PINRSTF (1 << 26)INT_FAST64_MIN__USFRACT_IBIT__ 0SPI1_BASE (PERIPH_BASE_APB + 0x13000)RCC_TIM14__USFRACT_MIN__ 0.0UHRTSC_BASE (PERIPH_BASE_AHB1 + 0x4000)RCC_CFGR_PLLMUL_MUL8 (0x06 << RCC_CFGR_PLLMUL_SHIFT)__ARM_NEONRCC_BDCR_RTCSEL_LSI (2 << RCC_BDCR_RTCSEL_SHIFT)RCC_AHBRSTR_IOPERST (1 << 21)__UINT8_MAX__ 0xffRCC_CR2_HSI14ON (1 << 0)RCC_CFGR_HPRE_DIV8 (0xa << RCC_CFGR_HPRE_SHIFT)__LDBL_MAX_EXP__ 1024USB_ENDPOINT_ATTR_ISOCHRONOUS 0x01RCC_CIR_PLLRDYC (1 << 20)LIBOPENCM3_MEMORYMAP_H RCC_CFGR_HPRE_MASK 0xfUSB_DADDR_REG (&MMIO32(USB_DEV_FS_BASE + 0x4C))USB_REQ_SET_DESCRIPTOR 7RCC_APB1ENR_USBEN (1 << 23)BIT7 (1<<7)__DBL_HAS_DENORM__ 1DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)st_usbfs_devextra_string_idxUSB_CLR_ISTR_WKUP() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_WKUP)USB_ENDPOINT_ATTR_USAGETYPE 0x30RCC_APB1RSTR_USBRST (1 << 23)__DA_FBIT__ 31BIT17 (1<<17)USB_ENDPOINT_ATTR_NOSYNC 0x00__GXX_ABI_VERSION 1017RCC_CFGR_PPRE_DIV16 (7 << RCC_CFGR_PPRE_SHIFT)__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LRCC_CFGR3_USART1SW_PCLK (0 << RCC_CFGR3_USART1SW_SHIFT)USB_ISTR_CTR 0x8000USB_BCDR_DCDEN (1 << 1)RCC_BDCR_LSEDRV_HIGH (3 << RCC_BDCR_LSEDRV_SHIFT)INT_LEAST8_MAX __INT_LEAST8_MAX__RCC_CFGR_SWS_PLL (2 << RCC_CFGR_SWS_SHIFT)__UINT32_C(c) c ## ULRCC_CFGR_PLLXTPRE_HSE_CLK_DIV2 0x1RCC_CSR_RESET_FLAGS (RCC_CSR_LPWRRSTF | RCC_CSR_WWDGRSTF | RCC_CSR_IWDGRSTF | RCC_CSR_SFTRSTF | RCC_CSR_PORRSTF | RCC_CSR_PINRSTF | RCC_CSR_OBLRSTF)UINTMAX_MAX__UACCUM_MIN__ 0.0UKUINT32_C(c) __UINT32_C(c)USB_ENDPOINT_ATTR_TYPE 0x03__FLT_EPSILON__ 1.1920928955078125e-7FUSB_CNTR_SUSPM 0x0800USB_EP_RX_STAT_STALL 0x1000USB_REQ_TYPE_DIRECTION 0x80__ACCUM_IBIT__ 16USB_ENDPOINT_ATTR_DATA 0x00__PTRDIFF_TYPE__ intUSB_EP_KIND 0x0100__ARM_ARCH_ISA_THUMBRCC_CR_HSEON (1 << 16)RCC_CFGR_MCO_HSE 6USB_FEAT_TEST_MODE 2USB_CLR_EP_KIND(EP) SET_REG(USB_EP_REG(EP), (GET_REG(USB_EP_REG(EP)) & (USB_EP_NTOGGLE_MSK & (~USB_EP_KIND))))__ARM_FEATURE_MATMUL_INT8RCC_CFGR_PLLSRC_HSI_CLK_DIV2 0x0__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0RCC_APB1RSTR_USART5RST (1 << 20)__HQ_IBIT__ 0DBGMCU_BASE (PERIPH_BASE_APB + 0x15800)__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)TIM16_BASE (PERIPH_BASE_APB + 0x14400)RCC_APB2RSTR_USART1RST (1 << 14)USB_REQ_GET_CONFIGURATION 8INT8_MAXRCC_CFGR2_PREDIV_DIV11 0xaRCC_CSR_OBLRSTF (1 << 25)RCC_CFGR_MCOPRE_DIV4 (2 << RCC_CFGR_MCOPRE_SHIFT)__LDBL_HAS_INFINITY__ 1RCC_CFGR_MCOPRE_DIV1 (0 << RCC_CFGR_MCOPRE_SHIFT)__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))USB_ISTR_PMAOVR 0x4000GET_REG(REG) ((uint16_t) *(REG))__FLT32X_MAX_10_EXP__ 308USB_DT_DEVICE_SIZE sizeof(struct usb_device_descriptor)__ARM_PCS 1RCC_CFGR_MCOPRE_DIV8 (3 << RCC_CFGR_MCOPRE_SHIFT)bool _BoolRCC_CRCRCC_APB2ENR_TIM15EN (1 << 16)UINTMAX_MAX __UINTMAX_MAX__RCC_CFGR_PLLMUL_MUL12 (0x0A << RCC_CFGR_PLLMUL_SHIFT)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffRCC_CFGR_PLLMUL_MUL15 (0x0D << RCC_CFGR_PLLMUL_SHIFT)BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)RCC_CR_HSIRDY (1 << 1)RCC_CRSUSB_DADDR_ADDR 0x007F__FLT32X_IS_IEC_60559__ 2endpointUSB_CONFIG_ATTR_REMOTE_WAKEUP 0x20USB_EP_RX_CTR 0x8000SYSCFG_COMP_BASE (PERIPH_BASE_APB + 0x10000)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXRCC_CFGR_SW_HSE (1 << RCC_CFGR_SW_SHIFT)USB_FNR_REG (&MMIO32(USB_DEV_FS_BASE + 0x48))PERIPH_BASE_AHB1 (PERIPH_BASE + 0x00020000)__INT_LEAST16_WIDTH__ 16RCC_CR_HSITRIM (0x1F << RCC_CR_HSITRIM_SHIFT)RCC_APB1RSTR_TIM14RST (1 << 8)USB_LPMCSR_BESL (15 << USB_LPMCSR_BESL_SHIFT)__ARM_FEATURE_FP16_FMLRCC_BDCR_LSERDY (1 << 1)USB_EP_RX_STAT_VALID 0x3000_REG_BIT__USFRACT_EPSILON__ 0x1P-8UHRUSB_REQ_SET_SYNCH_FRAME 12RCC_DAC1__OPTIMIZE_SIZE__ 1__USFRACT_FBIT__ 8USB_CLR_EP_TX_CTR(EP) USB_CLR_EP_NTOGGLE_BIT_AND_SET(EP, USB_EP_TX_CTR, USB_EP_RX_CTR)__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKUSB_ISTR_ERR 0x2000USB_DT_OTG 9RCC_CR2_HSI48RDY (1 << 17)RCC_AHBRSTR_IOPDRST (1 << 20)interface__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX__USB_REQ_TYPE_STANDARD 0x00USART2_BASE (PERIPH_BASE_APB + 0x4400)__UINT32_MAX__ 0xffffffffULst_usbfs_endpoints_resetRCC_DMARCC_CFGR_SW_PLL (2 << RCC_CFGR_SW_SHIFT)USB_REQ_CLEAR_FEATURE 1__INT_LEAST8_MAX__ 0x7fUSB_EP_RX_STAT_TOG_MSK (USB_EP_RX_STAT | USB_EP_NTOGGLE_MSK)RCC_CFGR3_CECSW (1 << 6)bDescriptorType__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXDAC_BASE (PERIPH_BASE_APB + 0x7400)CEC_BASE (PERIPH_BASE_APB + 0x7800)RCC_CFGR2_PREDIV_DIV5 0x4RCC_CAN1ctrl_buf_len__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024USB_FEAT_ENDPOINT_HALT 0BIT21 (1<<21)RCC_TIM1RCC_TIM2RCC_TIM3__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)usb_setup_dataUSB_DEV_STATUS_REMOTE_WAKEUP 0x02__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1USB_SET_EP_KIND(EP) SET_REG(USB_EP_REG(EP), (GET_REG(USB_EP_REG(EP)) & (USB_EP_NTOGGLE_MSK & (~USB_EP_KIND))) | USB_EP_KIND)__ACCUM_MAX__ 0X7FFFFFFFP-15KRCC_CFGR MMIO32(RCC_BASE + 0x04)__INT8_MAX__ 0x7fBIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)st_usbfs_v2_usb_driver__SA_IBIT__ 16__UINT_FAST16_TYPE__ unsigned int__SHRT_WIDTH__ 16__GCC_IEC_559_COMPLEX 0__ARM_FEATURE_MVEbMaxPacketSize0__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intRCC_AHBRSTR_IOPARST (1 << 17)iSerialNumberRCC_CR2_HSI14TRIM (31 << RCC_CR2_HSI14TRIM_SHIFT)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MINRCC_APB1RSTR_WWDGRST (1 << 11)__FLT_EVAL_METHOD_TS_18661_3__ 0ST_VREFINT_CAL MMIO16(0x1FFFF7BA)__SCHAR_WIDTH__ 8INT_LEAST16_MAXBIT18 (1<<18)UINT_FAST16_MAX__UINT_FAST8_TYPE__ unsigned intLIBOPENCM3_ST_USBFS_H __LLACCUM_IBIT__ 32RCC_BDCR_RTCSEL_LSE (1 << RCC_BDCR_RTCSEL_SHIFT)bNumEndpointsusbd_deviceBIT24 (1<<24)RCC_CFGR_HPRE_NODIV (0x0 << RCC_CFGR_HPRE_SHIFT)__INT32_MAX__ 0x7fffffffLLIBOPENCM3_TOOLS_H ST_TSENSE_CAL2_110C MMIO16(0x1FFFF7C2)__GXX_TYPEINFO_EQUALITY_INLINE 0USB_REQ_TYPE_VENDOR 0x40RCC_FLTIFEXTI_BASE (PERIPH_BASE_APB + 0x10400)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLRCC_CIR_CSSC (1 << 23)__ARM_FEATURE_BF16_VECTOR_ARITHMETIC__ARM_FEATURE_UNALIGNEDRCC_CIR_HSI14RDYIE (1 << 13)USB_EP2 2LIBOPENCM3_RCC_H PPBI_BASE (0xE0000000U)RCC_APB1ENR_CRSEN (1 << 27)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__usb_interfaceRCC_CFGR_PLLMUL_MUL6 (0x04 << RCC_CFGR_PLLMUL_SHIFT)__LDBL_EPSILON__ 2.2204460492503131e-16LRCC_CSR_LSIRDY (1 << 1)BIT28 (1<<28)USB_EP3 3__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1USB_CNTR_FRES 0x0001ADC_BASE (PERIPH_BASE_APB + 0x12400)uintptr_t__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0USB_CNTR_PWDN 0x0002USB_ENDPOINT_ATTR_IMPLICIT_FEEDBACK_DATA 0x20RCC_CR_HSERDY (1 << 17)ep_read_packet__OPTIMIZE__ 1USB_GET_EP_RX_COUNT(EP) GET_REG(USB_EP_RX_COUNT(EP))USB_CONFIG_ATTR_DEFAULT 0x80USB_DT_ENDPOINT 5__FLT64_NORM_MAX__ 1.7976931348623157e+308F64RCC_BDCR MMIO32(RCC_BASE + 0x20)USB_ENDPOINT_ATTR_SYNC 0x0CUINTPTR_MAXUSB_CNTR_ESOFM 0x0100USB_ISTR_DIR 0x0010RCC_CR2_HSI14DIS (1 << 2)__LDBL_DENORM_MIN__ 4.9406564584124654e-324LRCC_ADC1__INT64_MAX__ 0x7fffffffffffffffLLCLR_REG_BIT(REG,BIT) SET_REG((REG), (~(BIT)))__ULLFRACT_IBIT__ 0RCC_CFGR_HPRE (0xf << RCC_CFGR_HPRE_SHIFT)RCC_CFGR_MCOPRE_DIV2 (1 << RCC_CFGR_MCOPRE_SHIFT)CLR_REG_BIT_MSK(REG,MSK,BIT) CLR_REG_BIT_MSK_AND_SET((REG), (MSK), (BIT), 0)MMIO16(addr) (*(volatile uint16_t *)(addr))USB_ENDPOINT_ADDR_OUT(x) (x)RCC_APB2ENR_SPI1EN (1 << 12)STALLEDcurrent_config__GNUC__ 12RCC_CFGR_SW (3 << RCC_CFGR_SW_SHIFT)bmAttributesWCHAR_MAXRCC_CFGR3_USBSW (1 << 7)USB_EP_TYPE_BULK 0x0000__LONG_WIDTH__ 32RCC_CFGR_PLLXTPRE (1<<17)__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16st_usbfs_poll__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0UUSB_LPMCSR_REMWAKE (1 << 3)__UQQ_IBIT__ 0RCC_CFGR_SWS_SHIFT 2CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1MIN(a,b) ((a) < (b) ? (a) : (b))__ULACCUM_MIN__ 0.0ULKctrl_lenRCC_CIR_HSIRDYF (1 << 2)__ARM_ARCH 6st_usbfs_ep_setupRCC_APB1RSTR_CECRST (1 << 30)USB_REQ_SET_FEATURE 3__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55BIT29 (1<<29)__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXRCC_CIR_HSI48RDYF (1 << 6)__LDBL_HAS_QUIET_NAN__ 1GET_REG_BIT(REG,BIT) (GET_REG(REG) & (BIT))RCC_CFGR_SWS (3 << RCC_CFGR_SWS_SHIFT)USB_CLR_EP_STAT_OUT(EP) USB_CLR_EP_KIND(EP)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)RCC_CFGR_PPRE_DIV4 (5 << RCC_CFGR_PPRE_SHIFT)RCC_CFGR_MCOPRE_SHIFT 28__UINT_FAST64_MAX__ 0xffffffffffffffffULLRCC_APB2RSTR MMIO32(RCC_BASE + 0x0c)__ARM_FPUSB_BTABLE_BTABLE 0xFFF8__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1RCC_CIR_LSIRDYC (1 << 16)RCC_CFGR_MCO_LSI 2BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xUSB_CLR_ISTR_RESET() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_RESET)INTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024RCC_CFGR2_PREDIV_NODIV 0x0UINT16_MAXBIT20 (1<<20)RCC_APB1ENR_USART5EN (1 << 20)__FLT64_MIN__ 2.2250738585072014e-308F64RCC_APB1RSTR_USART4RST (1 << 19)usb_config_descriptorRCC_CFGR3_USART2SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)st_usbfs_ep_stall_setRCC_APB1ENR_CANEN (1 << 25)__ARM_ARCH_PROFILE__INT64_TYPE__ long long intUSB_REQ_GET_DESCRIPTOR 6__LFRACT_FBIT__ 31__CHAR_BIT__ 8RCC_CANRCC_CFGR_SWS_HSE (1 << RCC_CFGR_SWS_SHIFT)set_addressUSB_SET_EP_RX_STAT(EP,STAT) TOG_SET_REG_BIT_MSK_AND_SET(USB_EP_REG(EP), USB_EP_RX_STAT_TOG_MSK, STAT, USB_EP_RX_CTR | USB_EP_TX_CTR)RCC_CFGR_PPRE_SHIFT 8USB_EP_RX_ADDR(ep) ((uint16_t *)(USB_PMA_BASE + (USB_GET_BTABLE + (ep) * 8 + 4) * 1))RCC_CFGR3_USART2SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)LIBOPENCM3_ST_USBFS_V2_H RCC_CFGR3_USART3SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)MAX_USER_CONTROL_CALLBACK 4RCC_BDCR_RTCSEL_NOCLK (0 << RCC_BDCR_RTCSEL_SHIFT)RCC_CR_HSION (1 << 0)__UFRACT_MAX__ 0XFFFFP-16URUSB_CNTR_RESETM 0x0400RCC_APB1RSTR_TIM7RST (1 << 5)INT64_MAXiManufacturerUSB_CNTR_L1RESUME (1 << 5)PERIPH_BASE_APB (PERIPH_BASE + 0x00000000)user_control_callbackINT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0__ULACCUM_IBIT__ 32complete__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__usbd_driverRCC_TIM15RCC_TIM16RCC_TIM17SYS_TICK_BASE (SCS_BASE + 0x0010)__USACCUM_MAX__ 0XFFFFP-8UHKUSB_REQ_SET_CONFIGURATION 9__USER_LABEL_PREFIX__ __ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64INT16_MIN (-INT16_MAX - 1)RCC_CFGR_PPRE_DIV2 (4 << RCC_CFGR_PPRE_SHIFT)__LDBL_MAX_10_EXP__ 308USB_EP_NTOGGLE_MSK (USB_EP_RX_CTR | USB_EP_SETUP | USB_EP_TYPE | USB_EP_KIND | USB_EP_TX_CTR | USB_EP_ADDR)RCC_SRAMUSB_CNTR_WKUPM 0x1000__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)USB_CLASS_VENDOR 0xFF__INT_FAST32_TYPE__ int__SIZEOF_LONG_LONG__ 8CRS_BASE (PERIPH_BASE_APB + 0x6C00)wMaxPacketSizeunsigned intUSB_SET_EP_TYPE(EP,TYPE) SET_REG(USB_EP_REG(EP), (GET_REG(USB_EP_REG(EP)) & (USB_EP_NTOGGLE_MSK & (~USB_EP_TYPE))) | TYPE)__GCC_ASM_FLAG_OUTPUTS__USB_DT_INTERFACE_ASSOCIATION_SIZE sizeof(struct usb_iface_assoc_descriptor)RCC_DMA1usb_control_state__FLT_MIN_EXP__ (-125)__DEC_EVAL_METHOD__ 2RCC_APB1RSTR_DACRST (1 << 29)RCC_CIR_HSI14RDYF (1 << 5)RCC_CFGR_MCOPRE_DIV64 (6 << RCC_CFGR_MCOPRE_SHIFT)__USACCUM_IBIT__ 8RCC_CFGR3_USART3SW_SHIFT 18__FLT64_HAS_DENORM__ 1__ULLACCUM_IBIT__ 32__UACCUM_EPSILON__ 0x1P-16UKRCC_BDCR_RTCSEL_SHIFT 8bNumInterfacesep_stall_setSCB_BASE (SCS_BASE + 0x0D00)__FLT_EVAL_METHOD__ 0bInterfaceClass__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__thumb2__LIBOPENCM3_RCC_COMMON_ALL_H RCC_BASE (PERIPH_BASE_AHB1 + 0x1000)__ARM_FEATURE_LDREXUSB_CNTR_REG (&MMIO32(USB_DEV_FS_BASE + 0x40))__UQQ_FBIT__ 8RCC_SYSCFG_COMPINT16_C__ARM_FP16_ARGS__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT32X_DIG__ 15INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX__RCC_CFGR_PLLMUL (0x0F << RCC_CFGR_PLLMUL_SHIFT)__LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4USB_FNR_RXDM (1 << 14)__STDC__ 1USB_REQ_TYPE_OUT 0x0RCC_APB2RSTR_SYSCFGRST (1 << 0)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__CORESIGHT_LAR_OFFSET 0xfb0RTC_BASE (PERIPH_BASE_APB + 0x2800)__UINT8_TYPE__ unsigned charRCC_AHBRSTR_TSCRST (1 << 24)iFunctionPOWER_CONTROL_BASE (PERIPH_BASE_APB + 0x7000)__SIG_ATOMIC_TYPE__ intRCC_AHBENR_FLTFEN (1 << 4)USB_ENDPOINT_ATTR_CONTROL 0x00extralenINT8_MINRCC_CFGR_HPRE_DIV512 (0xf << RCC_CFGR_HPRE_SHIFT)bRequestiface_assocPERIPH_BASE (0x40000000U)true 1poll__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)RCC_APB2ENR MMIO32(RCC_BASE + 0x18)USB_CNTR_L1REQM (1 << 7)__LDBL_MIN_10_EXP__ (-307)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1control_stateUSB_DT_DEBUG 10__LFRACT_EPSILON__ 0x1P-31LRRCC_CFGR_MCOPRE_DIV128 (7 << RCC_CFGR_MCOPRE_SHIFT)RCC_APB1ENR_I2C1EN (1 << 21)bFunctionSubClass__ARM_SIZEOF_MINIMAL_ENUM 1USB_REQ_TYPE_OTHER 0x03USB_DT_CONFIGURATION 2__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32xUSB_CLR_ISTR_SUSP() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_SUSP)__arm__ 1RCC_CR MMIO32(RCC_BASE + 0x00)RCC_CFGR_PLLMUL_MUL3 (0x01 << RCC_CFGR_PLLMUL_SHIFT)__FRACT_EPSILON__ 0x1P-15R__FLT32_MIN_10_EXP__ (-37)USB_DT_INTERFACE_SIZE 9MMIO64(addr) (*(volatile uint64_t *)(addr))INT8_MAX __INT8_MAX____ARM_FP16_FORMAT_ALTERNATIVEUSBD_PM_TOP 0x40_usbd_deviceRCC_APB1RSTR_CANRST (1 << 25)INTPTR_MINRCC_AHBENR_DMAEN RCC_AHBENR_DMA1ENDESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)INT16_MAX __INT16_MAX____BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)__USBD_H RCC_APB1RSTR_TIM2RST (1 << 0)RCC_CFGR_PLLMUL_MUL10 (0x08 << RCC_CFGR_PLLMUL_SHIFT)RCC_CIR_LSERDYF (1 << 1)__ARM_ARCH_PROFILE 77RCC_CR2_HSI14RDY (1 << 1)RCC_CFGR2_PREDIV_DIV4 0x3USART3_BASE (PERIPH_BASE_APB + 0x4800)USB_BCDR_DCDET (1 << 4)USB_CLR_ISTR_SOF() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_SOF)USB_SET_EP_TX_STAT(EP,STAT) TOG_SET_REG_BIT_MSK_AND_SET(USB_EP_REG(EP), USB_EP_TX_STAT_TOG_MSK, STAT, USB_EP_RX_CTR | USB_EP_TX_CTR)__ARM_FEATURE_QRDMXUSB_EP1 1__ARM_ARCH_ISA_THUMB 1DESIG_FLASH_SIZE_BASE (0x1FFFF7CCU)USB_BCDR_REG (&MMIO32(USB_DEV_FS_BASE + 0x58))__LONG_LONG_MAX__ 0x7fffffffffffffffLLUSB_EP_TX_STAT 0x0030__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__RCC_CFGR_MCOPRE_DIV16 (4 << RCC_CFGR_MCOPRE_SHIFT)RCC_CFGR2_PREDIV 0xfBIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0wTotalLength__ARM_FEATURE_FMA_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)bFunctionClassRCC_CIR_LSIRDYIE (1 << 8)INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1__FLT32_DIG__ 6DATA_INUSB_BCDR_PDET (1 << 5)bNumConfigurationsBIT15 (1<<15)UINT16_CdisconnectRCC_CIR_CSSF (1 << 7)__USBSTD_H num_strings__LDBL_HAS_DENORM__ 1__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)USB_BCDR_DPPU (1 << 15)RCC_BDCR_BDRST (1 << 16)__ACCUM_MIN__ (-0X1P15K-0X1P15K)RCC_CFGR3_USART1SW_HSI (3 << RCC_CFGR3_USART1SW_SHIFT)__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intRCC_CFGR_PLLNODIV (1 << 31)USB_EP_TX_ADDR(ep) ((uint16_t *)(USB_PMA_BASE + (USB_GET_BTABLE + (ep) * 8 + 0) * 1))RCC_CFGR_PLLSRC (1<<16)RCC_AHBENR_DMA2EN (1 << 1)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2bLength__ORDER_LITTLE_ENDIAN__ 1234BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)__FLT_NORM_MAX__ 3.4028234663852886e+38Fuser_callback_set_altsettingRCC_CFGR3_USART1SW_LSE (2 << RCC_CFGR3_USART1SW_SHIFT)long long unsigned intset_address_before_status__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)RCC_CFGR_MCOPRE_DIV32 (5 << RCC_CFGR_MCOPRE_SHIFT)wIndexRCC_AHBENR_GPIOEEN (1 << 21)__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__ULLACCUM_EPSILON__ 0x1P-32ULLKRCC_CFGR_PPRE_NODIV (0 << RCC_CFGR_PPRE_SHIFT)__APCS_32__ 1__DQ_FBIT__ 63INT_LEAST64_MAXuint16_tRCC_CR_HSITRIM_SHIFT 3__UHQ_IBIT__ 0INT_LEAST8_MINRCC_CR2_HSI14CAL_SHIFT 8usbd_devlong unsigned int__INT_FAST16_TYPE__ intextraUSART7_BASE (PERIPH_BASE_APB + 0x11800)RCC_AHBENR MMIO32(RCC_BASE + 0x14)__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRRCC_AHBRSTR_IOPCRST (1 << 19)__UINT_LEAST16_TYPE__ short unsigned intUSBD_REQ_HANDLED__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intSTATUS_INRCC_CIR_HSERDYIE (1 << 11)usbd_control_complete_callbackRCC_CFGR_HPRE_DIV128 (0xd << RCC_CFGR_HPRE_SHIFT)STATUS_OUTRCC_APB1RSTR_CRSRST (1 << 27)__UTQ_FBIT__ 128RCC_APB2ENR_TIM17EN (1 << 18)RCC_CR2_HSI14CAL (0xFF << RCC_CR2_HSI14CAL_SHIFT)__FINITE_MATH_ONLY__ 0USB_EP_TX_COUNT(ep) ((uint16_t *)(USB_PMA_BASE + (USB_GET_BTABLE + (ep) * 8 + 2) * 1))__INT_FAST16_MAX__ 0x7fffffffUSB_ENDPOINT_ATTR_FEEDBACK 0x10RCC_APB1ENR_TIM3EN (1 << 1)DMA2_BASE (PERIPH_BASE_AHB1 + 0x0400)PTRDIFF_MAX __PTRDIFF_MAX__bFunctionProtocolRCC_CFGR2_PREDIV_DIV16 0xfRCC_CFGR_PLLMUL_MUL14 (0x0C << RCC_CFGR_PLLMUL_SHIFT)RCC_CR_PLLRDY (1 << 25)I2C2_BASE (PERIPH_BASE_APB + 0x5800)USB_CLR_EP_RX_CTR(EP) USB_CLR_EP_NTOGGLE_BIT_AND_SET(EP, USB_EP_RX_CTR, USB_EP_TX_CTR)idProductRCC_CFGR3_USART2SW (3 << RCC_CFGR3_USART2SW_SHIFT)USB_REQ_TYPE_TYPE 0x60UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRUSB_EP_RX_DTOG 0x4000RCC_CFGR_PLLMUL_MUL5 (0x03 << RCC_CFGR_PLLMUL_SHIFT)RCC_AHBRSTR MMIO32(RCC_BASE + 0x28)__DQ_IBIT__ 0RCC_DMA2__ARM_BF16_FORMAT_ALTERNATIVERCC_APB2RSTR_USART7RST (1 << 6)iConfigurationUSBD_REQ_NOTSUPPRCC_CFGR_SW_HSI (0 << RCC_CFGR_SW_SHIFT)idVendorRCC_CFGR3_I2C1SW (1 << 4)WCHAR_MINDMA1_BASE DMA_BASEforce_nakRCC_CFGR3_ADCSW (1 << 8)BEGIN_DECLS descUSB_FNR_FN (0x7FF << 0)_REG_BIT(base,bit) (((base) << 5) + (bit))RCC_APB2RSTR_SPI1RST (1 << 12)USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)USB_ISTR_ESOF 0x0100usb_iface_assoc_descriptorCORESIGHT_LSR_SLK (1<<1)USB_FNR_LSOF_SHIFT 11RCC_CSR MMIO32(RCC_BASE + 0x24)usb_device_descriptor__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15iInterface__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)RCC_CFGR3_USART1SW (3 << RCC_CFGR3_USART1SW_SHIFT)RCC_CR2 MMIO32(RCC_BASE + 0x34)USB_EP_TYPE_INTERRUPT 0x0600__ARM_EABI__ 1USB_DT_STRING 3INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1USB_EP_RX_COUNT(ep) ((uint16_t *)(USB_PMA_BASE + (USB_GET_BTABLE + (ep) * 8 + 6) * 1))RCC_CR_HSICAL (0xFF << RCC_CR_HSICAL_SHIFT)RCC_CIR_HSERDYF (1 << 3)RCC_APB1RSTR_TIM6RST (1 << 4)USART6_BASE (PERIPH_BASE_APB + 0x11400)USB_REQ_TYPE_DEVICE 0x00RCC_CFGR_SWS_HSI48 (3 << RCC_CFGR_SWS_SHIFT)TIM6_BASE (PERIPH_BASE_APB + 0x1000)__QQ_IBIT__ 0RCC_CR_PLLON (1 << 24)RCC_APB1ENR_TIM7EN (1 << 5)DESIG_UNIQUE_ID_BASE (0x1FFFF7ACU)__LLACCUM_FBIT__ 31RCC_APB2ENR_USART6EN (1 << 5)__UINTMAX_TYPE__ long long unsigned intUSB_FEAT_DEVICE_REMOTE_WAKEUP 1bInterfaceSubClass__USQ_IBIT__ 0__UINT_LEAST32_TYPE__ long unsigned intinitRCC_APB2ENR_USART7EN (1 << 6)__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 1RCC_APB2RSTR_TIM17RST (1 << 18)STM32F0 1USB_EP_TX_STAT_DISABLED 0x0000RCC_CFGR_ADCPRE (1<<14)INTMAX_MAXDEBUG_BASE (SCS_BASE + 0x0DF0)RCC_APB1ENR_SPI2EN (1 << 14)bFirstInterfaceRCC_WWDG__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__LFRACT_MIN__ (-0.5LR-0.5LR)__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1RCC_CR2_HSI48CAL (0xFF << RCC_CR2_HSI48CAL_SHIFT)__FLT64_HAS_QUIET_NAN__ 1__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CUSB_BCDR_SDET (1 << 6)USB_REQ_TYPE_ENDPOINT 0x02RCC_CFGR3_USART2SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)RCC_APB1ENR_WWDGEN (1 << 11)INT64_MINUSB_CNTR_CTRM 0x8000__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intbDeviceClass__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRdriverUSB_FNR_LCK (1 << 13)__ARM_ARCH_6M__ 1USB_GET_EP_TX_ADDR(EP) GET_REG(USB_EP_TX_ADDR(EP))__SIZEOF_SIZE_T__ 4USB_ENDPOINT_ATTR_ASYNC 0x04USB_ENDPOINT_ATTR_ADAPTIVE 0x08__UINT64_TYPE__ long long unsigned intusbd_set_altsetting_callbackUSB_LPMCSR_REG (&MMIO32(USB_DEV_FS_BASE + 0x54))GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsRCC_CFGR3_USART1SW_SHIFT 0ep_resetRCC_APB2ENR_TIM16EN (1 << 17)RCC_APB1RSTR_I2C1RST (1 << 21)__LDBL_MIN__ 2.2250738585072014e-308LTIM15_BASE (PERIPH_BASE_APB + 0x14000)__ARM_FEATURE_CDEbInterfaceNumberUSB_BTABLE_REG (&MMIO32(USB_DEV_FS_BASE + 0x50))RCC_CFGR_PLLSRC_HSE_CLK 0x1FLASH_BASE (0x08000000U)RCC_TSCRCC_APB1ENR_I2C2EN (1 << 22)USB_CLR_ISTR_ERR() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_ERR)USB_EP_TX_DTOG 0x0040RCC_BDCR_LSEON (1 << 0)USB_CLR_ISTR_PMAOVR() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_PMAOVR)FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x2000)short intRCC_AHBENR_GPIOBEN (1 << 18)USB_EP0 0USB_CNTR_RESUME 0x0010__FLT32_IS_IEC_60559__ 2USB_FNR_LSOF (3 << USB_FNR_LSOF_SHIFT)__UINT16_C(c) c__FLT64_MIN_EXP__ (-1021)USB_EP_RX_STAT_DISABLED 0x0000__UDA_IBIT__ 32__USB_PRIVATE_H RCC_APB1RSTR_I2C2RST (1 << 22)UINT_LEAST32_MAXcurrent_addressBIT2 (1<<2)INT64_C__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCRCC_APB1ENR_DACEN (1 << 29)USB_SET_EP_TX_COUNT(EP,COUNT) SET_REG(USB_EP_TX_COUNT(EP), COUNT)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53RCC_BDCR_LSEBYP (1 << 2)RCC_APB1RSTR_SPI2RST (1 << 14)CORESIGHT_LSR_SLI (1<<0)BIT5 (1<<5)BIT1 (1<<1)USART4_BASE (PERIPH_BASE_APB + 0x4C00)INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1USB_DEV_STATUS_SELF_POWERED 0x01USB_CLR_ISTR_ESOF() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_ESOF)RCC_TIM7__DBL_DECIMAL_DIG__ 17RCC_BDCR_LSEDRV_LOW (0 << RCC_BDCR_LSEDRV_SHIFT)RCC_RTCBIT8 (1<<8)RCC_CFGR3_USART3SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)INT16_C(c) __INT16_C(c)TOG_SET_REG_BIT_MSK(REG,MSK,BIT) TOG_SET_REG_BIT_MSK_AND_SET((REG), (MSK), (BIT), 0)usbd_request_return_codesRCC_CFGR2 MMIO32(RCC_BASE + 0x2c)__INT16_MAX__ 0x7fffrcc_periph_clock_enableUSB_CNTR_ERRM 0x2000DMA_BASE (PERIPH_BASE_AHB1 + 0x0000)DATA_OUTRCC_APB2ENR_DBGMCUEN (1 << 22)__INT_WIDTH__ 32USB_EP7 7RCC_CR_HSEBYP (1 << 18)__QQ_FBIT__ 7RCC_CFGR3_USART3SW (3 << RCC_CFGR3_USART2SW_SHIFT)otgfs_usb_driver stm32f107_usb_driverUINT_LEAST8_MAX__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64RCC_CFGR3_USART3SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)RCC_CFGR2_PREDIV_DIV2 0x1__UTA_IBIT__ 64__LDBL_NORM_MAX__ 1.7976931348623157e+308L__ULLFRACT_EPSILON__ 0x1P-64ULLRpm_top__UINT_LEAST32_MAX__ 0xffffffffUL__SIZEOF_WINT_T__ 4__INT_LEAST32_MAX__ 0x7fffffffL__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__LDBL_DECIMAL_DIG__ 17USB_REQ_TYPE_RECIPIENT 0x1FRCC_AHBENR_CRCEN (1 << 6)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1RCC_BDCR_LSEDRV (3 << RCC_BDCR_LSEDRV_SHIFT)disconnected__FLT32X_HAS_DENORM__ 1user_callback_reset__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1../st_usbfs_v2.cRCC_I2C1RCC_I2C2RCC_CFGR_PPRE (7 << RCC_CFGR_PPRE_SHIFT)RCC_CFGR_MCOPRE (7 << RCC_CFGR_MCOPRE_SHIFT)RCC_CFGR_PLLMUL_MUL11 (0x09 << RCC_CFGR_PLLMUL_SHIFT)USB_EP_TX_STAT_NAK 0x0020USB_ISTR_EP_ID 0x000FUSB_ENDPOINT_ATTR_BULK 0x02__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODRCC_APB2RSTR_ADCRST (1 << 9)USB_SET_EP_RX_ADDR(EP,ADDR) SET_REG(USB_EP_RX_ADDR(EP), ADDR)USB_SET_EP_RX_COUNT(EP,COUNT) SET_REG(USB_EP_RX_COUNT(EP), COUNT)USB_EP6 6__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H USB_DT_OTHER_SPEED_CONFIGURATION 7RCC_CFGR_PLLMUL_MUL16 (0x0E << RCC_CFGR_PLLMUL_SHIFT)__GCC_CONSTRUCTIVE_SIZE 64RCC_CSR_PORRSTF (1 << 27)RCC_ADC__LLFRACT_IBIT__ 0RCC_BDCR_LSEDRV_MEDLO (1 << RCC_BDCR_LSEDRV_SHIFT)uint32_tUSB_CNTR_PMAOVRM 0x4000BIT12 (1<<12)RCC_CFGR_PLLMUL_MUL2 (0x00 << RCC_CFGR_PLLMUL_SHIFT)RCC_APB1ENR_USART4EN (1 << 19)__SACCUM_EPSILON__ 0x1P-7HKRCC_CIR_HSI14RDYC (1 << 21)__SIZEOF_WCHAR_T__ 4RCC_CFGR_SW_SHIFT 0RCC_CFGR2_PREDIV_DIV10 0x9rcc_apb2_frequency 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0XFFP-8UHR__ARM_FEATURE_CLZSCB_ICSR_PENDSTSET (1 << 26)SCB_AIRCR_VECTKEYSTAT (0xFFFF << SCB_AIRCR_VECTKEYSTAT_LSB)__FLT32_MIN_EXP__ (-125)UINT32_MAX __UINT32_MAX____WCHAR_WIDTH__ 32__ULFRACT_FBIT__ 32INT8_MIN (-INT8_MAX - 1)__FLT64_MIN_10_EXP__ (-307)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__openblt_signature__SFRACT_EPSILON__ 0x1P-7HR__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAX__SQ_FBIT__ 31INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)__UHQ_FBIT__ 16__FLT64_MIN_EXP__ (-1021)__PTRDIFF_WIDTH__ 32INT_FAST8_MAX__UINT_FAST8_MAX__ 0xffffffffUUINT16_C(c) __UINT16_C(c)__LACCUM_IBIT__ 32__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__INTPTR_MAX__ 0x7fffffffSCB_SHPR_PRI_9_RESERVED 5__UINT_FAST16_MAX__ 0xffffffffU__INTPTR_TYPE__ intINT64_C(c) __INT64_C(c)_edata__GCC_IEC_559_COMPLEX 0__UFRACT_MIN__ 0.0URWCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX____UINT_LEAST8_TYPE__ unsigned charNVIC_SPI2_IRQ 26NVIC_TIM17_IRQ 22__ACCUM_FBIT__ 15SCB_SCR_SLEEPONEXIT (1 << 1)__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1__FLT32X_EPSILON__ 2.2204460492503131e-16F32xNVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 1BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX__main__THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__DBL_IS_IEC_60559__ 2__UINT_FAST32_MAX__ 0xffffffffU__UINT_LEAST64_TYPE__ long long unsigned int__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4LIBOPENCM3_VECTOR_H __SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32BIT27 (1<<27)SCB_CPUID_CONSTANT_LSB 16SCB_SHPR_PRI_13_RESERVED 9__UTA_FBIT__ 64INTMAX_C(c) __INTMAX_C(c)__FLT_DECIMAL_DIG__ 9__thumb__ 1signed charINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLK__GNUC_PATCHLEVEL__ 1__preinit_array_startPTRDIFF_MINSCB_CPUID_VARIANT_LSB 20GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sections__UINT64_C(c) c ## ULLPPBI_BASE (0xE0000000U)__ARM_ARCH_PROFILE 77null_handler__FLT64_MAX_10_EXP__ 308MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINNVIC_ADC_COMP_IRQ 12__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38SCB_SCR MMIO32(SCB_BASE + 0x10)__FRACT_MAX__ 0X7FFFP-15RSCB_ICSR_PENDSVSET (1 << 28)__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5__ARM_ARCH_EXT_IDIV____UINT16_MAX__ 0xffff__TQ_FBIT__ 127usage_fault__USQ_FBIT__ 32INT_FAST16_MIN__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32NVIC_EXTI4_15_IRQ 7SCB_SHCSR MMIO32(SCB_BASE + 0x24)__TA_IBIT__ 64__STRICT_ANSI__ 1NVIC_SYSTICK_IRQ -1UINT_LEAST8_MAXINT_LEAST8_MAXUINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8SCB_SHPR_PRI_7_RESERVED 3__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX____USA_IBIT__ 16PTRDIFF_MIN (-PTRDIFF_MAX - 1)NVIC_SPI1_IRQ 25__SFRACT_MAX__ 0X7FP-7HR__UINT_FAST64_TYPE__ long long unsigned int__preinit_array_enddebug_monitor__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC____FLT32_IS_IEC_60559__ 2INT_FAST64_MIN__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16L__USFRACT_MIN__ 0.0UHR__ARM_NEON__UINT8_MAX__ 0xff__LDBL_MAX_EXP__ 1024SCB_ICSR_RETOBASE (1 << 11)__DBL_HAS_DENORM__ 1__DA_FBIT__ 31__GXX_ABI_VERSION 1017__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308Lvector_tableINT_LEAST32_MAX __INT_LEAST32_MAX____ULLACCUM_EPSILON__ 0x1P-32ULLKhard_faultINT_LEAST8_MAX __INT_LEAST8_MAX____FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__UINT32_C(c) c ## UL__UACCUM_MIN__ 0.0UKSCS_BASE (PPBI_BASE + 0xE000)__init_array_start__DBL_MAX_10_EXP__ 308NVIC_IRQ_COUNT 32__ARM_ARCH_ISA_THUMB__ARM_FEATURE_MATMUL_INT8__GCC_ATOMIC_SHORT_LOCK_FREE 1SCB_ICSR_VECTACTIVE (0x1FF << SCB_ICSR_VECTACTIVE_LSB)NVIC_TIM1_BRK_UP_TRG_COM_IRQ 13__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1LIBOPENCM3_STM32_F0_NVIC_H __LACCUM_FBIT__ 31SCB_CPUID_CONSTANT (0xF << SCB_CPUID_CONSTANT_LSB)__FLT32_HAS_QUIET_NAN__ 1SCB_SCR_SLEEPDEEP (1 << 2)__LDBL_HAS_INFINITY__ 1__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308SCB_SHPR_PRI_5_BUSFAULT 1../../cm3/vector.cbool _BoolUINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffBBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)INT16_MAX __INT16_MAX____PRAGMA_REDEFINE_EXTNAME 1__FLT32X_IS_IEC_60559__ 2LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAX__INT_LEAST16_WIDTH__ 16NVIC_RCC_IRQ 4__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLNVIC_TIM6_DAC_IRQ 17INT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHRSCB_SCR_SEVONPEND (1 << 4)SCB_ICSR_PENDSTCLR (1 << 25)CORESIGHT_LSR_SLI (1<<0)INT64_MIN/build/libopencm3/lib/stm32/f0__UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffULSCB_CCR_UNALIGN_TRP (1 << 3)__INT_LEAST8_MAX__ 0x7f__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXSCB_ICSR_VECTPENDING_LSB 12NVIC_HARD_FAULT_IRQ -13__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__UINT_LEAST32_MAX__ 0xffffffffULNVIC_TIM1_CC_IRQ 14__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fSCB_AIRCR MMIO32(SCB_BASE + 0x0C)BIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned int__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAXSCB_DFSR MMIO32(SCB_BASE + 0x30)__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RNVIC_EXTI2_3_IRQ 6__UINT_LEAST16_TYPE__ short unsigned int__INT32_MAX__ 0x7fffffffLSCB_ICSR_NMIPENDSET (1 << 31)__ARM_PCS 1UINTMAX_MAXBIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_BF16_VECTOR_ARITHMETIC__FLT32_MANT_DIG__ 24LIBOPENCM3_NVIC_H __FLT32_DENORM_MIN__ 1.4012984643248171e-45F32SCB_SHPR32(ipr_id) MMIO32(SCS_BASE + 0xD18 + ((ipr_id) * 4))SCB_CPUID_VARIANT (0xF << SCB_CPUID_VARIANT_LSB)WCHAR_MIN __WCHAR_MIN____USFRACT_FBIT__ 8INT8_MAX __INT8_MAX__BIT28 (1<<28)__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1SCB_VTOR_TBLOFF_LSB 7__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UKSCB_CPUID MMIO32(SCB_BASE + 0x00)__FLT64_NORM_MAX__ 1.7976931348623157e+308F64UINTPTR_MAX__LDBL_DENORM_MIN__ 4.9406564584124654e-324LNVIC_I2C1_IRQ 23__INT64_MAX__ 0x7fffffffffffffffLL__ULLFRACT_IBIT__ 0MMIO16(addr) (*(volatile uint16_t *)(addr))NVIC_ICPR(icpr_id) MMIO32(NVIC_BASE + 0x180 + ((icpr_id) * 4))__GNUC__ 12WCHAR_MAX__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULK__ARM_ARCH 6memory_manage_fault_stack__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__FLT_EPSILON__ 1.1920928955078125e-7F__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAX__LDBL_HAS_QUIET_NAN__ 1__LONG_LONG_WIDTH__ 64BIT6 (1<<6)SCB_CPUID_IMPLEMENTER_LSB 24__UINT_FAST64_MAX__ 0xffffffffffffffffULL__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32NVIC_ICER(icer_id) MMIO32(NVIC_BASE + 0x80 + ((icer_id) * 4))BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LL__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4NVIC_USART1_IRQ 27__UFRACT_MAX__ 0XFFFFP-16URblocking_handler__UINT32_TYPE__ long unsigned intINT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__SYS_TICK_BASE (SCS_BASE + 0x0010)SCB_AIRCR_VECTCLRACTIVE (1 << 1)__USER_LABEL_PREFIX__ __ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)__LDBL_MAX_10_EXP__ 308NVIC_USB_IRQ 31__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)reset__INT_FAST32_TYPE__ intNVIC_TIM14_IRQ 19unsigned int__GCC_ASM_FLAG_OUTPUTS__NVIC_TIM2_IRQ 15__init_array_end__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1__USACCUM_IBIT__ 8NVIC_DMA1_CHANNEL1_IRQ 9__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UKSCB_ICSR MMIO32(SCB_BASE + 0x04)__UTA_IBIT__ 64__FLT_EVAL_METHOD__ 0__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32SCB_SHPR_PRI_6_USAGEFAULT 2__thumb2____ARM_FEATURE_LDREX__UQQ_FBIT__ 8INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN____UINT8_TYPE__ unsigned char__SIG_ATOMIC_TYPE__ intUINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINNVIC_USART3_4_IRQ 29true 1__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)pend_sv__FLT32X_MIN_EXP__ (-1021)INT64_MAXINT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1__LFRACT_EPSILON__ 0x1P-31LR__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX___ebss__arm__ 1__FLT32_MIN_10_EXP__ (-37)MMIO64(addr) (*(volatile uint64_t *)(addr))__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MIN__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)SCB_AIRCR_SYSRESETREQ (1 << 2)SCB_ICSR_ISRPENDING (1 << 22)NVIC_CEC_CAN_IRQ 30__ARM_FEATURE_QRDMX__ARM_ARCH_ISA_THUMB 1NVIC_TSC_IRQ 8__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4SCB_CPUID_CONSTANT_ARMV7 (0xF << SCB_CPUID_CONSTANT_LSB)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1INT_FAST32_MIN (-INT_FAST32_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1__FLT32_DIG__ 6INT_LEAST16_MAXSCB_ICSR_VECTPENDING (0x1FF << SCB_ICSR_VECTPENDING_LSB)BIT15 (1<<15)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7INT32_MAX__ACCUM_MIN__ (-0X1P15K-0X1P15K)__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intSCB_CPUID_REVISION (0xF << SCB_CPUID_REVISION_LSB)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2SCB_AIRCR_VECTKEY (0x05FA << SCB_AIRCR_VECTKEYSTAT_LSB)__ORDER_LITTLE_ENDIAN__ 1234__FLT_NORM_MAX__ 3.4028234663852886e+38FSCB_ICSR_VECTACTIVE_LSB 0long long unsigned int__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ intNVIC_IPR32(ipr_id) MMIO32(NVIC_BASE + 0x300 + ((ipr_id) * 4))__DQ_FBIT__ 63SCB_SHPR_PRI_8_RESERVED 4INT_LEAST64_MAX__SACCUM_IBIT__ 8__UHQ_IBIT__ 0INT_LEAST8_MINBIT29 (1<<29)__INT_FAST16_TYPE__ intINT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR_data_loadaddr__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15__UTQ_FBIT__ 128LIBOPENCM3_SCB_H __FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffPTRDIFF_MAX __PTRDIFF_MAX____FLT32_DECIMAL_DIG__ 9NVIC_DMA1_CHANNEL2_3_DMA2_CHANNEL1_2_IRQ 10__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKUINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULR__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intNVIC_PVD_IRQ 1NVIC_ISPR(ispr_id) MMIO32(NVIC_BASE + 0x100 + ((ispr_id) * 4))WCHAR_MINBEGIN_DECLS __LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKINT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15NVIC_I2C2_IRQ 24__FLT32X_MAX__ 1.7976931348623157e+308F32xSCB_ICSR_ISRPREEMPT (1 << 23)__ARM_EABI__ 1INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1INT64_MIN (-INT64_MAX - 1)destSCB_GET_EXCEPTION_STACK_FRAME(f) do { asm volatile ("mov %[frameptr], sp" : [frameptr]"=r" (f)); } while (0)__QQ_IBIT__ 0SCB_SHPR_PRI_14_PENDSV 10SCB_SHPR_PRI_12_RESERVED 8NVIC_TIM3_IRQ 16__LLACCUM_FBIT__ 31_datainitial_sp_value__UINTMAX_TYPE__ long long unsigned int__USQ_IBIT__ 0SCB_CPUID_PARTNO (0xFFF << SCB_CPUID_PARTNO_LSB)__UINT_LEAST32_TYPE__ long unsigned int__ARM_FEATURE_NUMERIC_MAXMINNVIC_DMA1_CHANNEL4_7_DMA2_CHANNEL3_5_IRQ 11__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 1STM32F0 1INTMAX_MAXDEBUG_BASE (SCS_BASE + 0x0DF0)__ARM_FEATURE_FP16_SCALAR_ARITHMETICNVIC_SV_CALL_IRQ -5__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CNVIC_TIM15_IRQ 20reserved_x001c__SACCUM_MAX__ 0X7FFFP-7HKNVIC_WWDG_IRQ 0UINT8_C__UINTPTR_TYPE__ unsigned intNVIC_NMI_IRQ -14UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULR__ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned int__INT64_C(c) c ## LLSCB_CPUID_IMPLEMENTER (0xFF << SCB_CPUID_IMPLEMENTER_LSB)__LDBL_MIN_10_EXP__ (-307)systickSCB_VTOR_TBLOFF (0x1FFFFFF << SCB_VTOR_TBLOFF_LSB)__LDBL_MIN__ 2.2250738585072014e-308L__ARM_FEATURE_CDE__ACCUM_IBIT__ 16funcp_tCORESIGHT_LAR_OFFSET 0xfb0IRQ_HANDLERS [NVIC_WWDG_IRQ] = wwdg_isr, [NVIC_PVD_IRQ] = pvd_isr, [NVIC_RTC_IRQ] = rtc_isr, [NVIC_FLASH_IRQ] = flash_isr, [NVIC_RCC_IRQ] = rcc_isr, [NVIC_EXTI0_1_IRQ] = exti0_1_isr, [NVIC_EXTI2_3_IRQ] = exti2_3_isr, [NVIC_EXTI4_15_IRQ] = exti4_15_isr, [NVIC_TSC_IRQ] = tsc_isr, [NVIC_DMA1_CHANNEL1_IRQ] = dma1_channel1_isr, [NVIC_DMA1_CHANNEL2_3_DMA2_CHANNEL1_2_IRQ] = dma1_channel2_3_dma2_channel1_2_isr, [NVIC_DMA1_CHANNEL4_7_DMA2_CHANNEL3_5_IRQ] = dma1_channel4_7_dma2_channel3_5_isr, [NVIC_ADC_COMP_IRQ] = adc_comp_isr, [NVIC_TIM1_BRK_UP_TRG_COM_IRQ] = tim1_brk_up_trg_com_isr, [NVIC_TIM1_CC_IRQ] = tim1_cc_isr, [NVIC_TIM2_IRQ] = tim2_isr, [NVIC_TIM3_IRQ] = tim3_isr, [NVIC_TIM6_DAC_IRQ] = tim6_dac_isr, [NVIC_TIM7_IRQ] = tim7_isr, [NVIC_TIM14_IRQ] = tim14_isr, [NVIC_TIM15_IRQ] = tim15_isr, [NVIC_TIM16_IRQ] = tim16_isr, [NVIC_TIM17_IRQ] = tim17_isr, [NVIC_I2C1_IRQ] = i2c1_isr, [NVIC_I2C2_IRQ] = i2c2_isr, [NVIC_SPI1_IRQ] = spi1_isr, [NVIC_SPI2_IRQ] = spi2_isr, [NVIC_USART1_IRQ] = usart1_isr, [NVIC_USART2_IRQ] = usart2_isr, [NVIC_USART3_4_IRQ] = usart3_4_isr, [NVIC_CEC_CAN_IRQ] = cec_can_isr, [NVIC_USB_IRQ] = usb_isrSCB_SHPR_PRI_15_SYSTICK 11short int__UINT16_C(c) c__UDA_IBIT__ 32UINT_LEAST32_MAXBIT2 (1<<2)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCsv_call__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53reserved_x0034BIT5 (1<<5)NVIC_RTC_IRQ 2BIT1 (1<<1)INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1__DBL_DECIMAL_DIG__ 17BIT8 (1<<8)INT16_C(c) __INT16_C(c)__INT16_MAX__ 0x7fff__INT_WIDTH__ 32SCB_SHPR_PRI_11_SVCALL 7__QQ_FBIT__ 7__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64NVIC_TIM16_IRQ 21__ULLACCUM_IBIT__ 32SCB_VTOR MMIO32(SCB_BASE + 0x08)__ULLFRACT_EPSILON__ 0x1P-64ULLRfalse 0__SIZEOF_WINT_T__ 4SCB_CPUID_CONSTANT_ARMV6 (0xC << SCB_CPUID_CONSTANT_LSB)NVIC_USART2_IRQ 28__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1__FLT32X_HAS_DENORM__ 1__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1NVIC_FLASH_IRQ 3SCB_AIRCR_VECTKEYSTAT_LSB 16INTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODNVIC_EXTI0_1_IRQ 5SCB_CCR_STKALIGN (1 << 9)__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H __GCC_CONSTRUCTIVE_SIZE 64__LLFRACT_IBIT__ 0SCB_SHPR_PRI_10_RESERVED 6uint32_tBIT12 (1<<12)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HK__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULKSCB_CPUID_PARTNO_LSB 4__LDBL_DIG__ 15UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXLIBOPENCM3_CM3_MEMORYMAP_H BIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8__INT_LEAST16_TYPE__ short int__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_CINT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1__UINTPTR_MAX__ 0xffffffffU__HQ_FBIT__ 15__bool_true_false_are_defined 1BIT26 (1<<26)__SIZE_MAX__ 0xffffffffU__ARM_FEATURE_SATreset_handler__ARM_ARCH__LONG_MAX__ 0x7fffffffLBIT25 (1<<25)INT_LEAST64_MINPTRDIFF_MAX__LLFRACT_EPSILON__ 0x1P-63LLR__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53__ARM_ASM_SYNTAX_UNIFIED__WINT_MAX__INT16_C(c) cINT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32NVIC_TIM7_IRQ 18__ATOMIC_ACQ_REL 4__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)__fini_array_start__ULLFRACT_FBIT__ 64__FLT32_NORM_MAX__ 3.4028234663852886e+38F32UINT64_C(c) __UINT64_C(c)__UINTMAX_MAX__ 0xffffffffffffffffULLSCB_ICSR_PENDSVCLR (1 << 27)__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0vector_table_entry_tINT_FAST16_MAX__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long int__ARM_FEATURE_CDE_COPROCUINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| ˆA„ŽA+aeabi!6S-MM ñÿ \ 02 "$&(*,.47kœÍÿ0^ 36 ¼ Í" à" è" ô" " " " " )" 2" ;" E" O" Y" c" l" y" ‚" ‹" —" ¯" ¼" à" " " " +" 7" C" K" U" ]" e" n{"Œ"œ"¬"¸ˆ"ÆËÑàçí*;N_Älvector.c$t$dwm4.0.88d8b58fcc7cb03c549c2662f5adb422wm4.memorymap.h.21.991cbfb03a4e91ff777157049f1f9499wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.scb.h.43.009db5889753775abc8c2139d8c04e70wm4.nvic.h.38.6372f4ef3eec3be5d298b9c4fcf80cd9wm4.nvic.h.16.5ea335259e1df59285bd21031ccc65cbblocking_handlerhard_fault_handlerusb_isrcec_can_isrusart3_4_isrusart2_isrusart1_isrspi2_isrspi1_isri2c2_isri2c1_isrtim17_isrtim16_isrtim15_isrtim14_isrtim7_isrtim6_dac_isrtim3_isrtim2_isrtim1_cc_isrtim1_brk_up_trg_com_isradc_comp_isrdma1_channel4_7_dma2_channel3_5_isrdma1_channel2_3_dma2_channel1_2_isrdma1_channel1_isrtsc_isrexti4_15_isrexti2_3_isrexti0_1_isrrcc_isrflash_isrrtc_isrpvd_isrwwdg_isrnull_handlersys_tick_handlerpend_sv_handlersv_call_handlernmi_handlerreset_handlermain_data_data_loadaddr_edata_ebss__preinit_array_start__preinit_array_end__init_array_start__init_array_end__fini_array_start__fini_array_endvector_table_stack0 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Ý4 HÐCÕ«b8o+è^<¢M2(5r:}8õ:@:yI'°'aO2s.ê5Ü!ý7F%)$'3÷o$3Í*vÒ,y=R#[©0B3j…>O ù&&y &½Ó>W'1 ;’?à·5(©ÞÏx#b&½aWa0zkQ ¡!à1S$¡ LÝ=}›‰èD7%8u q?ç:›.à'ä+¹)ž(ƒ6Ý-Ž ]*>2í-èx2ÃØ)A’Ë0ˆ2Â@ 0Ý}%Ø:œ ª.Ÿ#®98ê (<.Â;Õë¨2ðƒ!>G®,éP1n`!É3&î96lÂ'û †"ÿ<ZT’&¤&?;=\ ?&%!N;1 ªä§9¶È,Ã+·VJå3œ0Ê>=(<)« ò ápÆ$ó5>Ô'–ú$Â…Fd QŒ+()Ã"ò#![Ù9Î3*Ê4š¤&›0œP&ž¶Ÿh, ©)¡6*¢£Ì#¥Ê:¦‰§¨ó©wª^4«“¬+<®ˆ1¯+=°µ9±²Û7³3´‚9µ6%¶· ¸Ê(¹,ºr*»f¼†¿S ÀØ Á#"Â« Å:?ÆéÉ5 ÊD4Ë`Ì³Í -ÎÎ5ÒŸ"ÓÌÔãÕ×Ð Øë8Ù/ÚñÜ~Ý:ßö4àbáoâ"7ä=å "æç;ïð(+ñÝ<òkó£ôÿ=õì(ö´&÷«8øWù¤ú¼û'üÔ$ýº+þ¸ ÿ=€d3y ‚ô(k!{&C'™=27CÝ6DÅEM=F—*I;LY7Q°R_S@0T×U˜3VŸWé XíY¤Z•5[9"\ñ=] 4^Ç_©<`a#bz/cŸdÁ-eRfõ gÍ7h02i¥$jÏ-k l(m"nxoÊ2pó+BùLS¼Z+e¡=gò3mt}'u1}Y"!†¡0žá"¥F¨µû ../../cm3/usr/lib/gcc/arm-none-eabi/12.2.1/include../../../include/libopencm3/cm3systick.cstdint.hsystick.hmemorymap.hcommon.hstdbool.h8 !Ã!=í!=ú" ! + "Ò. o .# t .U + U * … ! ./ ! ./™ ! ./£ ! ./± ! + /¼ ! /Æ!=__ARM_FEATURE_FP16_VECTOR_ARITHMETIC__SIG_ATOMIC_MAX__ 0x7fffffff__FLT64_HAS_QUIET_NAN__ 1systick_get_calib__UFRACT_IBIT__ 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0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2__NEWLIB_PATCHLEVEL__ 0BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234__size_t__CC_SUPPORTS_INLINE 1__DOTS , ...long long unsigned int__alloc_size(x) __attribute__((__alloc_size__(x)))BIT31 (1<<31)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int_SIZE_T_DEFINED __DQ_FBIT__ 63SCB_SHPR_PRI_8_RESERVED 4__GNU_VISIBLE 0INT_LEAST64_MAX__SACCUM_IBIT__ 8__PTRDIFF_T __UHQ_IBIT__ 0INT_LEAST8_MIN_REENT_WCTOMB_STATE(ptr) ((ptr)->_new._reent._wctomb_state)BIT29 (1<<29)__INT_FAST16_TYPE__ int__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__UINT_LEAST16_TYPE__ short unsigned intUINT16_MAX__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15__signed signed__UTQ_FBIT__ 128LIBOPENCM3_SCB_H _REENT_ASCTIME_BUF(ptr) ((ptr)->_new._reent._asctime_buf)__lock_try_acquire(lock) ((void) 0)__INT_FAST16_MAX__ 0x7fffffff__have_longlong64 1PTRDIFF_MAX __PTRDIFF_MAX___REENT_MP_P5S(ptr) ((ptr)->_p5s)INT8_MINUINTPTR_MAX __UINTPTR_MAX___WCHAR_T_DEFINED __ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK__trylocks_exclusive(...) __lock_annotate(exclusive_trylock_function(__VA_ARGS__))SCB_ICSR_VECTPENDING (0x1FF << SCB_ICSR_VECTPENDING_LSB)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRBIT26 (1<<26)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long int__always_inline __inline__ __attribute__((__always_inline__))INT32_MIN__containerof(x,s,m) ({ const volatile __typeof(((s *)0)->m) *__x = (x); __DEQUALIFY(s *, (const volatile char *)__x - __offsetof(s, m));})_BSD_SIZE_T_ WCHAR_MINSCB_CPUID_REVISION_LSB 0__no_lock_analysis __lock_annotate(no_thread_safety_analysis)_WCHAR_T_ _REENT_STDIO_STREAM(var,index) &(var)->__sf[index]_T_WCHAR CORESIGHT_LSR_SLK (1<<1)_CLOCKID_T_ unsigned long_REENT_CHECK_TM(ptr) __UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__INT_WCHAR_T_H __FLT32X_MAX__ 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1)MMIO64(addr) (*(volatile uint64_t *)(addr))short int__UFRACT_EPSILON__ 0x1P-16URNVIC_CEC_CAN_IRQ 30__GXX_ABI_VERSION 1017INT8_C(c) __INT8_C(c)__INT_LEAST64_WIDTH__ 64__INT32_TYPE__ long int__FLT32X_MIN_10_EXP__ (-307)__ARM_FEATURE_BF16_SCALAR_ARITHMETIClong intUINT64_C__thumb2____LDBL_MAX_EXP__ 1024__SQ_FBIT__ 31BIT31 (1<<31)INT_FAST64_MIN__USACCUM_FBIT__ 8__WCHAR_MIN__ 0U__FLT64_MAX__ 1.7976931348623157e+308F64INT_LEAST64_MAX __INT_LEAST64_MAX__NVIC_HARD_FAULT_IRQ -13__UINT_LEAST32_MAX__ 0xffffffffUL__GCC_DESTRUCTIVE_SIZE 64NVIC_SPI1_IRQ 25priority__thumb__ 1SCB_CPUID_PARTNO_LSB 4__LDBL_HAS_QUIET_NAN__ 1__INT8_TYPE__ signed char__WINT_MAX__ 0xffffffffUUINTMAX_MAXGNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsSCB_ICSR_VECTACTIVE_LSB 0BIT19 (1<<19)BIT8 (1<<8)__TQ_FBIT__ 127__UHQ_FBIT__ 16../../cm3/nvic.c__LDBL_DECIMAL_DIG__ 17NVIC_EXTI0_1_IRQ 5SCB_CPUID_CONSTANT_LSB 16__ULLACCUM_IBIT__ 32__UINT_FAST32_MAX__ 0xffffffffU__USFRACT_FBIT__ 8__INT64_C(c) c ## LL__HQ_FBIT__ 15NVIC_TIM17_IRQ 22LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))__SFRACT_IBIT__ 0__SIZEOF_LONG_LONG__ 8SIG_ATOMIC_MIN__UINT8_TYPE__ unsigned char__SHRT_WIDTH__ 16__ARM_FPUINT32_MAXINT32_MAX __INT32_MAX__NVIC_RTC_IRQ 2__FLT_EPSILON__ 1.1920928955078125e-7FSCB_VTOR MMIO32(SCB_BASE + 0x08)__INT_LEAST64_TYPE__ long long intSCB_ICSR_VECTPENDING_LSB 12INT16_MAX__UINT32_TYPE__ long unsigned int__LDBL_MIN_10_EXP__ (-307)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)BIT2 (1<<2)__SIZEOF_POINTER__ 4__UACCUM_MAX__ 0XFFFFFFFFP-16UK__VFP_FP__ 1__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__HA_FBIT__ 7__PTRDIFF_WIDTH__ 32__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__INT_WIDTH__ 32__GCC_ATOMIC_POINTER_LOCK_FREE 1__UINT64_C(c) c ## ULLINT_FAST16_MIN (-INT_FAST16_MAX - 1)__LACCUM_EPSILON__ 0x1P-31LK__SFRACT_EPSILON__ 0x1P-7HR__UQQ_IBIT__ 0__FLT32X_MAX__ 1.7976931348623157e+308F32x__USQ_FBIT__ 32__HA_IBIT__ 8long unsigned int__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1BIT30 (1<<30)__STDC_VERSION__ 199901LINT_FAST32_MINSCB_SHPR_PRI_7_RESERVED 3PPBI_BASE (0xE0000000U)__FRACT_EPSILON__ 0x1P-15R__STDC_HOSTED__ 1UINT_LEAST8_MAX__INTPTR_MAX__ 0x7fffffffNVIC_TIM16_IRQ 21BIT4 (1<<4)INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)__PRAGMA_REDEFINE_EXTNAME 1__SOFTFP__ 1NVIC_SV_CALL_IRQ -5BIT12 (1<<12)__FLT64_EPSILON__ 2.2204460492503131e-16F64INTMAX_MAX __INTMAX_MAX__WCHAR_MAX __WCHAR_MAX__UINT_FAST8_MAX __UINT_FAST8_MAX____GCC_ATOMIC_LLONG_LOCK_FREE 1__FLT_MAX_EXP__ 128__ATOMIC_ACQ_REL 4__UINT_FAST64_TYPE__ long long unsigned intSCS_BASE (PPBI_BASE + 0xE000)unsigned charWCHAR_MAX__UINTMAX_TYPE__ long long unsigned int__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32xNVIC_DMA1_CHANNEL2_3_DMA2_CHANNEL1_2_IRQ 10__LDBL_EPSILON__ 2.2204460492503131e-16L__INTPTR_TYPE__ intBIT9 (1<<9)__DEC_EVAL_METHOD__ 2__USACCUM_MIN__ 0.0UHKNVIC_ISPR(ispr_id) MMIO32(NVIC_BASE + 0x100 + ((ispr_id) * 4))SCB_CCR_UNALIGN_TRP (1 << 3)UINTMAX_MAX __UINTMAX_MAX____USFRACT_IBIT__ 0__INT_LEAST32_WIDTH__ 32__ARM_FEATURE_DSP__GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"__UINT_FAST32_TYPE__ unsigned intSCB_SHPR_PRI_5_BUSFAULT 1UINT64_MAX__DQ_IBIT__ 0__FLT_MAX__ 3.4028234663852886e+38F__FLT32_MIN__ 1.1754943508222875e-38F32MMIO8(addr) (*(volatile uint8_t *)(addr))__SIZE_TYPE__ unsigned intWCHAR_MIN __WCHAR_MIN__INT16_MIN__ULLACCUM_FBIT__ 32LIBOPENCM3_SCB_H BBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)__FLT64_MIN_EXP__ (-1021)BIT22 (1<<22)INT_FAST32_MAX __INT_FAST32_MAX____FRACT_FBIT__ 15__OPTIMIZE_SIZE__ 1__UTA_IBIT__ 64SCB_SHCSR MMIO32(SCB_BASE + 0x24)UINT8_C__FLT_MIN_10_EXP__ (-37)__FLT32X_MIN_EXP__ (-1021)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xirqn__FLT_EVAL_METHOD_TS_18661_3__ 0__DBL_HAS_INFINITY__ 1SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__SCB_CPUID_CONSTANT_ARMV6 (0xC << SCB_CPUID_CONSTANT_LSB)__GCC_HAVE_DWARF2_CFI_ASM 1__INT_FAST32_TYPE__ intNVIC_TIM2_IRQ 15__FLT_HAS_QUIET_NAN__ 1__SIZEOF_INT__ 4__INTMAX_TYPE__ long long intINTMAX_MINSCB_AIRCR_VECTCLRACTIVE (1 << 1)__INTMAX_C(c) c ## LLNVIC_ADC_COMP_IRQ 12nvic_get_pending_irqINT_FAST32_MIN (-INT_FAST32_MAX - 1)__APCS_32__ 1SCB_AIRCR_ENDIANESS (1 << 15)UINT_FAST16_MAX __UINT_FAST16_MAX__STM32F0 1__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)__UINT64_TYPE__ long long unsigned int__FLT32X_HAS_QUIET_NAN__ 1__DBL_MAX_10_EXP__ 308__FLT32X_MIN__ 2.2250738585072014e-308F32xUINT32_MAX __UINT32_MAX__SCB_CPUID MMIO32(SCB_BASE + 0x00)short unsigned intINT_FAST8_MAX__TA_IBIT__ 64__QQ_FBIT__ 7SCB_ICSR MMIO32(SCB_BASE + 0x04)__FLT32X_HAS_INFINITY__ 1WINT_MIN __WINT_MIN____UINT_LEAST16_TYPE__ short unsigned int__ARM_ARCH_PROFILE 77INT16_MAX __INT16_MAX____INT_FAST8_WIDTH__ 32PTRDIFF_MIN (-PTRDIFF_MAX - 1)__FLT_MIN_EXP__ (-125)__GCC_ATOMIC_BOOL_LOCK_FREE 1SCB_GET_EXCEPTION_STACK_FRAME(f) do { asm volatile ("mov %[frameptr], sp" : [frameptr]"=r" (f)); } while (0)NVIC_IPR32(ipr_id) MMIO32(NVIC_BASE + 0x300 + ((ipr_id) * 4))__DECIMAL_DIG__ 17__INT32_C(c) c ## LINT_FAST16_MIN__STRICT_ANSI__ 1__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_MAX_10_EXP__ 308__FLT32X_MAX_10_EXP__ 308__UINTPTR_MAX__ 0xffffffffU__DBL_HAS_DENORM__ 1BIT14 (1<<14)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"NVIC_RCC_IRQ 4UINT64_MAX __UINT64_MAX__NVIC_USART3_4_IRQ 29__ARM_FEATURE_CRC32__FLT32_MAX_10_EXP__ 38UINT_FAST16_MAX__ARM_FEATURE_CLZMMIO32(addr) (*(volatile uint32_t *)(addr))__LFRACT_MAX__ 0X7FFFFFFFP-31LRCORESIGHT_LAR_OFFSET 0xfb0SCB_ICSR_PENDSTCLR (1 << 25)false 0SCB_ICSR_NMIPENDSET (1 << 31)__INT_LEAST32_MAX__ 0x7fffffffLINT16_C(c) __INT16_C(c)BIT11 (1<<11)INT32_C(c) __INT32_C(c)__GCC_ATOMIC_LONG_LOCK_FREE 1__ARM_ARCH_6M__ 1__UINTMAX_MAX__ 0xffffffffffffffffULL__SIG_ATOMIC_TYPE__ int__LLFRACT_MIN__ (-0.5LLR-0.5LLR)INT_LEAST32_MAX __INT_LEAST32_MAX__BIT28 (1<<28)__FLT64_DECIMAL_DIG__ 17__LDBL_HAS_DENORM__ 1__UINT_LEAST16_MAX__ 0xffffUINTPTR_MAX__LDBL_NORM_MAX__ 1.7976931348623157e+308L__ULLACCUM_EPSILON__ 0x1P-32ULLK__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64__FLT_HAS_DENORM__ 1__INT_FAST64_WIDTH__ 64__DBL_DECIMAL_DIG__ 17GCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| $$<A„ŽA+aeabi!6S-MM ñÿ 413!#%')+-/55f—Éú.]Œ 47 º ÊÛ$ð$1<nvic.c$t$dwm4.0.88d8b58fcc7cb03c549c2662f5adb422wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.memorymap.h.21.991cbfb03a4e91ff777157049f1f9499wm4.nvic.h.51.6a4ccc052047bc1ce936a2cf7c472456wm4.nvic.h.16.5ea335259e1df59285bd21031ccc65cbwm4.scb.h.22.7c4b9bb583c75a569add5108d839e95dnvic_enable_irqnvic_disable_irqnvic_get_pending_irqnvic_set_pending_irqnvic_clear_pending_irqnvic_get_irq_enablednvic_set_priority !!!" &-!4!;!B!G!T![!`!m!t!‚!‡!Œ›!¥©®!¸¼ÁÎ!×Ûéíóø!!'6!@DJ!O^!hlr!w†!”š!£²!¼ÀÆ!ËÚ!äèî!õ! 8Rcrƒ”«ÂÙð (08@ "(.4:@ "!#$$-%3&<'B(O!X)c*!!!!!#!)!/!5!;!A!G!M!S!Y!_!e!k!q!w!}!ƒ!‰!!•!›!¡!§!!³!¹!¿!Å!Ë!Ñ!×!Ý!ã!é!ï!õ!û!!! !!!!%!+!1!7!=!C!I!O!U![!a!g!m!s!y!!…!‹!‘!—!!£!©!¯!µ!»!Á!Ç!Í!Ó!Ù!ß!å!ë!ñ!÷!ý!! !!!!!!'!-!3!9!?!E!K!Q!W!]!c!i!o!u!{!!‡!!“!™!Ÿ!¥!«!±!·!½!Ã!É!Ï!Õ!Û!á!ç!í!ó!ù!ÿ!!!!!!#!)!/!5!;!A!G!M!S!Y!_!e!k!q!w!}!ƒ!‰!!•!›!¡!§!!³!¹!¿!Å!Ë!Ñ!×!Ý!ã!é!ï!õ!û!!! !!!!%!+!1!7!=!C!I!O!U![!a!g!m!s!y!!…!‹!‘!—!!£!©!¯!µ!»!Á!Ç!Í!Ó!Ù!ß!å!ë!ñ!÷!ý!! !!!!!!'!-!3!9!?!E!K!Q!W!]!c!i!o!u!{!!‡!!“!™!Ÿ!¥!«!±!·!½!Ã!É!Ï!Õ!Û!á!ç!í!ó!ù!ÿ!!!!!!#!)!/!5!;!A!G!M!S!Y!_!e!k!q!w!}!ƒ!‰!!•!›!¡!§!!³!¹!¿!Å!Ë!Ñ!×!Ý!ã!é!ï!õ!û!!! !!!!%!+!1!7!=!C!I!O!U![!a!g!m!s!y!!…!‹!‘!—!!£!©!¯!µ!»!Á!Ç!Í!Ó!Ù!ß!å!ë!ñ!÷!ý!! !!!!!!'!-!3!9!?!E!K!Q!W!]!c!i!o!u!{!!‡!!“!™!Ÿ!¥!«!±!·!½!Ã!É!Ï!Õ!Û!á!ç!í!ó!ù!ÿ! ! ! ! ! !# !) !/ !5 !; !A !G !M !S !Y !_ !e !k !q !w !} !ƒ !‰ ! !• !› !¡ !§ ! !³ !¹ !¿ !Å !Ë !Ñ !× !Ý !ã !é !ï !õ !û ! ! ! ! ! ! !% !+ !1 !7 != !C !I !O !U ![ !a !g !m !s !y !!!!!!!!!!#!)!/!5!;!A!G!M!S!Y!_!e!k!q!x!!†!!”!›!¢!©!°!·!¾!Å!Ì!Ó!Ú!á!è!ï!ö!ý!!!!! !'!.!5!<!C!J!Q!X!_!f!m!t!{!‚!‰!!—!ž!¥!¬!³!º!Á!È!Ï!Ö!Ý!ä!ë!ò!ù!!!!!!#!*!1!8!?!F!M!T![!b!i!p!w!~!…!Œ!“!š!¡!¨!¯!¶!½!Ä!Ë!Ò!Ù!à!ç!î!õ!ü!! !!!!&!-!4!;!B!I!!!!!!!!!!!#!)!/!5!;!A!G!M!S!Y!_!e!k!q!w!}!ƒ!‰!!•!›!¡!§!!³!¹!¿!Å!Ë!Ñ!×!Ý!ã!!!!!!#!)!/!5!;!A!G!M!!!!!!#!)!0!7!>!!!!!!#!)!/!5!;!A!G!M!S!Y!_!e!k!q!w!}!ƒ!‰!!•!›!¡!§!!³!¹!¿!Å!!!!!!#!)!/!5!;!B!I!P!W!^!e!l!s!z!!ˆ!!–!!¤!«!²!¹!À!Ç!Î!Õ!Ü!ã!ê!ñ!ø!ÿ!! !!!"!)!0!7!>!E!L!S!Z!a!h!o!v!}!„!‹!’!™! !%Lt£Ëó"+$+(4+8D+HT+Xd+ht+x.symtab.strtab.shstrtab.text.data.bss.text.nvic_enable_irq.text.nvic_disable_irq.text.nvic_get_pending_irq.text.nvic_set_pending_irq.text.nvic_clear_pending_irq.text.nvic_get_irq_enabled.text.nvic_set_priority.rel.debug_info.debug_abbrev.rel.debug_loclists.rel.debug_aranges.rel.debug_rnglists.rel.debug_macro.rel.debug_line.debug_str.comment.rel.debug_frame.ARM.attributes.groupŽ48,Ž@8-ŽL8.ŽX8/Žd80Žp81Ž|82Žˆ83Ž”84 ! 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