ELF(4(:9 !"#$%&'()*+,-./pG8JKIB J!B!O#L-MBr--Bp-BLMBLMB8R C CT;GT;GT;G s YYj 40^-_@P,[e4`*vR intE unl-p/ RY0R~E1nmi23 @45.6J[7W^8,90n_:4I;8\<<irq=g@ ?luguwu@_TCuYC!uC(u;C0u<@C7uvDw]'  E $Jk!!$(#n k Cfi> src@ LX@<0 fpA xd(( RD-|  :!; 9 I8 4: ; 9 I?<$ > : ; 9 I !I :!; 9!I8 I!I/ .?:!; 9!'@z 4:!; 9 IB % Uy $ >  5I' : ; 9  : ; 9 I84G: ; 9 .?: ; 9 'I<.?: ; 9 '@|4: ; 9 IB1RB X Y W H}.: ; 9 ' RFJRJNr|NPRSFNSNNs|NPSPTsTVS4TTT*.T.0t|06T68t|8>T>@t|@lT,T"#?@&)  J     M-mH s|># ^]';k<<UNaUi k3\BZLQW nCHR fIS;Y,YT7nVBHy*cG\gPl+YO-SEh+$f.t[[*GRliOMI?Eggh+0*`>&AFjvMD fLBl'_#`n)N`+=&&S'GNlg0}jp%)  Y,n\ )#(WV^t(( ^Q8-bl'U ?*cx Y  |F A` G G*%C@!<FFR>3R@K9)8J$XGl\N0k;_gD(^Zefu\6=Eb6b?L?]rp=N"@R,O ZKtU[kC -bg"M X_"g* 6 ;Bm<]B`jF"FQ/jTI\(-#W KA|bt$sC)j -_! %Q+DN"C,?BUN)6HnJ [lUT\g-eN [i=daPPnS*Y[e!JFZ]PP)Uf?P <F7" obnTR?UpfY+v,Wf;ac`Xh"k `5SBVpGn? S:TYDG<TgWAW!* j"[FfIf^F[&~28bP8PJ;\Ou!Z?A"d'0P)BaVH8X'=PaM)c'$NP*@Gi'Y`JE(B~EePCRaD[}?\]_aL&cm@>! W"^)-%8Nd@e-fIg j6kn@oy$pWq%tRBu"xPy?zg{~e% J`e&%=LI, SGMOHgJN*_=G v^2_^S dNQ^o &&(<Jl[hJj7+~vW*OU5NCb D@c=LDd=PZxI?,#iEUsfM gNq b>\V|-tj_rLG$`.[fT [S[ *m= fk %hId!y#&I'a2hC#D=EFKI#L?QrR_S^TS@UVV}_W=AXY`ZA[x \M]de^_)`Oafbc)+dPQeB*f"Pg^ghWi+jQkhlm;nSoK,pR+<.F1da4)7:1DHKG+Pe]SNbV@Y\$_@=b,ex h5!k*nNqxit>wjz}EdzApV$!So& eTL  M 7;EMGV]A\N["arefcYiQ!,*lDD/&WL'O\R(?!iV<{ $ZHL9OLLDP&di B'5' ``UE#G#qG/hDS} @ekXhX^l%?~O\]k! R&] fQQKiM,QX&3<$EVN>W@dekKx[yR} ~(ZdO&"%^d z P/nZV`*afjE _!^"k# $Z%%&I'(K)V*%+ ,%-J.h/G0Bc1HL2m3!4I5< 6;7VW8)9U:;<\= >!?6F@ ALBChDELF+EG QHISJJ"K<L*@M3gN5<O> PS>Q+RS_TZ?UDVGW !XjYZb[j\@]]^P_ `~abcVdIheWfg!hci<`j>klme n{Fo6[pq+rIAsUt7iuvk'wJxPay| zP{c| }FK~] ../cm3../cm3/../dispatch/../lm4f/usr/lib/gcc/arm-none-eabi/12.2.1/include../../include/libopencm3/cm3../../include/libopencm3/dispatch../../include/libopencm3/lm3s../cm3/../dispatch../cm3/../dispatch/../lm3svector.cvector_chipset.cstdint.hvector.hscb.hmemorymap.hcommon.hstdbool.hnvic.hnvic.hnvic.hvector_chipset.cvector_nvic.cvector_nvic.c> $# ! 3 !4 4z '4 z M B .J'> 1$  31 $  2b   .-% . .A$.; .;SCB_DCCSW MMIO32(SCB_BASE + 0x26C)SCB_SHPR_PRI_4_MEMMANAGE 0SCB_BASE (SCS_BASE + 0x0D00)__UHA_FBIT__ 8__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64CORESIGHT_LSR_SLK (1<<1)__GCC_ATOMIC_WCHAR_T_LOCK_FREE 2NVIC_IRQ_COUNT 139__CHAR_UNSIGNED__ 1pre_mainbus_faultNVIC_GPIOP6_IRQ 122__FLT64_HAS_INFINITY__ 1NVIC_QEI1_IRQ 38SCB_AIRCR_PRIGROUP_GROUP4_SUB4 (0x5 << 8)__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LKNVIC_WTIMER5B_IRQ 105__PTRDIFF_MAX__ 0x7fffffff__ARM_FEATURE_FMA 1__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__INTMAX_MAX__ 0x7fffffffffffffffLL__TQ_IBIT__ 0NVIC_WTIMER5A_IRQ 104__FLT64_DECIMAL_DIG__ 17SCB_CFSR_INVSTATE (1 << 17)WINT_MIN __WINT_MIN__INT_FAST64_MAX__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffUNVIC_I2C0_IRQ 8SCB_SHCSR_SVCALLPENDED (1 << 15)INT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8__DBL_MAX_10_EXP__ 308__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned int__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__FLT32_MIN__ 1.1754943508222875e-38F32SCB_SCR MMIO32(SCB_BASE + 0x10)__USACCUM_MIN__ 0.0UHKSCB_CCR MMIO32(SCB_BASE + 0x14)SCB_CPACR_NONE 0__DECIMAL_DIG__ 17__LDBL_MIN_EXP__ (-1021)UINTPTR_MAX __UINTPTR_MAX____LDBL_MANT_DIG__ 53__fini_array_endSCB_HFSR_FORCED (1 << 30)NVIC_ISER(iser_id) MMIO32(NVIC_BASE + 0x00 + ((iser_id) * 4))__UINT8_C(c) c__INT16_TYPE__ short intSCB_AIRCR_VECTRESET (1 << 0)__FLT64_MAX__ 1.7976931348623157e+308F64SCB_SHPR(ipr_id) MMIO8(SCS_BASE + 0xD18 + (ipr_id))UINT_FAST32_MAXLIBOPENCM3_NVIC_H NVIC_GPIOL_IRQ 56NVIC_I2S0_IRQ 52INT_FAST64_MAX __INT_FAST64_MAX____GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1__UINT_LEAST16_MAX__ 0xffff__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64__SIG_ATOMIC_TYPE__ intSCB_AIRCR_PRIGROUP_GROUP2_SUB8 (0x6 << 8)SCB_CFSR_STKERR (1 << 12)SCB_DCISW MMIO32(SCB_BASE + 0x260)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intNVIC_PECI0_IRQ 107SCB_CPUID_REVISION_LSB 0INT32_MIN (-INT32_MAX - 1)SCB_AIRCR_PRIGROUP_NOGROUP_SUB16 (0x7 << 8)__FLT32_MAX_10_EXP__ 38vector_table_tNVIC_PENDSV_IRQ -2SCB_AIRCR_ENDIANESS (1 << 15)__USFRACT_MAX__ 0XFFP-8UHRNVIC_I2C1_IRQ 37__FP_FAST_FMAF32 1__UINTPTR_MAX__ 0xffffffffUNVIC_GPIOQ7_IRQ 131__FLT32_MIN_EXP__ (-125)NVIC_WTIMER4B_IRQ 103UINT32_MAX __UINT32_MAX__SCB_SHCSR_BUSFAULTACT (1 << 1)NVIC_UART0_IRQ 5__ULFRACT_FBIT__ 32INT8_MIN (-INT8_MAX - 1)__FLT64_MIN_10_EXP__ (-307)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__openblt_signature__SFRACT_EPSILON__ 0x1P-7HRSCB_CCR_NONBASETHRDENA (1 << 0)__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAXNVIC_UART1_IRQ 6NVIC_ADC1SS0_IRQ 48__SQ_FBIT__ 31DWT_BASE (PPBI_BASE + 0x1000)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)NVIC_PWM1_2_IRQ 136__UHQ_FBIT__ 16NVIC_PWM0_3_IRQ 45__FLT64_MIN_EXP__ (-1021)__PTRDIFF_WIDTH__ 32__UINT_FAST8_MAX__ 0xffffffffUSCB_ID_DFR0 MMIO32(SCB_BASE + 0x48)UINT16_C(c) __UINT16_C(c)NVIC_TIMER0A_IRQ 19__LACCUM_IBIT__ 32SCB_DCIMVAC MMIO32(SCB_BASE + 0x25C)__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1__LLFRACT_MIN__ (-0.5LLR-0.5LLR)INT_FAST8_MAXSCB_SHPR_PRI_9_RESERVED 5__UINT_FAST16_MAX__ 0xffffffffU__INTPTR_MAX__ 0x7fffffffINT64_C(c) __INT64_C(c)SCB_CTR_DMINLINE_SHIFT 16_edata__GCC_IEC_559_COMPLEX 0__UFRACT_MIN__ 0.0URSCB_DCCMVAU MMIO32(SCB_BASE + 0x264)WCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__NVIC_HIBERNATE_IRQ 43__UINT_LEAST8_TYPE__ unsigned char__ACCUM_FBIT__ 15SCB_SCR_SLEEPONEXIT (1 << 1)__UACCUM_IBIT__ 16long intUINT8_MAXSCB_MMFAR MMIO32(SCB_BASE + 0x34)SIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1NVIC_GPIOP2_IRQ 118__FLT32X_EPSILON__ 2.2204460492503131e-16F32x__UINT_FAST64_MAX__ 0xffffffffffffffffULLNVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32NVIC_ETH_IRQ 42__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed charNVIC_MEM_MANAGE_IRQ -12__GCC_ATOMIC_BOOL_LOCK_FREE 2BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128SCB_BFAR MMIO32(SCB_BASE + 0x38)main__THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRNVIC_GPIOQ3_IRQ 127short unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__DBL_IS_IEC_60559__ 2__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4SCB_SCR_SLEEPDEEP (1 << 2)LIBOPENCM3_VECTOR_H INTMAX_MAX __INTMAX_MAX____INT_LEAST32_WIDTH__ 32SCB_SHCSR_MEMFAULTENA (1 << 16)SCB_HFSR_VECTTBL (1 << 1)NVIC_ADC0SS2_IRQ 16GNU C99 12.2.1 20221205 -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -march=armv7e-m+fp -ggdb3 -Os -std=c99 -fno-common -ffunction-sections -fdata-sectionsBIT27 (1<<27)NVIC_I2C3_IRQ 69NVIC_UART3_IRQ 59SCB_CPUID_CONSTANT_LSB 16SCB_SHPR_PRI_13_RESERVED 9NVIC_TIMER4A_IRQ 70__UTA_FBIT__ 64INTMAX_C(c) __INTMAX_C(c)__FLT_DECIMAL_DIG__ 9SCB_CPUID_VARIANT (0xF << SCB_CPUID_VARIANT_LSB)__thumb__ 1__INT_LEAST32_MAX__ 0x7fffffffLsigned charINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLK__GNUC_PATCHLEVEL__ 1__preinit_array_startPTRDIFF_MINSCB_CPUID_VARIANT_LSB 20__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)SCB_CPACR_CP10 (1 << 20)PPBI_BASE (0xE0000000U)__ARM_ARCH_PROFILE 77null_handler__FLT64_MAX_10_EXP__ 308MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINSCB_CFSR_MUNSTKERR (1 << 3)SCB_CCSIDR MMIO32(SCB_BASE + 0x80)__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38SCB_ICIALLU MMIO32(SCB_BASE + 0x250)__FRACT_MAX__ 0X7FFFP-15RSCB_ICSR_PENDSVSET (1 << 28)NVIC_GPIOP7_IRQ 123__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5SCB_CPACR MMIO32(SCB_BASE + 0x88)NVIC_USAGE_FAULT_IRQ -10NVIC_I2C5_IRQ 110NVIC_IPR(ipr_id) MMIO8(NVIC_BASE + 0x300 + (ipr_id))NVIC_PWM0_FAULT_IRQ 9__UINT16_MAX__ 0xffff__TQ_FBIT__ 127usage_fault__USQ_FBIT__ 32INT_FAST16_MIN__thumb2__ 1__ULLACCUM_FBIT__ 32SCB_AIRCR_VECTKEY (0x05FA << SCB_AIRCR_VECTKEYSTAT_LSB)SCB_SHCSR MMIO32(SCB_BASE + 0x24)__TA_IBIT__ 64__STRICT_ANSI__ 1SCB_CFSR_DACCVIOL (1 << 1)UINT_LEAST8_MAXSCB_VTOR_TBLOFF (0x7FFFFF << SCB_VTOR_TBLOFF_LSB)UINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8SCB_ID_ISAR1 MMIO32(SCB_BASE + 0x64)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__SCB_SHCSR_PENDSVACT (1 << 10)__USA_IBIT__ 16NVIC_SYSCTL_IRQ 28__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 1NVIC_WTIMER3B_IRQ 101PTRDIFF_MIN (-PTRDIFF_MAX - 1)__UINT_FAST64_TYPE__ long long unsigned int__preinit_array_enddebug_monitor__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC____FLT32_IS_IEC_60559__ 2INT_FAST64_MINSCB_CFSR_IACCVIOL (1 << 0)__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16L__USFRACT_MIN__ 0.0UHRSCB_CFSR_PRECISERR (1 << 9)SCB_SHCSR_BUSFAULTENA (1 << 17)__ARM_NEONNVIC_WTIMER1B_IRQ 97__UINT8_MAX__ 0xffSCB_CTR_ERG_MASK 0xf__LDBL_MAX_EXP__ 1024SCB_CTR MMIO32(SCB_BASE + 0x7C)SCB_SHCSR_USGFAULTENA (1 << 18)SCB_ICSR_RETOBASE (1 << 11)__DBL_HAS_DENORM__ 1NVIC_TIMER2A_IRQ 23NVIC_ADC1SS2_IRQ 50NVIC_GPIOD_IRQ 3NVIC_GPIOP1_IRQ 117__DA_FBIT__ 31__GXX_ABI_VERSION 1017__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45Fvector_tableINT_LEAST32_MAX __INT_LEAST32_MAX____ULLACCUM_EPSILON__ 0x1P-32ULLKSCB_SHCSR_MEMFAULTACT (1 << 0)NVIC_SYSEXC_IRQ 106hard_faultINT_LEAST8_MAX __INT_LEAST8_MAX____UINT32_C(c) c ## ULNVIC_UART7_IRQ 63__UACCUM_MIN__ 0.0UKNVIC_GPIOP3_IRQ 119SCS_BASE (PPBI_BASE + 0xE000)LIBOPENCM3_LM3S_NVIC_H __init_array_startSCB_CCSELR MMIO32(SCB_BASE + 0x84)__SIZEOF_DOUBLE__ 8NVIC_COMP2_IRQ 27__ARM_ARCH_ISA_THUMBNVIC_WTIMER0B_IRQ 95SCB_ID_AFR0 MMIO32(SCB_BASE + 0x4C)LIBOPENCM3_CM3_MEMORYMAP_H __GCC_ATOMIC_SHORT_LOCK_FREE 2SCB_FPCAR MMIO32(SCB_BASE + 0x238)NVIC_GPIOM_IRQ 111NVIC_UDMA_IRQ 46__USACCUM_FBIT__ 8NVIC_TIMER3A_IRQ 35__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1NVIC_GPIOA_IRQ 0__LACCUM_FBIT__ 31NVIC_SSI3_IRQ 58SCB_CPUID_CONSTANT (0xF << SCB_CPUID_CONSTANT_LSB)__FLT32_HAS_QUIET_NAN__ 1__ARM_FEATURE_MATMUL_INT8__LDBL_HAS_INFINITY__ 1__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308SCB_SHPR_PRI_5_BUSFAULT 1__ARM_ARCH_EXT_IDIV__ 1bool _BoolUINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffSCB_CTR_FORMAT_SHIFT 29BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)SCB_FPCCR MMIO32(SCB_BASE + 0x234)INT16_MAX __INT16_MAX____FP_FAST_FMAF 1__FLT32X_IS_IEC_60559__ 2SCB_AFSR MMIO32(SCB_BASE + 0x3C)NVIC_ICER(icer_id) MMIO32(NVIC_BASE + 0x80 + ((icer_id) * 4))NVIC_COMP1_IRQ 26LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAX__INT_LEAST16_WIDTH__ 16NVIC_GPIOB_IRQ 1NVIC_TIMER1A_IRQ 21__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLINT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHRSCB_SCR_SEVONPEND (1 << 4)SCB_ICSR_PENDSTCLR (1 << 25)CORESIGHT_LSR_SLI (1<<0)INT64_MINSCB_MVFR0 MMIO32(SCB_BASE + 0x240)__USER_LABEL_PREFIX__ __UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffULSCB_CCR_UNALIGN_TRP (1 << 3)SCB_CCR_USERSETMPEND (1 << 1)__INT_LEAST8_MAX__ 0x7fNVIC_GPIOQ4_IRQ 128__GCC_ATOMIC_POINTER_LOCK_FREE 2__ARM_FEATURE_QBIT 1__ARM_FEATURE_CLZ 1__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXSCB_ICSR_VECTPENDING_LSB 12SCB_ICSR_VECTACTIVE (0x1FF << SCB_ICSR_VECTACTIVE_LSB)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__UINT_LEAST32_MAX__ 0xffffffffULNVIC_BUS_FAULT_IRQ -11__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fSCB_AIRCR MMIO32(SCB_BASE + 0x0C)BIT14 (1<<14)NVIC_CAN1_IRQ 40__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intSCB_ID_MMFR0 MMIO32(SCB_BASE + 0x50)UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAXSCB_DFSR MMIO32(SCB_BASE + 0x30)__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)__UINT_LEAST16_TYPE__ short unsigned int__INT32_MAX__ 0x7fffffffLSCB_CFSR_NOCP (1 << 19)SCB_ICSR_NMIPENDSET (1 << 31)UINTMAX_MAXBIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_BF16_VECTOR_ARITHMETICSCB_ID_PFR1 MMIO32(SCB_BASE + 0x44)SCB_CPACR_CP11 (1 << 22)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN____USFRACT_FBIT__ 8INT8_MAX __INT8_MAX__IRQ_HANDLERS [NVIC_GPIOA_IRQ] = gpioa_isr, [NVIC_GPIOB_IRQ] = gpiob_isr, [NVIC_GPIOC_IRQ] = gpioc_isr, [NVIC_GPIOD_IRQ] = gpiod_isr, [NVIC_GPIOE_IRQ] = gpioe_isr, [NVIC_UART0_IRQ] = uart0_isr, [NVIC_UART1_IRQ] = uart1_isr, [NVIC_SSI0_IRQ] = ssi0_isr, [NVIC_I2C0_IRQ] = i2c0_isr, [NVIC_PWM0_FAULT_IRQ] = pwm0_fault_isr, [NVIC_PWM0_0_IRQ] = pwm0_0_isr, [NVIC_PWM0_1_IRQ] = pwm0_1_isr, [NVIC_PWM0_2_IRQ] = pwm0_2_isr, [NVIC_QEI0_IRQ] = qei0_isr, [NVIC_ADC0SS0_IRQ] = adc0ss0_isr, [NVIC_ADC0SS1_IRQ] = adc0ss1_isr, [NVIC_ADC0SS2_IRQ] = adc0ss2_isr, [NVIC_ADC0SS3_IRQ] = adc0ss3_isr, [NVIC_WATCHDOG_IRQ] = watchdog_isr, [NVIC_TIMER0A_IRQ] = timer0a_isr, [NVIC_TIMER0B_IRQ] = timer0b_isr, [NVIC_TIMER1A_IRQ] = timer1a_isr, [NVIC_TIMER1B_IRQ] = timer1b_isr, [NVIC_TIMER2A_IRQ] = timer2a_isr, [NVIC_TIMER2B_IRQ] = timer2b_isr, [NVIC_COMP0_IRQ] = comp0_isr, [NVIC_COMP1_IRQ] = comp1_isr, [NVIC_COMP2_IRQ] = comp2_isr, [NVIC_SYSCTL_IRQ] = sysctl_isr, [NVIC_FLASH_IRQ] = flash_isr, [NVIC_GPIOF_IRQ] = gpiof_isr, [NVIC_GPIOG_IRQ] = gpiog_isr, [NVIC_GPIOH_IRQ] = gpioh_isr, [NVIC_UART2_IRQ] = uart2_isr, [NVIC_SSI1_IRQ] = ssi1_isr, [NVIC_TIMER3A_IRQ] = timer3a_isr, [NVIC_TIMER3B_IRQ] = timer3b_isr, [NVIC_I2C1_IRQ] = i2c1_isr, [NVIC_QEI1_IRQ] = qei1_isr, [NVIC_CAN0_IRQ] = can0_isr, [NVIC_CAN1_IRQ] = can1_isr, [NVIC_CAN2_IRQ] = can2_isr, [NVIC_ETH_IRQ] = eth_isr, [NVIC_HIBERNATE_IRQ] = hibernate_isr, [NVIC_USB0_IRQ] = usb0_isr, [NVIC_PWM0_3_IRQ] = pwm0_3_isr, [NVIC_UDMA_IRQ] = udma_isr, [NVIC_UDMAERR_IRQ] = udmaerr_isr, [NVIC_ADC1SS0_IRQ] = adc1ss0_isr, [NVIC_ADC1SS1_IRQ] = adc1ss1_isr, [NVIC_ADC1SS2_IRQ] = adc1ss2_isr, [NVIC_ADC1SS3_IRQ] = adc1ss3_isr, [NVIC_I2S0_IRQ] = i2s0_isr, [NVIC_EPI0_IRQ] = epi0_isr, [NVIC_GPIOJ_IRQ] = gpioj_isr, [NVIC_GPIOK_IRQ] = gpiok_isr, [NVIC_GPIOL_IRQ] = gpiol_isr, [NVIC_SSI2_IRQ] = ssi2_isr, [NVIC_SSI3_IRQ] = ssi3_isr, [NVIC_UART3_IRQ] = uart3_isr, [NVIC_UART4_IRQ] = uart4_isr, [NVIC_UART5_IRQ] = uart5_isr, [NVIC_UART6_IRQ] = uart6_isr, [NVIC_UART7_IRQ] = uart7_isr, [NVIC_I2C2_IRQ] = i2c2_isr, [NVIC_I2C3_IRQ] = i2c3_isr, [NVIC_TIMER4A_IRQ] = timer4a_isr, [NVIC_TIMER4B_IRQ] = timer4b_isr, [NVIC_TIMER5A_IRQ] = timer5a_isr, [NVIC_TIMER5B_IRQ] = timer5b_isr, [NVIC_WTIMER0A_IRQ] = wtimer0a_isr, [NVIC_WTIMER0B_IRQ] = wtimer0b_isr, [NVIC_WTIMER1A_IRQ] = wtimer1a_isr, [NVIC_WTIMER1B_IRQ] = wtimer1b_isr, [NVIC_WTIMER2A_IRQ] = wtimer2a_isr, [NVIC_WTIMER2B_IRQ] = wtimer2b_isr, [NVIC_WTIMER3A_IRQ] = wtimer3a_isr, [NVIC_WTIMER3B_IRQ] = wtimer3b_isr, [NVIC_WTIMER4A_IRQ] = wtimer4a_isr, [NVIC_WTIMER4B_IRQ] = wtimer4b_isr, [NVIC_WTIMER5A_IRQ] = wtimer5a_isr, [NVIC_WTIMER5B_IRQ] = wtimer5b_isr, [NVIC_SYSEXC_IRQ] = sysexc_isr, [NVIC_PECI0_IRQ] = peci0_isr, [NVIC_LPC0_IRQ] = lpc0_isr, [NVIC_I2C4_IRQ] = i2c4_isr, [NVIC_I2C5_IRQ] = i2c5_isr, [NVIC_GPIOM_IRQ] = gpiom_isr, [NVIC_GPION_IRQ] = gpion_isr, [NVIC_FAN0_IRQ] = fan0_isr, [NVIC_GPIOP0_IRQ] = gpiop0_isr, [NVIC_GPIOP1_IRQ] = gpiop1_isr, [NVIC_GPIOP2_IRQ] = gpiop2_isr, [NVIC_GPIOP3_IRQ] = gpiop3_isr, [NVIC_GPIOP4_IRQ] = gpiop4_isr, [NVIC_GPIOP5_IRQ] = gpiop5_isr, [NVIC_GPIOP6_IRQ] = gpiop6_isr, [NVIC_GPIOP7_IRQ] = gpiop7_isr, [NVIC_GPIOQ0_IRQ] = gpioq0_isr, [NVIC_GPIOQ1_IRQ] = gpioq1_isr, [NVIC_GPIOQ2_IRQ] = gpioq2_isr, [NVIC_GPIOQ3_IRQ] = gpioq3_isr, [NVIC_GPIOQ4_IRQ] = gpioq4_isr, [NVIC_GPIOQ5_IRQ] = gpioq5_isr, [NVIC_GPIOQ6_IRQ] = gpioq6_isr, [NVIC_GPIOQ7_IRQ] = gpioq7_isr, [NVIC_PWM1_0_IRQ] = pwm1_0_isr, [NVIC_PWM1_1_IRQ] = pwm1_1_isr, [NVIC_PWM1_2_IRQ] = pwm1_2_isr, [NVIC_PWM1_3_IRQ] = pwm1_3_isr, [NVIC_PWM1_FAULT_IRQ] = pwm1_fault_isrBIT28 (1<<28)_ebss__GCC_ATOMIC_CHAR16_T_LOCK_FREE 2SCB_DCCMVAC MMIO32(SCB_BASE + 0x268)__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24NVIC_UART6_IRQ 62__UDQ_IBIT__ 0SCB_AIRCR_VECTKEYSTAT (0xFFFF << SCB_AIRCR_VECTKEYSTAT_LSB)__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UKSCB_CPUID MMIO32(SCB_BASE + 0x00)__FLT64_NORM_MAX__ 1.7976931348623157e+308F64INT64_MIN (-INT64_MAX - 1)SCB_ID_PFR0 MMIO32(SCB_BASE + 0x40)UINTPTR_MAX__LDBL_DENORM_MIN__ 4.9406564584124654e-324L__INT64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_SAT 1__ULLFRACT_IBIT__ 0MMIO16(addr) (*(volatile uint16_t *)(addr))NVIC_ICPR(icpr_id) MMIO32(NVIC_BASE + 0x180 + ((icpr_id) * 4))NVIC_I2C2_IRQ 68SCB_CTR_FORMAT_MASK 0x7__GNUC__ 12SCB_ID_MMFR3 MMIO32(SCB_BASE + 0x5C)WCHAR_MAXNVIC_GPIOP0_IRQ 116__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0UNVIC_TIMER5A_IRQ 92__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 2__ULACCUM_MIN__ 0.0ULKSCB_VTOR_TBLOFF_LSB 9__LDBL_MAX__ 1.7976931348623157e+308L__ARM_ARCH 7memory_manage_faultNVIC_UART4_IRQ 60_stack__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__FLT_EPSILON__ 1.1920928955078125e-7F__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAX__LDBL_HAS_QUIET_NAN__ 1NVIC_WTIMER3A_IRQ 100SCB_CFSR_UNDEFINSTR (1 << 16)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)NVIC_GPIOQ0_IRQ 124SCB_CPUID_IMPLEMENTER_LSB 24SCB_ID_ISAR4 MMIO32(SCB_BASE + 0x70)__ARM_FP__HA_IBIT__ 8__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xSCB_CCR_DIV_0_TRP (1 << 4)__FLT64_MAX_EXP__ 1024UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LL__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4__UFRACT_MAX__ 0XFFFFP-16URblocking_handlerFPB_BASE (PPBI_BASE + 0x2000)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0STIR_BASE (SCS_BASE + 0x0F00)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__SCB_ICSR_PENDSTSET (1 << 26)ID_BASE (SCS_BASE + 0x0FD0)SYS_TICK_BASE (SCS_BASE + 0x0010)SCB_AIRCR_VECTCLRACTIVE (1 << 1)NVIC_TIMER5B_IRQ 93__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)NVIC_GPIOJ_IRQ 54__LDBL_MAX_10_EXP__ 308SCB_CCR_DC (1 << 16)NVIC_ADC0SS1_IRQ 15reset__INT_FAST32_TYPE__ intunsigned intSCB_ID_ISAR2 MMIO32(SCB_BASE + 0x68)SCB_DCCIMVAC MMIO32(SCB_BASE + 0x270)__init_array_end__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1NVIC_UDMAERR_IRQ 47__USACCUM_IBIT__ 8ITM_BASE (PPBI_BASE + 0x0000)NVIC_GPIOP4_IRQ 120__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UKSCB_ICSR MMIO32(SCB_BASE + 0x04)__UTA_IBIT__ 64NVIC_GPIOG_IRQ 31__FLT_EVAL_METHOD__ 0__SCHAR_MAX__ 0x7fINT_LEAST32_MINSCB_DCCISW MMIO32(SCB_BASE + 0x274)SCB_SHPR_PRI_6_USAGEFAULT 2__ARM_FEATURE_LDREXNVIC_WTIMER0A_IRQ 94__UQQ_FBIT__ 8INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1__ARM_FEATURE_IDIV 1__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__SCB_AIRCR_PRIGROUP_GROUP8_SUB2 (0x4 << 8)__UINT8_TYPE__ unsigned charNVIC_TIMER1B_IRQ 22SCB_SHCSR_SYSTICKACT (1 << 11)__ARM_FEATURE_COPROC 15UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"NVIC_TIMER3B_IRQ 36INT8_MINtrue 1__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)pend_sv__FLT32X_MIN_EXP__ (-1021)INT64_MAXINT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 2__LFRACT_EPSILON__ 0x1P-31LRNVIC_FLASH_IRQ 29NVIC_GPIOQ5_IRQ 129__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX__SCB_CFSR_BFARVALID (1 << 15)__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1NVIC_PWM1_3_IRQ 137__FLT32_MIN_10_EXP__ (-37)SCB_SHCSR_USGFAULTPENDED (1 << 12)MMIO64(addr) (*(volatile uint64_t *)(addr))NVIC_STIR MMIO32(STIR_BASE)NVIC_TIMER2B_IRQ 24__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MINNVIC_UART2_IRQ 33__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)SCB_AIRCR_SYSRESETREQ (1 << 2)SCB_ICSR_ISRPENDING (1 << 22)NVIC_ADC1SS1_IRQ 49NVIC_EPI0_IRQ 53SCB_AIRCR_PRIGROUP_SHIFT 8__ARM_FEATURE_QRDMXSCB_SHCSR_USGFAULTACT (1 << 3)__ARM_ARCH_ISA_THUMB 2__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32SCB_ICIMVAU MMIO32(SCB_BASE + 0x258)SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__UINT_LEAST8_MAX __UINT_LEAST8_MAX__BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0__ARM_32BIT_STATE 1_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1SCB_ID_MMFR1 MMIO32(SCB_BASE + 0x54)INT_FAST32_MIN (-INT_FAST32_MAX - 1)SCB_AIRCR_PRIGROUP_MASK (0x7 << 8)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 2SCB_CTR_CWG_SHIFT 24__FLT32_DIG__ 6INT_LEAST16_MAXSCB_ICSR_VECTPENDING (0x1FF << SCB_ICSR_VECTPENDING_LSB)BIT15 (1<<15)NVIC_SYSTICK_IRQ -1NVIC_PWM1_0_IRQ 134BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1INT32_MAX__ACCUM_MIN__ (-0X1P15K-0X1P15K)NVIC_SSI0_IRQ 7NVIC_WTIMER4A_IRQ 102__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intNVIC_GPIOK_IRQ 55SCB_CPUID_REVISION (0xF << SCB_CPUID_REVISION_LSB)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0SCB_CPACR_PRIV 1UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234NVIC_HARD_FAULT_IRQ -13SCB_CTR_DMINLINE_MASK 0x1f__FLT_NORM_MAX__ 3.4028234663852886e+38FSCB_ICSR_VECTACTIVE_LSB 0long long unsigned int__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)SCB_SHCSR_MONITORACT (1 << 8)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int__APCS_32__ 1__DQ_FBIT__ 63SCB_SHPR_PRI_8_RESERVED 4INT_LEAST64_MAX__SACCUM_IBIT__ 8SCB_CFSR_INVPC (1 << 18)__UHQ_IBIT__ 0INT_LEAST8_MINNVIC_SSI2_IRQ 57SCB_FPDSCR MMIO32(SCB_BASE + 0x23C)BIT29 (1<<29)__INT_FAST16_TYPE__ intINT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRSCB_SHCSR_BUSFAULTPENDED (1 << 14)_data_loadaddr__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15__UTQ_FBIT__ 128LIBOPENCM3_SCB_H SCB_CLIDR MMIO32(SCB_BASE + 0x78)__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffPTRDIFF_MAX __PTRDIFF_MAX____SIZEOF_SHORT__ 2__FLT32_DECIMAL_DIG__ 9__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKNVIC_GPIOQ1_IRQ 125NVIC_CAN2_IRQ 41UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRNVIC_COMP0_IRQ 25SCB_CFSR_IBUSERR (1 << 8)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intNVIC_ISPR(ispr_id) MMIO32(NVIC_BASE + 0x100 + ((ispr_id) * 4))SCB_BPIALL MMIO32(SCB_BASE + 0x278)WCHAR_MINNVIC_PWM0_1_IRQ 11LM4F 1BEGIN_DECLS NVIC_I2C4_IRQ 109__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKNVIC_CAN0_IRQ 39__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xSCB_ICSR_ISRPREEMPT (1 << 23)__ARM_EABI__ 1INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1__ARM_FEATURE_DSP 1destSCB_GET_EXCEPTION_STACK_FRAME(f) do { asm volatile ("mov %[frameptr], sp" : [frameptr]"=r" (f)); } while (0)__QQ_IBIT__ 0SCB_SHPR_PRI_14_PENDSV 10SCB_SHPR_PRI_12_RESERVED 8__LLACCUM_FBIT__ 31_datainitial_sp_value__UINTMAX_TYPE__ long long unsigned int__USQ_IBIT__ 0SCB_CPUID_PARTNO (0xFFF << SCB_CPUID_PARTNO_LSB)__UINT_LEAST32_TYPE__ long unsigned int__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int../cm3/vector.c__GCC_ATOMIC_INT_LOCK_FREE 2SCB_AIRCR_PRIGROUP_GROUP16_NOSUB (0x3 << 8)INTMAX_MAX__ARM_ARCH_7EM__ 1NVIC_PWM0_0_IRQ 10__ARM_FEATURE_FP16_SCALAR_ARITHMETICNVIC_SV_CALL_IRQ -5__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1NVIC_TIMER0B_IRQ 20__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CNVIC_GPIOP5_IRQ 121reserved_x001c__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intNVIC_NMI_IRQ -14UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULR__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned int__INT64_C(c) c ## LLSCB_CPUID_IMPLEMENTER (0xFF << SCB_CPUID_IMPLEMENTER_LSB)__LDBL_MIN_10_EXP__ (-307)systickSCB_CTR_CWG_MASK 0xfNVIC_USB0_IRQ 44TPIU_BASE (PPBI_BASE + 0x40000)SCB_CTR_IMINLINE_SHIFT 0__LDBL_MIN__ 2.2250738585072014e-308LSCB_CFSR MMIO32(SCB_BASE + 0x28)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16funcp_tNVIC_PWM1_FAULT_IRQ 138CORESIGHT_LAR_OFFSET 0xfb0SCB_CFSR_IMPRECISERR (1 << 10)NVIC_GPIOC_IRQ 2SCB_SHPR_PRI_15_SYSTICK 11short intSCB_CFSR_UNSTKERR (1 << 11)__UINT16_C(c) c__UDA_IBIT__ 32UINT_LEAST32_MAXBIT2 (1<<2)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCNVIC_ADC0SS3_IRQ 17sv_call__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53reserved_x0034BIT5 (1<<5)BIT1 (1<<1)NVIC_TIMER4B_IRQ 71INT8_CINT_LEAST32_MAXSCB_CFSR_MSTKERR (1 << 4)__USES_INITFINI__ 1__DBL_DECIMAL_DIG__ 17BIT8 (1<<8)NVIC_PWM0_2_IRQ 12INT16_C(c) __INT16_C(c)NVIC_FAN0_IRQ 114__INT16_MAX__ 0x7fffSCB_SHCSR_MEMFAULTPENDED (1 << 13)__INT_WIDTH__ 32__ARM_FEATURE_SIMD32 1SCB_CCR_BP (1 << 18)__QQ_FBIT__ 7SCB_CCR_IC (1 << 17)__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64NVIC_QEI0_IRQ 13__ULLACCUM_IBIT__ 32NVIC_GPIOQ6_IRQ 130SCB_VTOR MMIO32(SCB_BASE + 0x08)__ULLFRACT_EPSILON__ 0x1P-64ULLRfalse 0__SIZEOF_WINT_T__ 4SCB_CPUID_CONSTANT_ARMV6 (0xC << SCB_CPUID_CONSTANT_LSB)__ARM_FEATURE_UNALIGNED 1__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17SCB_HFSR MMIO32(SCB_BASE + 0x2C)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1SCB_CFSR_DIVBYZERO (1 << 25)__FLT32X_HAS_DENORM__ 1NVIC_WTIMER2A_IRQ 98__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32NVIC_GPIOH_IRQ 32SCB_HFSR_DEBUG_VT (1 << 31)__ARM_ASM_SYNTAX_UNIFIED__ 1NVIC_GPION_IRQ 112__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODNVIC_PWM1_1_IRQ 135DEBUG_MONITOR_IRQ -4SCB_ID_ISAR3 MMIO32(SCB_BASE + 0x6C)NVIC_IABR(iabr_id) MMIO32(NVIC_BASE + 0x200 + ((iabr_id) * 4))__ARM_PCS_VFP 1NVIC_GPIOE_IRQ 4SCB_CCR_STKALIGN (1 << 9)__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H INT_LEAST64_MIN__GCC_CONSTRUCTIVE_SIZE 64SCB_MVFR1 MMIO32(SCB_BASE + 0x244)__LLFRACT_IBIT__ 0SCB_SHPR_PRI_10_RESERVED 6uint32_tBIT12 (1<<12)SCB_CPUID_CONSTANT_ARMV7 (0xF << SCB_CPUID_CONSTANT_LSB)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HK__GCC_ASM_FLAG_OUTPUTS__ 1__ARM_FP 4SCB_CTR_IMINLINE_MASK 0xf__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULKSCB_CPUID_PARTNO_LSB 4__LDBL_DIG__ 15NVIC_ADC0SS0_IRQ 14UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXBIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15NVIC_UART5_IRQ 61__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8__INT_LEAST16_TYPE__ short int__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1SCB_CFSR_UNALIGNED (1 << 24)UINTMAX_CSCB_SHPR_PRI_7_RESERVED 3NVIC_LPC0_IRQ 108INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1NVIC_GPIOF_IRQ 30NVIC_ADC1SS3_IRQ 51__HQ_FBIT__ 15__bool_true_false_are_defined 1BIT26 (1<<26)__SIZE_MAX__ 0xffffffffUreset_handler__ARM_ARCH__LONG_MAX__ 0x7fffffffLNVIC_GPIOQ2_IRQ 126SCB_CPACR_FULL 3SCB_CFSR_MMARVALID (1 << 7)SCB_ID_MMFR2 MMIO32(SCB_BASE + 0x58)SCB_AIRCR_VECTKEYSTAT_LSB 16__ARM_FEATURE_LDREX 7PTRDIFF_MAXSCB_CCR_BFHFNMIGN (1 << 8)__LLFRACT_EPSILON__ 0x1P-63LLR__SFRACT_MAX__ 0X7FP-7HR__FLT32X_MANT_DIG__ 53__WCHAR_WIDTH__ 32/build/libopencm3/lib/lm4fWINT_MAX__INT16_C(c) cSCB_ID_ISAR0 MMIO32(SCB_BASE + 0x60)INT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32NVIC_WTIMER1A_IRQ 96NVIC_WTIMER2B_IRQ 99__ATOMIC_ACQ_REL 4__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)__fini_array_startSCB_CTR_ERG_SHIFT 20SCB_SHCSR_SVCALLACT (1 << 7)NVIC_WATCHDOG_IRQ 18SCB_SHPR_PRI_11_SVCALL 7__FLT32_NORM_MAX__ 3.4028234663852886e+38F32UINT64_C(c) __UINT64_C(c)__UINTMAX_MAX__ 0xffffffffffffffffULLSCB_ICSR_PENDSVCLR (1 << 27)__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0vector_table_entry_tINT_FAST16_MAXITR_BASE (SCS_BASE + 0x0000)__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long int__INT_FAST8_WIDTH__ 32__ARM_FEATURE_CDE_COPROCNVIC_SSI1_IRQ 34UINT32_CGCC: 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